CN105183593A - Homemade computer based build in test system and method - Google Patents
Homemade computer based build in test system and method Download PDFInfo
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- CN105183593A CN105183593A CN201510454949.3A CN201510454949A CN105183593A CN 105183593 A CN105183593 A CN 105183593A CN 201510454949 A CN201510454949 A CN 201510454949A CN 105183593 A CN105183593 A CN 105183593A
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Abstract
The invention discloses a homemade computer based build in test system and method, which belong to the technical field of computer self-detection and achieve the effects that a build in test (BIT) function of a homemade computer is realized and the demands of a homemade computer platform on possession of fault detection and isolation capabilities and shortening of maintenance time are met. The technical scheme is that: the homemade computer based build in test system and method is provided; hardware involved in the system comprises a system-level testing module, a module-level testing module and a chip-level testing module; and software layers involved in the system include a hardware platform layer, a driver layer, a kernel layer, a support layer and an application layer. The homemade computer based build in test system and method adopts the self-detection system, performs self-detection on the homemade computer, and comprises power-on BIT, periodic BIT and maintenance BIT.
Description
Technical field
The present invention relates to a kind of Autonomous test technical field of computing machine, specifically a kind of based on the self-monitoring system and method for home brewed computer.
Background technology
Along with the complexity of computing machine and technology content more and more higher, maintainability, testability fight capability, viability, maneuverability, maintenance personal, support cost etc. on computer equipment create more and more important impact.In prior art, the intension of testability mainly uses automatic test equipment (ATE).
ATE is the abbreviation of AutomaticTestEquipment, is translated as ATE (automatic test equipment), for the integrality of the integrate circuit function of detection computations machine, is the last flow process of the integrated circuit manufacturing, to guarantee the quality of the integrated circuit manufacturing.Inside the manufacturing process of all electronic devices and components (Device), there are the needs of eliminating the false and retaining the true, this needs is actually a process tested.In order to realize this process, just need various testing equipment, this kind equipment is exactly so-called ATE (AutomaticTestEquipment).Electronic devices and components DUT (DeviceUnderTest) mentioned here, comprises IC classification certainly, in addition, also comprises discrete element, device.ATE is present in the links of preceding working procedure (FrontEnd) and later process (BackEnd), and concrete depends on the requirement that technique (Process) designs.
Traditional ATE test is main utilizes outside testing tool (ETE) to test equipment under test.ATE costly, many, the complicated operation of kind, staff training difficulty, and can only offline inspection.Along with computer equipment maintainability require raising, in the urgent need to equip itself possess detections, isolated fault ability and shortening servicing time.
Summary of the invention
Technical assignment of the present invention is for above weak point, provides a kind of based on the self-monitoring system and method for home brewed computer.Solve realize production domesticization computer self-test survey (BIT) function, meet home brewed computer platform itself possess detections, isolated fault ability and shortening servicing time demand.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of based on the self-monitoring system of home brewed computer, the hardware that this system relates to comprises system level testing module, module level test module, chip-scale test module; Chip-scale test module is used for carrying out detecting information collection to the functional module of computing machine, uploads detecting information to module level test module; Detecting information, for receiving the detecting information transmitted from chip-scale test module, is uploaded to system level testing module by module level test module; System level testing module for receiving the detecting information from module level test module, and carries out diagnostic reasoning and prediction in core processor, display fault and abnormality alarming information;
The software layer that this system relates to comprises hardware platform layer, drives layer, inner nuclear layer, supporting layer and application layer; The hardware that hardware platform layer is used for for computing machine this locality is detected provides support; Drive layer for the driving to peripheral functional interface; Inner nuclear layer, for providing the function of embedded OS, provides software runtime environment to supporting layer and application layer; Supporting layer provides protocol stack to application layer; Application layer externally provides Web service.
A kind of based on the self-monitoring system of home brewed computer, chip-scale test module is used for carrying out fault warning, fault isolation according to user's request.
A kind of based on the self-monitoring system of home brewed computer, module level test module is also for reserved test maintaining port, carry out fault handling according to detecting information to the functional module of computing machine by test maintaining port, result is uploaded to system level testing module by module level test module.
A kind of based on the self-monitoring system of home brewed computer, drive the access of I2C driving for completing IPMB bus of layer, read each functional module status information by IPMB, conduct monitoring at all levels is carried out to each functional module, fault alarm, fault diagnosis and fault handling function are provided; The GPIO of layer is driven to drive for completing the control to logic.
A kind of based on the self-monitoring system of home brewed computer, the protocol stack of supporting layer is IPMI protocol stack, for complete to the decapsulation receiving IPMI2.0 bag with encapsulate data into IPMI2.0 packet.
A kind of based on the self-monitoring system of home brewed computer, application layer is based on JAVA technological development remote administrative interface, and long-range display adopts JNLP technology to realize, and needs to install JRE environment in client; User, by the management control unit WEB interface of OverIP mode log into thr computer, carries out real-time monitor and managment to computing machine, processes the detecting information collected, realize the condition monitoring of each functional module.
A kind of based on the self-monitoring method of home brewed computer, adopt above-mentioned self-monitoring system, Autonomous test is carried out to home brewed computer, comprise and power up BIT, cycle BIT, safeguard BIT;
Power up BIT: after system power-up, power up BIT test automatically after each module starts, determine whether equipment enters normal work;
Cycle BIT: in each module routine, cycle BIT carries out period measuring and inspection to module automatically, does not interrupt also the work of not interference avoidance subsystem, to guarantee the function of system and stable performance and Timeliness coverage fault; If any fault, diagnose according to fault characteristic, accurate localizing faults position, stores and issues failure message;
Safeguard BIT: in maintenance process, safeguard that BIT passes through network or by self-check system software analysis failure diagnosis information, for hardware localization of fault, fault analysis and keep in repair help.
A kind of based on the self-monitoring method of home brewed computer, adopt the mechanism of monitoring, continuous detecting continuously; Some fault may not influential system work, automatically disappears sometimes, although and some faults can not damage equipment, if stopped not in time, system can cannot normally work, and therefore need to take immediate measure, otherwise fault is by damage equipment.
A kind of based on the self-monitoring method of home brewed computer, when realizing fault detection capability, for all system level testing modules, module level test module, chip-scale test module design a failure counter, failure counter value is initialized as 0, when primary fault being detected, failure counter value adds 1; Enter next cycle BIT, if failure vanishes, then failure counter value subtracts 1, when failure counter value reaches threshold value, carries out fault alarm, thus reaches the effect reducing false alarm rate.
The English full name of BIT is buildintest, is translated as computer self-test and surveys.
Based on the self-monitoring system and method for home brewed computer compared to the prior art one of the present invention, has the following advantages:
1, do not interrupt the work of not interference avoidance subsystem yet, and the function of system and stable performance and Timeliness coverage fault can be guaranteed;
2, take home brewed computer as target, carry out Autonomous test (BIT) Hierarchical Design, adopt the mechanism of monitoring, continuous detecting continuously in systems in which;
3, by Autonomous test (BIT) Software for Design, real-time monitor and managment is carried out to computing machine, the information collected is processed, realize the condition monitoring of each functional module;
4, the setting of failure counter, reaches the effect reducing false alarm rate.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention is further described.
Accompanying drawing 1 is a kind of hardware block diagram based on the self-monitoring system of home brewed computer;
Accompanying drawing 2 is a kind of software architecture figure based on the self-monitoring system of home brewed computer;
Accompanying drawing 3 is a kind of process flow diagram based on home brewed computer self-sensing method.
Embodiment
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
Embodiment 1:
One of the present invention is based on the self-monitoring system of home brewed computer, and as shown in Figure 1, the hardware that this system relates to comprises system level testing module, module level test module, chip-scale test module; Chip-scale test module is used for carrying out detecting information collection to the functional module of computing machine, uploads detecting information to module level test module; Detecting information, for receiving the detecting information transmitted from chip-scale test module, is uploaded to system level testing module by module level test module; System level testing module for receiving the detecting information from module level test module, and carries out diagnostic reasoning and prediction in core processor, display fault and abnormality alarming information;
As shown in Figure 2, the software layer that this system relates to comprises hardware platform layer, drives layer, inner nuclear layer, supporting layer and application layer; The hardware that hardware platform layer is used for for computing machine this locality is detected provides support; Drive layer for the driving to peripheral functional interface; Inner nuclear layer, for providing the function of embedded OS, provides software runtime environment to supporting layer and application layer; Supporting layer provides protocol stack to application layer; Application layer externally provides Web service.
Embodiment 2:
One of the present invention is based on the self-monitoring system of home brewed computer, and as shown in Figure 1, the hardware that this system relates to comprises system level testing module, module level test module, chip-scale test module; Chip-scale test module is used for carrying out detecting information collection to the functional module of computing machine, uploads detecting information to module level test module; Detecting information, for receiving the detecting information transmitted from chip-scale test module, is uploaded to system level testing module by module level test module; System level testing module for receiving the detecting information from module level test module, and carries out diagnostic reasoning and prediction in core processor, display fault and abnormality alarming information;
As shown in Figure 2, the software layer that this system relates to comprises hardware platform layer, drives layer, inner nuclear layer, supporting layer and application layer; The hardware that hardware platform layer is used for for computing machine this locality is detected provides support; Drive layer for the driving to peripheral functional interface; Inner nuclear layer, for providing the function of embedded OS, provides software runtime environment to supporting layer and application layer; Supporting layer provides protocol stack to application layer; Application layer externally provides Web service.
Chip-scale test module is used for carrying out fault warning, fault isolation according to user's request.
Module level test module also for reserved test maintaining port, carries out fault handling according to detecting information to the functional module of computing machine by test maintaining port, and result is uploaded to system level testing module by module level test module.
Driving the access of I2C driving for completing IPMB bus of layer, reading each functional module status information by IPMB, conduct monitoring at all levels is carried out to each functional module, fault alarm, fault diagnosis and fault handling function are provided; The GPIO of layer is driven to drive for completing the control to logic.
The protocol stack of supporting layer is IPMI protocol stack, for complete to receive IPMI2.0 bag decapsulation with encapsulate data into IPMI2.0 packet.
Application layer is based on JAVA technological development remote administrative interface, and long-range display adopts JNLP technology to realize, and needs to install JRE environment in client; User, by the management control unit WEB interface of OverIP mode log into thr computer, carries out real-time monitor and managment to computing machine, processes the detecting information collected, realize the condition monitoring of each functional module.
Embodiment 3:
The self-monitoring system that employing of the present invention is above-mentioned, carries out Autonomous test to home brewed computer, comprises powering up BIT, cycle BIT, safeguarding BIT;
Power up BIT: after system power-up, power up BIT test automatically after each module starts, determine whether equipment enters normal work;
Cycle BIT: in each module routine, cycle BIT carries out period measuring and inspection to module automatically, does not interrupt also the work of not interference avoidance subsystem, to guarantee the function of system and stable performance and Timeliness coverage fault; If any fault, diagnose according to fault characteristic, accurate localizing faults position, stores and issues failure message;
Safeguard BIT: in maintenance process, safeguard that BIT passes through network or by self-check system software analysis failure diagnosis information, for hardware localization of fault, fault analysis and keep in repair help.
Adopt the mechanism of monitoring, continuous detecting continuously; Some fault may not influential system work, automatically disappears sometimes, although and some faults can not damage equipment, if stopped not in time, system can cannot normally work, and therefore need to take immediate measure, otherwise fault is by damage equipment.
When realizing fault detection capability, for all system level testing modules, module level test module, chip-scale test module design a failure counter, failure counter value is initialized as 0, and when primary fault being detected, failure counter value adds 1; Enter next cycle BIT, if failure vanishes, then failure counter value subtracts 1, when failure counter value reaches threshold value, carries out fault alarm, thus reaches the effect reducing false alarm rate.
Above-mentioned embodiment is only concrete case of the present invention; scope of patent protection of the present invention includes but not limited to above-mentioned embodiment; any a kind of claims based on the self-monitoring system and method for home brewed computer according to the invention and any person of an ordinary skill in the technical field to its suitable change done or replacement, all should fall into scope of patent protection of the present invention.
Claims (9)
1., based on the self-monitoring system of home brewed computer, it is characterized in that the hardware that this system relates to comprises system level testing module, module level test module, chip-scale test module; Chip-scale test module is used for carrying out detecting information collection to the functional module of computing machine, uploads detecting information to module level test module; Detecting information, for receiving the detecting information transmitted from chip-scale test module, is uploaded to system level testing module by module level test module; System level testing module for receiving the detecting information from module level test module, and carries out diagnostic reasoning and prediction in core processor, display fault and abnormality alarming information;
The software layer that this system relates to comprises hardware platform layer, drives layer, inner nuclear layer, supporting layer and application layer; The hardware that hardware platform layer is used for for computing machine this locality is detected provides support; Drive layer for the driving to peripheral functional interface; Inner nuclear layer, for providing the function of embedded OS, provides software runtime environment to supporting layer and application layer; Supporting layer provides protocol stack to application layer; Application layer externally provides Web service.
2. one according to claim 1 is based on the self-monitoring system of home brewed computer, it is characterized in that chip-scale test module is for carrying out fault warning, fault isolation according to user's request.
3. one according to claim 1 is based on the self-monitoring system of home brewed computer, it is characterized in that module level test module also for reserved test maintaining port, carry out fault handling according to detecting information to the functional module of computing machine by test maintaining port, result is uploaded to system level testing module by module level test module.
4. one according to claim 1 is based on the self-monitoring system of home brewed computer, it is characterized in that the access of I2C driving for completing IPMB bus driving layer, each functional module status information is read by IPMB, conduct monitoring at all levels is carried out to each functional module, fault alarm, fault diagnosis and fault handling function are provided; The GPIO of layer is driven to drive for completing the control to logic.
5. one according to claim 1 is based on the self-monitoring system of home brewed computer, it is characterized in that the protocol stack of supporting layer is IPMI protocol stack, for complete to receive IPMI2.0 bag decapsulation with encapsulate data into IPMI2.0 packet.
6. one according to claim 1 is based on the self-monitoring system of home brewed computer, it is characterized in that application layer is based on JAVA technological development remote administrative interface, and long-range display adopts JNLP technology to realize.
7. based on the self-monitoring method of home brewed computer, it is characterized in that adopting any self-monitoring system in claim 1-6, Autonomous test is carried out to home brewed computer, comprise and power up BIT, cycle BIT, safeguard BIT;
Power up BIT: after system power-up, power up BIT test automatically after each module starts, determine whether equipment enters normal work;
Cycle BIT: in each module routine, cycle BIT carries out period measuring and inspection to module automatically; If any fault, diagnose according to fault characteristic, accurate localizing faults position, stores and issues failure message;
Safeguard BIT: in maintenance process, safeguard that BIT passes through network or by self-check system software analysis failure diagnosis information, for hardware localization of fault, fault analysis and keep in repair help.
8. one according to claim 7 is based on the self-monitoring method of home brewed computer, it is characterized in that the mechanism adopting continuous monitoring, continuous detecting.
9. one according to claim 7 is based on the self-monitoring method of home brewed computer, it is characterized in that when realizing fault detection capability, for all system level testing modules, module level test module, chip-scale test module design a failure counter, failure counter value is initialized as 0, when primary fault being detected, failure counter value adds 1; Enter next cycle BIT, if failure vanishes, then failure counter value subtracts 1, when failure counter value reaches threshold value, carries out fault alarm.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106815114A (en) * | 2017-01-12 | 2017-06-09 | 西安科技大学 | A kind of computer system fault handling method based on software-hardware synergism |
| CN107562561A (en) * | 2017-09-05 | 2018-01-09 | 合肥爱吾宠科技有限公司 | Computer hardware rapid diagnostic test system |
| CN109409095A (en) * | 2018-11-08 | 2019-03-01 | 温州科技职业学院 | A kind of computer software analysis system |
| WO2021088313A1 (en) * | 2019-11-07 | 2021-05-14 | 上海禾赛光电科技有限公司 | State detection device for laser radar, laser radar, and state detection method |
| CN115037360A (en) * | 2022-08-09 | 2022-09-09 | 沈阳航盛科技有限责任公司 | Health management method of satellite communication antenna system |
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| CN103995762A (en) * | 2014-06-06 | 2014-08-20 | 山东超越数控电子有限公司 | Method for diagnosing board card fault |
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| CN102968351A (en) * | 2012-12-13 | 2013-03-13 | 中国航空无线电电子研究所 | External control method for BIT parameters |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106815114A (en) * | 2017-01-12 | 2017-06-09 | 西安科技大学 | A kind of computer system fault handling method based on software-hardware synergism |
| CN107562561A (en) * | 2017-09-05 | 2018-01-09 | 合肥爱吾宠科技有限公司 | Computer hardware rapid diagnostic test system |
| CN109409095A (en) * | 2018-11-08 | 2019-03-01 | 温州科技职业学院 | A kind of computer software analysis system |
| WO2021088313A1 (en) * | 2019-11-07 | 2021-05-14 | 上海禾赛光电科技有限公司 | State detection device for laser radar, laser radar, and state detection method |
| CN115037360A (en) * | 2022-08-09 | 2022-09-09 | 沈阳航盛科技有限责任公司 | Health management method of satellite communication antenna system |
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