CN105161468A - Radio frequency chip and passive device packaging structure and packaging method - Google Patents
Radio frequency chip and passive device packaging structure and packaging method Download PDFInfo
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- CN105161468A CN105161468A CN201510661103.7A CN201510661103A CN105161468A CN 105161468 A CN105161468 A CN 105161468A CN 201510661103 A CN201510661103 A CN 201510661103A CN 105161468 A CN105161468 A CN 105161468A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 21
- 239000004033 plastic Substances 0.000 claims description 23
- 238000001465 metallisation Methods 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 229920000642 polymer Polymers 0.000 claims description 14
- 239000002390 adhesive tape Substances 0.000 claims description 9
- 238000012856 packing Methods 0.000 claims description 8
- 239000007788 liquid Substances 0.000 claims description 6
- 239000005022 packaging material Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- 239000004593 Epoxy Substances 0.000 claims description 4
- 238000003754 machining Methods 0.000 claims description 4
- 238000007711 solidification Methods 0.000 claims description 4
- 230000008023 solidification Effects 0.000 claims description 4
- 238000001746 injection moulding Methods 0.000 claims description 3
- 239000012785 packaging film Substances 0.000 claims description 3
- 229920006280 packaging film Polymers 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 238000004321 preservation Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 2
- 230000002596 correlated effect Effects 0.000 abstract 1
- 230000005540 biological transmission Effects 0.000 description 9
- 238000013461 design Methods 0.000 description 9
- 238000005538 encapsulation Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 230000008054 signal transmission Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000003672 processing method Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/24195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention provides a radio frequency chip and passive device packaging structure, comprising a plastic-sealed body (4) and an RDL (Redistribution Lines) layer (5) arranged on the surface of the plastic-sealed body (4); radio frequency chips (1) and passive devices (2) are plastically sealed in the plastic-sealed body (4). The invention also provides a radio frequency chip and passive device packaging method. According to the invention, one or more than one radio frequency chip and correlated discrete devices are integrated in the plastic-sealed body to prepare a single plastic-sealed body with a system level function, and the parasitic effect caused by the current packaging technique can be eliminated.
Description
Technical field
The present invention relates to radio frequency micro-system encapsulation field, specifically refer to a kind of RF transmitting structures based on embedded wafer-level packaging and processing method.
Background technology
System in package is a brand-new encapsulation concept in microsystems technology field, refer to by the collaborated design and manufacturing to digital signal, radio frequency, optics, MEMS, multi-chip and discrete device etc. are integrated in a single plastic-sealed body, and make this single plastic-sealed body possess system-level function.
T/R transmitting-receiving subassembly is the radio frequency micro-system in phased array radar, the method for packing of its radio-frequency module generally adopts wire bonding to be connected with the radio circuit on LTCC or microwave-medium plate by microwave radio chip, and discrete device (as decoupling capacitor, inductance or resistance) is then welded on LTCC or microwave-medium plate by SMT surface mount process.Owing to relating to the wire bonding method of attachment different with SMT surface mount two, cause assembling procedure complicated, adverse influence is brought to the working (machining) efficiency of T/R assembly and rate of finished products.In addition, encapsulation can bring loss to radiofrequency signal, and such as, in QFN, BGA or FC encapsulation, radiofrequency signal needs to be transmitted by bonding wire, lead frame or base plate for packaging.Radiofrequency signal is longer to the distance of plastic-sealed body outside from plastic-sealed body internal transmission, the design challenges of impedance matching and higher ghost effect can be brought, be difficult to realize optimized package design, these bring negative effect all to radiofrequency signal integrality, particularly serious when higher radio frequency frequency.
Publication number be CN101567351A and CN102236820A patent discloses a kind of miniature radio frequency module and method for packing thereof, its radio frequency chip and load capacitance adopt QFN encapsulating structure, by bonding wire by pin interconnection in chip and QFN.But bonding wire has higher ghost effect, and be difficult to carry out good designing impedance matching, especially at high frequencies, to some parasitic responsive radio frequency chips, higher loss may be produced.
Summary of the invention
The present invention proposes a kind of radio frequency chip method for packing based on embedded wafer-level packaging, solves above-mentionedly to be difficult to carry out good designing impedance matching and to produce the problem of higher loss due to ghost effect.
The present invention relates to two key elements: the RF transmitting structures based on embedded wafer-level packaging method designs and realizes the processing method of this structure.
Embedded wafer-level packaging (EmbeddedWaferLevelPackage) is the new packing forms of one developed on the basis of fan-out-type wafer-level packaging (Fan-outWaferLevelPackage).Embedded wafer-level packaging has higher integrated level and flexibility ratio, and it not only can packaged chip, the discrete device of chip perimeter can also be carried out encapsulation and integration together, thus obtains single plastic-sealed body that has system level function.
The advantage of embedded wafer-level packaging to pass through wiring technique (Redistributionlines again, RDL) at grade, to realize between radio frequency chip or and passive device between radio signal transmission, interconnection or chip port redistribution, and without the need to the wire bonding that adopted by conventional package or base plate for packaging as transmission intermediary.Therefore, RDL again wiring technique can eliminate the ghost effect that wire bonding or base plate for packaging bring, and by the radio signal transmission structure of design impedance matching, can reduce the loss of radiofrequency signal further.
The present invention adopts following technological means to solve the problems of the technologies described above: the encapsulating structure of a kind of radio frequency chip and passive device thereof, comprise plastic-sealed body (4) and RDL wiring layer (5) again, described RDL again wiring layer (5) is arranged on the surface of plastic-sealed body (4), and radio frequency chip (1) and passive device (2) plastic packaging are in plastic-sealed body (4).
As technical scheme concrete further, described RDL again wiring layer (5) is made up of high molecular polymer (52) and metal layer (54), high molecular polymer (52) covers the surface of whole plastic-sealed body (4), metal layer (54) is wrapped in high molecular polymer (52), and metal layer (54) connects port and the external circuit of radio frequency chip (1) and passive device (2).
As technical scheme concrete further, metal layer (54) comprises metallization layer (542), plated-through hole (544), and BGA pad (546), plated-through hole (544) is adopted to connect between metallization layer (542), the metallization layer (542) nearest apart from radio frequency chip (1) connects the port of radio frequency chip (1) by plated-through hole (544), the nearest metallization layer (542) of this distance radio frequency chip (1) is connected to the port of other passive devices (2) simultaneously by plated-through hole (544), the metallization layer (542) nearest apart from high molecular polymer (52) outer surface connects BGA pad (546) by plated-through hole (544), BGA pad (546) is distributed in the top layer of RDL wiring layer (5) again, described BGA pad (546) and peripheral circuit are by BGA solder ball interconnect.
As technical scheme concrete further, described metallization layer (542) is 2 ~ 3 layers.
As technical scheme concrete further, every layer of metallization layer (542) thickness is 5 ~ 8 μm.
As technical scheme concrete further, described plated-through hole (544) is highly 10 ~ 15 μm.
As technical scheme concrete further, rf signal line (8) is connected in the middle of radio frequency chip (1), the two ends of radio frequency chip (1) connect ground plane (9), the outer end of rf signal line (8) connects radio frequency pad (80), the outer end of ground plane (9) connects ground pad (90), rf signal line (8) and radio frequency pad (80) form one group of metal layer, ground plane (9) and ground pad (90) form one group of metal layer, radio frequency soldered ball (82) is had outside radio frequency pad (80), ground connection soldered ball (92) is had outside ground plane (9).
As technical scheme concrete further, interconnected by rf signal line (8) and ground plane (9) between radio frequency chip (1) or between radio frequency chip (1) and passive device (1 ').
The present invention also provides the method for packing of the encapsulating structure of a kind of radio frequency chip as described in above-mentioned any one scheme and passive device thereof, comprises the steps:
1) chip picking-up apparatus is passed through, radio frequency chip (1) and passive device (2) thereof are designed according to encapsulated circuit, in ventricumbent mode, accurately be adhered on the microscope carrier (3) that is covered with and coheres adhesive tape, and reconstruct a wafer shape on microscope carrier (3);
2) all radio frequency chips (1) on microscope carrier (3) and passive device (2) thereof are carried out plastic packaging and form wafer-shaped plastic-sealed body (4);
3) after plastic packaging completes, pass through ultraviolet lighting, wafer-shaped plastic-sealed body (4) is separated bonding from cohering adhesive tape, and clean, upset plastic-sealed body (4), plastic-sealed body (4) being faced up, plastic-sealed body (4) being faced up be bonded on microscope carrier (3), go out RDL wiring layer (5) again in plastic-sealed body (4) Surface Machining by cohering adhesive tape.
Optimize, the material of described plastic packaging adopts liquid plastic packaging material or epoxy film two kinds of modes, and liquid plastic packaging material injects a plastic packaging model by injection molding manner, and 120 DEG C of heat preservation solidification 1.5 hours, according to epoxy-plastic packaging film, be then realized by 150 DEG C of heat pressing process.
The invention has the advantages that: by the present invention, one or more radio frequency chip and relevant discrete device can be integrated in a plastic-sealed body, make single plastic-sealed body that has system level function.And eliminate the ghost effect that existing encapsulation technology is brought, and by the radio signal transmission structure of design impedance matching, the loss of radiofrequency signal can be reduced further.
RF transmitting structures design involved in the present invention and processing method are not limited only to the encapsulation of microwave radio chip in phased array radar T/R transmitting-receiving subassembly, can also be applied in the system in package of the rf chips such as mobile communication product, communication base station, car radar.
Accompanying drawing explanation
Fig. 1 is the figure reconstruction schematic diagram of wafer-shaped in embodiments of the invention.
Fig. 2 is wafer-shaped plastic-sealed body schematic diagram in embodiments of the invention.
Fig. 3 is RDL schematic wiring diagram again in embodiments of the invention.
Fig. 4 is plastic-sealed body cutting schematic diagram in embodiments of the invention.
Fig. 5 is RDL Rotating fields cross sectional representation in embodiments of the invention.
Fig. 6 is RF port vertical transfer structural representation in embodiments of the invention.
Fig. 7 is the cross sectional representation of RF port levels co-planar transmission structure in embodiments of the invention.
Fig. 8 is the vertical view that the radio frequency chip of RF port levels co-planar transmission structure in embodiments of the invention is connected with external circuit BGA.
Fig. 9 be between radio frequency chip or and passive device between co-planar transmission structure schematic top plan view.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in detail.
Refer to Fig. 1 to Fig. 4, in order to solve radio frequency chip, especially a system in package difficult problem for the radio frequency chip under high band, the present invention proposes a kind of embedded wafer-level packaging solution of passive device with fan-out-type structure, will set forth basic implementation step here with a processing case:
1) chip picking-up apparatus is passed through, radio frequency chip 1 and passive device 2 thereof are designed according to encapsulated circuit, in ventricumbent mode, is accurately adhered to be covered with and coheres on the microscope carrier 3 of adhesive tape, and on microscope carrier 3, reconstructing a wafer shape, the structure of acquisition is as shown in Figure 1;
2) all radio frequency chips 1 on microscope carrier 3 and passive device 2 thereof are carried out plastic packaging.The material of plastic packaging can adopt liquid plastic packaging material or epoxy film two kinds of modes.Liquid plastic packaging material can inject a plastic packaging model by injection molding manner, and at 120 DEG C of heat preservation solidification 1.5 hours.According to epoxy-plastic packaging film, be then realized by 150 DEG C of heat pressing process, at 150 DEG C of temperature, epoxy film has visco-plasticity feature, can by chip or device wherein coated.The structure of final acquisition as shown in Figure 2.
3) after plastic packaging completes, by ultraviolet lighting, wafer-shaped plastic-sealed body 4 is separated bonding from cohering adhesive tape, and cleans.Upset plastic-sealed body, plastic-sealed body is faced up, plastic-sealed body is faced up be bonded on microscope carrier 3 by cohering adhesive tape, by processes such as magnetron sputtering, mask lithography and accuracy electroplates, go out RDL wiring layer 5 again in plastic-sealed body 4 Surface Machining, make port interconnection or the redistribution of radio frequency chip 1 or other passive devices 2.Obtain structure as shown in Figure 3.
As shown in Figure 5, described RDL again wiring layer 5 be made up of the high molecular polymer 52 of light sensitivity and metal layer 54.High molecular polymer 52 covers the surface of whole plastic-sealed body 4, metal layer 54 is wrapped in high molecular polymer 52, metal layer 54 comprises metallization layer 542, plated-through hole 544, and BGA pad 546, described metallization layer 542 is the copper metallization layer of 5 ~ 8 μm of thickness of 2 ~ 3 layers, then adopt between layer and be highly about 10 ~ 15 μm of plated-through holes 544 and connect, the aperture of plated-through hole 544 is then designed as required.The metallization layer 542 nearest apart from radio frequency chip 1 connects the port of radio frequency chip 1 by plated-through hole 544, the nearest metallization layer 542 of this distance radio frequency chip 1 is connected to the port of other passive devices 2 simultaneously by plated-through hole 544, thus make the port interconnection of radio frequency chip 1 or other passive devices 2, the nearest metallization layer 542 of distance high molecular polymer 52 outer surface connects by plated-through hole 544 top layer that BGA pad 546, BGA pad 546 is distributed in RDL wiring layer 5 again.Described BGA pad 546 is for passing through BGA solder ball interconnect with peripheral circuit.
Described high molecular polymer 52 can select the macromolecular materials such as photosensitive PI or BCB, and the polymer such as PI or BCB are not only used for photoetching as photoresist, and also as the Supporting Media material of metal layer 54 after solidification.
4) complete RDL again after Wiring technique, adopt silicon chip cutter, wafer scale plastic-sealed body 4 is cut, finally completes embedded wafer-level packaging.Obtain structure as shown in Figure 4, this encapsulating structure comprises plastic-sealed body 4 and RDL wiring layer 5 again, and described RDL again wiring layer 5 is arranged on the surface of plastic-sealed body 4.
Two kinds of line design that this encapsulating structure is used for radio signal transmission are as described below.
1) RF port vertical transfer structure:
As shown in Figure 6, if only have radio frequency chip 1 in encapsulating structure, radio signal transmission then between the RF port one 2 of radio frequency chip 1 and encapsulating structure external circuit, reached the BGA pad 546 on RDL wiring layer 5 surface again by the plated-through hole 544 of RDL wiring layer 5 again, be transferred to external circuit by BGA pad 546 and soldered ball 100.The transmission range of this structure is the shortest, effectively can reduce loss.
2) RF port levels transmission structure:
And in some encapsulation, radiofrequency signal needs to carry out transmitting and interconnecting with other components and parts, now, then need to design the transmission that CPW co-planar waveguide carries out radiofrequency signal in RDL again wiring layer 5, namely the layer 542 that metallizes as above is needed, adopt plated-through hole 544 to connect between metallization layer 542, between radio frequency chip or between radio frequency chip and passive device, realize coplanar interconnect by metallization layer 542.
As shown in Figure 7 and Figure 8, the rf signal line 8 of CPW is connected in the middle of radio frequency chip 1, the two ends of radio frequency chip 1 connect the ground plane 9 of CPW, in order to improve signal integrity, need the characteristic impedance being regulated CPW co-planar waveguide by adjustment rf signal line 8 and the interval S of ground plane 9, make it the matches impedances with the prevention at radio-frequency port of radio frequency chip 1.The outer end of rf signal line 8 connects radio frequency pad 80, and the outer end of ground plane 9 connects ground pad 90.Rf signal line 8 and radio frequency pad 80 form one group of metal layer, and ground plane 9 and ground pad 90 form one group of metal layer.There is radio frequency soldered ball 82 outside radio frequency pad 80, outside ground plane 9, have ground connection soldered ball 92.
As shown in Figure 9, interconnected by rf signal line 8 and ground plane 9 between radio frequency chip 1 or between radio frequency chip 1 and passive device 1 '.
The foregoing is only the preferred embodiment of the invention, not in order to limit the invention, the right that patent of the present invention is stated is not limited only to above-mentioned radio signal transmission structure, and includes the differentiation structure on this transmission structure basis.Any amendment done within all spirit in the invention and principle, equivalently to replace and improvement etc., within the protection range that all should be included in the invention.
Claims (10)
1. the encapsulating structure of a radio frequency chip and passive device thereof, it is characterized in that: comprise plastic-sealed body (4) and RDL wiring layer (5) again, described RDL again wiring layer (5) is arranged on the surface of plastic-sealed body (4), and radio frequency chip (1) and passive device (2) plastic packaging are in plastic-sealed body (4).
2. the encapsulating structure of a kind of radio frequency chip as claimed in claim 1 and passive device thereof, it is characterized in that: described RDL again wiring layer (5) is made up of high molecular polymer (52) and metal layer (54), high molecular polymer (52) covers the surface of whole plastic-sealed body (4), metal layer (54) is wrapped in high molecular polymer (52), and metal layer (54) connects port and the external circuit of radio frequency chip (1) and passive device (2).
3. the encapsulating structure of a kind of radio frequency chip as claimed in claim 2 and passive device thereof, it is characterized in that: metal layer (54) comprises metallization layer (542), plated-through hole (544), and BGA pad (546), plated-through hole (544) is adopted to connect between metallization layer (542), the metallization layer (542) nearest apart from radio frequency chip (1) connects the port of radio frequency chip (1) by plated-through hole (544), the nearest metallization layer (542) of this distance radio frequency chip (1) is connected to the port of other passive devices (2) simultaneously by plated-through hole (544), the metallization layer (542) nearest apart from high molecular polymer (52) outer surface connects BGA pad (546) by plated-through hole (544), BGA pad (546) is distributed in the top layer of RDL wiring layer (5) again, described BGA pad (546) and peripheral circuit are by BGA solder ball interconnect.
4. the encapsulating structure of a kind of radio frequency chip as claimed in claim 3 and passive device thereof, is characterized in that: described metallization layer (542) is 2 ~ 3 layers.
5. the encapsulating structure of a kind of radio frequency chip as claimed in claim 3 and passive device thereof, is characterized in that: every layer of metallization layer (542) thickness is 5 ~ 8 μm.
6. the encapsulating structure of a kind of radio frequency chip as claimed in claim 3 and passive device thereof, is characterized in that: described plated-through hole (544) is highly 10 ~ 15 μm.
7. the encapsulating structure of a kind of radio frequency chip as claimed in claim 2 and passive device thereof, it is characterized in that: in the middle of radio frequency chip (1), connect rf signal line (8), the two ends of radio frequency chip (1) connect ground plane (9), the outer end of rf signal line (8) connects radio frequency pad (80), the outer end of ground plane (9) connects ground pad (90), rf signal line (8) and radio frequency pad (80) form one group of metal layer, ground plane (9) and ground pad (90) form one group of metal layer, radio frequency soldered ball (82) is had outside radio frequency pad (80), ground connection soldered ball (92) is had outside ground plane (9).
8. the encapsulating structure of a kind of radio frequency chip as claimed in claim 7 and passive device thereof, is characterized in that: interconnected by rf signal line (8) and ground plane (9) between radio frequency chip (1) or between radio frequency chip (1) and passive device (1 ').
9. a method for packing for the radio frequency chip as described in any one of claim 1 to 8 and the encapsulating structure of passive device thereof, is characterized in that: comprise the steps:
1) chip picking-up apparatus is passed through, radio frequency chip (1) and passive device (2) thereof are designed according to encapsulated circuit, in ventricumbent mode, accurately be adhered on the microscope carrier (3) that is covered with and coheres adhesive tape, and reconstruct a wafer shape on microscope carrier (3);
2) all radio frequency chips (1) on microscope carrier (3) and passive device (2) thereof are carried out plastic packaging and form wafer-shaped plastic-sealed body (4);
3) after plastic packaging completes, pass through ultraviolet lighting, wafer-shaped plastic-sealed body (4) is separated bonding from cohering adhesive tape, and clean, upset plastic-sealed body (4), plastic-sealed body (4) being faced up, plastic-sealed body (4) being faced up be bonded on microscope carrier (3), go out RDL wiring layer (5) again in plastic-sealed body (4) Surface Machining by cohering adhesive tape.
10. the method for packing of the encapsulating structure of radio frequency chip as claimed in claim 9 and passive device thereof, it is characterized in that: the material of described plastic packaging adopts liquid plastic packaging material or epoxy film two kinds of modes, liquid plastic packaging material injects a plastic packaging model by injection molding manner, and 120 DEG C of heat preservation solidification 1.5 hours, according to epoxy-plastic packaging film, be then realized by 150 DEG C of heat pressing process.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510661103.7A CN105161468A (en) | 2015-10-10 | 2015-10-10 | Radio frequency chip and passive device packaging structure and packaging method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201510661103.7A CN105161468A (en) | 2015-10-10 | 2015-10-10 | Radio frequency chip and passive device packaging structure and packaging method |
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CN105807265A (en) * | 2016-05-13 | 2016-07-27 | 中国电子科技集团公司第五十八研究所 | Miniaturized high-performance altimeter signal processing and control SIP module |
CN105810647A (en) * | 2016-04-22 | 2016-07-27 | 宜确半导体(苏州)有限公司 | Radio-frequency switch integration module and integration method thereof, and radio-frequency front-end integrated circuit |
CN106601702A (en) * | 2017-01-23 | 2017-04-26 | 合肥雷诚微电子有限责任公司 | Multi-chip linear power amplification structure without substrate and with high heat dissipation and manufacturing method thereof |
CN108447852A (en) * | 2018-04-19 | 2018-08-24 | 加特兰微电子科技(上海)有限公司 | A kind of millimeter wave chip-packaging structure and printed circuit board |
CN109473404A (en) * | 2018-12-06 | 2019-03-15 | 麦堆微电子技术(上海)有限公司 | A kind of microwave chip encapsulating structure |
CN110379778A (en) * | 2019-07-23 | 2019-10-25 | 杭州晶通科技有限公司 | A kind of low-loss radio frequency chip encapsulation and matched PCB |
CN111785700A (en) * | 2020-09-07 | 2020-10-16 | 成都知融科技股份有限公司 | Ultra-wideband interconnection structure |
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CN105810647A (en) * | 2016-04-22 | 2016-07-27 | 宜确半导体(苏州)有限公司 | Radio-frequency switch integration module and integration method thereof, and radio-frequency front-end integrated circuit |
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CN110379778A (en) * | 2019-07-23 | 2019-10-25 | 杭州晶通科技有限公司 | A kind of low-loss radio frequency chip encapsulation and matched PCB |
CN111785700A (en) * | 2020-09-07 | 2020-10-16 | 成都知融科技股份有限公司 | Ultra-wideband interconnection structure |
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