CN105161133B - Shift register and output signal pull-down method thereof - Google Patents
Shift register and output signal pull-down method thereof Download PDFInfo
- Publication number
- CN105161133B CN105161133B CN201510507103.1A CN201510507103A CN105161133B CN 105161133 B CN105161133 B CN 105161133B CN 201510507103 A CN201510507103 A CN 201510507103A CN 105161133 B CN105161133 B CN 105161133B
- Authority
- CN
- China
- Prior art keywords
- transistor
- clock signal
- signal
- drop
- pull
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 17
- 230000008878 coupling Effects 0.000 claims description 32
- 238000010168 coupling process Methods 0.000 claims description 32
- 238000005859 coupling reaction Methods 0.000 claims description 32
- 239000003990 capacitor Substances 0.000 claims description 31
- 239000000725 suspension Substances 0.000 claims description 25
- 230000005611 electricity Effects 0.000 claims description 12
- 239000013078 crystal Substances 0.000 claims description 4
- 238000007667 floating Methods 0.000 abstract description 12
- 230000000087 stabilizing effect Effects 0.000 description 25
- 238000010586 diagram Methods 0.000 description 12
- 210000001367 artery Anatomy 0.000 description 3
- 210000003462 vein Anatomy 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000002860 competitive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Logic Circuits (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention provides a shift register which receives an input signal and generates an output signal according to a first operation clock signal. The master pull-down control circuit receives an input signal, a pull-down clock signal and a reference potential and outputs a pull-down control signal. The first auxiliary pull-down control circuit is electrically connected to the main pull-down control circuit and receives a reference potential, and is used for controlling the pull-down control signal to be in floating connection. The second auxiliary pull-down control circuit receives the pull-down clock signal and the first operation clock signal, and is used for pulling up the potential of the floating pull-down control signal. The pull-down circuit receives the pull-down control signal after the pull-up potential and pulls down the potentials of the input signal and the output signal to the reference potential according to the pull-down control signal after the pull-up potential.
Description
Technical field
The invention relates to a kind of shift registors, in particular under a kind of shift registor and its output signal
Pulling method.
Background technique
Panel industry it is increasingly competitive under, target that each panel vendor is pursued is nothing more than being exactly frivolous short
It is small, and if it is intended to panel is made to achieve the effect that narrow frame, gate driving circuit (gate driver IC) is integrated into glass
A preferable technical solution on substrate, thus based on narrow frame and low cost consider under, GOA (gate driver
On array) it is increasingly becoming the technology that each panel vendor is studied.In general, shift registor now is according to defeated
Enter the operation clock signal of signal and high frequency and generate output signal, however, when next stage shift registor is generated and exported
After the output signal, output signal caused by the shift registor of upper level ideally should be quasi- in logic low
Position, but due to being influenced by between high-frequency operation clock signal or other signals in unexpected coupling, it may
So that output signal can not be stably maintained at the state of logic low level, thus in order to reduce the operation clock signal of high frequency or
It is to influence the stability of output signal in the noise that unexpected coupling generates between other signals, it generally all can be
The state that the stable output signal is maintained logic low level by multiple pull-down circuits is configured in shift registor.
Traditional shift registor is configured with two groups of pull-down circuits, and complementary during operation each by receiving two groups
Low frequency signal pulls down control signal as it, however the voltage quasi position of the drop-down control signal under such design will be limited
System is in the received ceiling voltage level of entire circuit institute, in this case, if it is desired that pull-down circuit has more good drive
Kinetic force, general way are the rulers for increasing the transistor for being used to do the output signal pulling operation in pull-down circuit
It is very little, however such way is other than needing bigger layout area, at the same may also can make shift registor operation when
It waits and generates more leakage currents.Accordingly, how under the premise of size for not increasing the transistor inside pull-down circuit, still
The driving capability of pull-down circuit is able to ascend so that the output signal of shift registor is more stable, becomes and endeavours for various manufacturers
The target of research.
Summary of the invention
The present invention provides a kind of shift registor, has more preferably output signal pull-down capability, and do not need under increase
Transistor size in puller circuit.
The present invention separately provides a kind of output signal pulldown method of shift registor, and it is temporary that the method is suitable for above-mentioned displacement
Storage.
A kind of shift registor proposed by the present invention is produced to receive input signal and the first operation clock signal
Raw output signal, the shift registor include under main pull-down control circuit, the first auxiliary pull-down control circuit, the second auxiliary
Draw control circuit and pull-down circuit.Main pull-down control circuit is to receive input signal, drop-down clock signal and with reference to electricity
Position, and export drop-down control signal.First auxiliary pull-down control circuit is electrically connected to main pull-down control circuit and receives with reference to electricity
Position.First auxiliary pull-down control circuit is suspension joint to control drop-down control signal.Second auxiliary pull-down control circuit is to connect
It accepts and draws clock signal and the first operation clock signal.Second auxiliary pull-down control circuit is controlled to draw high the drop-down of suspension joint
The current potential of signal.Pull-down circuit to receive and according to draw high the control signal of the drop-down after current potential and by input signal and output
The current potential of signal is pulled down to reference potential.
In one embodiment of this invention, the second auxiliary pull-down circuit in above-mentioned shift registor includes coupling control
Transistor and coupled capacitor.The control terminal of coupling control transistor receives drop-down clock signal, and the of coupling control transistor
One end receives the first operation clock signal, and the first end of coupled capacitor is electrically connected to the second end of coupling control transistor, coupling
The second end of capacitor receives drop-down control signal.When pulling down clock signal and the first operation clock signal is enabled, coupling
The current potential coupling that control transistor controls coupled capacitor operates clock signal for first will pass through the coupling of coupled capacitor
The second end of coupled capacitor is bonded to draw high the current potential of the drop-down control signal of suspension joint.
In one embodiment of this invention, the main pull-down control circuit in above-mentioned shift registor includes first crystal
Pipe, second transistor, third transistor and the 4th transistor.The first of the control terminal of the first transistor and the first transistor
Termination accepts drawing clock signal.The control terminal of second transistor receives input signal, and the first end of second transistor is electrically connected to
The second end of the second end of the first transistor, second transistor receives reference potential.The control terminal of third transistor is electrically connected to
The second end of the first transistor, the first end of third transistor receive drop-down clock signal.The control terminal of 4th transistor receives
Input signal, the first end of the 4th transistor are electrically connected to the second end of third transistor, and the second end of the 4th transistor receives
Reference potential.When drop-down clock signal is enabled, the second end output drop-down control signal of third transistor.
In one embodiment of this invention, the first above-mentioned auxiliary pull-down control circuit includes the 5th transistor.5th is brilliant
The control terminal of body pipe receives the first operation clock signal, and the first end of the 5th transistor is electrically connected to the control of third transistor
End, the second end of the 5th transistor receive reference potential, and the 5th transistor operates clock signal according to first and ends third crystalline substance
Body pipe is so that drop-down control signal is suspension joint.
In an alternative embodiment of the invention, the first above-mentioned auxiliary pull-down control circuit further includes the 6th transistor.6th
The control terminal of transistor receives the second operation clock signal, and the first end of the 6th transistor is electrically connected to the first of the 5th transistor
End, the second end of the 6th transistor receive reference potential, and the second operation clock signal is enabled earlier than the first operation clock signal,
6th transistor operates clock signal according to second and first ends third transistor before the 5th transistor so that drop-down controls
Signal is suspension joint.
In another embodiment of the present invention, the first above-mentioned auxiliary pull-down control circuit includes the 5th transistor, the 6th
Transistor, the 7th transistor and the 8th transistor.The first end of 5th transistor is electrically connected to the control terminal of third transistor,
The second end of 5th transistor receives reference potential, and the first end of the control terminal of the 6th transistor and the 6th transistor receives the
One operation clock signal, the second end of the 6th transistor are electrically connected to the control terminal of the 5th transistor, the control of the 7th transistor
The first end of end and the 7th transistor receives the second operation clock signal, and the second end of the 7th transistor is electrically connected the 5th crystal
The control terminal of pipe, the control terminal of the 8th transistor receive third and operate clock signal, the first end electrical connection of the 8th transistor the
The control terminal of five transistors, the second end of the 8th transistor receive reference potential, and the second operation clock signal is earlier than described first
Operation clock signal is enabled, and third operation clock signal is later than the first operation clock signal and is enabled, the 6th transistor and
7th transistor operates clock signal and the second operation clock signal according to first respectively and the 5th transistor is connected, and cuts whereby
Only third transistor is so that drop-down control signal is suspension joint.
A kind of output signal pulldown method of shift registor proposed by the present invention is suitable for including main drop-down control electricity
Road, first assist pull-down control circuit, second to assist the shift registor of pull-down control circuit and pull-down circuit, the second auxiliary
Pull-down control circuit includes coupling control transistor, coupled capacitor, output signal of the pull-down circuit to receive shift registor
And reference potential, the output signal pulldown method include the following steps: that providing drop-down clock signal to main drop-down controls
Circuit is so that main pull-down control circuit output drop-down control signal；The first operation clock signal is provided to the first auxiliary drop-down control
Circuit is provided to coupling control to control drop-down control signal as suspension joint, and by drop-down clock signal and the first operation clock signal
Transistor processed controls coupled capacitor, will pass through the coupling of coupled capacitor by the current potential of the drop-down control signal of suspension joint
It draws high；And the output signal of shift registor is pulled down to by pull-down circuit according to the drop-down control signal after drawing high current potential
Reference potential.
The present invention passes through the first auxiliary pull-down control circuit because using above-mentioned circuit framework with output signal pulldown method
Drop-down that main pull-down control circuit is exported control signal control as suspension joint, then passes through second and assists in pull-down control circuit
Coupled capacitor by the voltage boost of the drop-down control signal of suspension joint to being more than the received ceiling voltage level of entire circuit institute, because
This, which draws high the control signal of the drop-down after current potential, can more effectively drive pull-down circuit, and not need to increase in pull-down circuit
The size of transistor.
Detailed description of the invention
Fig. 1 is the block diagram of the shift registor of one embodiment of the invention；
Fig. 2 is the timing diagram of the shift registor of one embodiment of the invention.
Fig. 3 is the circuit diagram of the shift registor of one embodiment of the invention；
Fig. 4 is the circuit diagram of the Voltage stabilizing module of another embodiment of the present invention；
Fig. 5 is the timing diagram of the operation clock signal of one embodiment of the invention；
Fig. 6 is the circuit diagram of the Voltage stabilizing module of further embodiment of this invention；
Fig. 7 is the flow chart of the output signal pulldown method of one embodiment of the invention.
Drawing reference numeral explanation
100: shift registor
101,102,401,601: Voltage stabilizing module
10-1,10-2: main pull-down control circuit
11-1,11-2: the first auxiliary pull-down control circuit
12-1,12-2: the second auxiliary pull-down control circuit
13-1,13-2: pull-down circuit
Ta, Tb, Tc, Td, T32, T42, T51, T52, T53, T55, T56, T57, T58, T59: transistor
T51-1, T52-1, T53-1, T54-1, T55-1, T56-1, T57-1, T58-1, T59-1: first end
T51-2, T52-2, T53-2, T54-2, T55-2, T56-2, T57-2, T58-2, T59-2: second end
T51-3, T52-3, T53-3, T54-3, T55-3, T56-3, T57-3, T58-3, T59-3: control terminal
Ca, Cc: capacitor
VSS: reference potential
Q (n), Q (n+2): input signal
G (n), G (n+4): output signal
HC (n-1), HC (n), HC (n+2), HC1, HC2, HC3, HC4: operation clock signal
LC1, LC2: drop-down clock signal
P (n), K (n): drop-down control signal
S701, S702, S703: step
VH, VL, VQ, VH ': current potential
Specific embodiment
Fig. 1 is the block diagram of the shift registor of one embodiment of the invention.As shown in Figure 1, shift registor 100 includes steady
Die block 101, Voltage stabilizing module 102, capacitor Ca, transistor Ta, transistor Tb, transistor Tc and transistor Td.Transistor Ta
Output signal G (n) is generated according to the received input signal Q (n) of institute and the first operation clock signal HC (n), transistor Tb
According to the output signal G (n+4) of the received input signal Q (n) of institute and rear level Four by the drop-down of the current potential of transistor Ta grid end
It is positive integer to reference potential VSS, n.Transistor Tc operates clock signal for first according to the received input signal Q (n) of institute
HC (n) is sent to the grid end of transistor Td, so that output signal G (n) is sent to the shift registor of rear second level by transistor Td
(the non-formula of figure) is with the input signal Q (n+2) of the shift registor as rear second level.
Hold above-mentioned, Voltage stabilizing module 101 includes main pull-down control circuit 10-1, the first auxiliary pull-down control circuit 11-1, the
Two auxiliary pull-down control circuit 12-1 and pull-down circuit 13-1.Main pull-down control circuit 10-1 is to receive input signal Q
(n), clock signal LC1 and reference potential VSS is pulled down, and exports drop-down control signal P (n).First auxiliary drop-down control electricity
Road 11-1 is electrically connected to main pull-down control circuit 10-1 and receives reference potential VSS.First auxiliary pull-down control circuit 11-1 is used
Controlling drop-down control signal P (n) for floating.Second auxiliary pull-down control circuit 12-1 is to receive drop-down clock pulse letter
The operation of number LC1 and first clock signal HC (n).Second auxiliary pull-down control circuit 12-1 is in floating to draw high
The current potential of drop-down control signal P (n).Pull-down circuit 13-1 is to receive and according to drawing high the control of the drop-down after current potential signal P (n)
And the current potential of input signal Q (n) and output signal G (n) is pulled down to reference potential VSS.
Similarly, Voltage stabilizing module 102 includes main pull-down control circuit 10-2, the first auxiliary pull-down control circuit 11-2, the
Two auxiliary pull-down control circuit 12-2 and pull-down circuit 13-2.Main pull-down control circuit 10-2 is to receive input signal Q
(n), clock signal LC2 and reference potential VSS is pulled down, and exports drop-down control signal K (n).First auxiliary drop-down control electricity
Road 11-2 is electrically connected to main pull-down control circuit 10-2 and receives reference potential VSS.First auxiliary pull-down control circuit 11-2 is used
Controlling drop-down control signal K (n) for floating.Second auxiliary pull-down control circuit 12-2 is to receive drop-down clock pulse letter
The operation of number LC2 and first clock signal HC (n).Second auxiliary pull-down control circuit 12-2 is in floating to draw high
The current potential of drop-down control signal K (n).Pull-down circuit 13-2 is to receive and according to drawing high the control of the drop-down after current potential signal K (n)
And the current potential of input signal Q (n) and output signal G (n) is pulled down to reference potential VSS.
Fig. 2 is the timing diagram of the shift registor of one embodiment of the invention.As shown in Fig. 2, drop-down clock signal LC1 and
The enabled period for pulling down clock signal LC2 is complementary, that is to say, that drop-down clock signal LC1 and drop-down clock signal LC2 to
Voltage stabilizing module 101 and Voltage stabilizing module 102 are driven in turn, reduce the behaviour of Voltage stabilizing module 101 and Voltage stabilizing module 102 respectively whereby
It bears.In certain embodiments, the duty cycle for pulling down clock signal LC1 and drop-down clock signal LC2 can be designed as greatly
In 50%, therefore the enabled period of both time of some can overlap each other, and thus may insure Voltage stabilizing module 101
And at least one of Voltage stabilizing module 102 is in running order, and promotes the reliability of shift registor 100 operationally whereby.
In addition to this, it pulls down clock signal LC1 and pulls down the enabled period of clock signal LC2 greater than the first operation clock signal HC
(n) enabled period.
Fig. 1 and Fig. 2 is please referred to, when shift registor 100 receives input signal Q (n) but not yet receives the first operation
During arteries and veins HC (n), input signal Q (n) has current potential VQ, and when shift registor 100 receives the first operation clock pulse HC (n)
Period, the current potential of output signal G (n) can be gradually pulled up to the current potential VH of the first operation clock pulse HC (n) by transistor Ta,
Current potential VH is promoted to by current potential VQ by the coupling input signal Q (n) of capacitor Ca at this time, in input signal Q (n) and output
During signal G (n) is enabled, drop-down control signal P (n) and K (n) be in low potential VL and be forbidden energy state.Work as input
When signal Q (n) and output signal G (n) is the disabled state of low potential VL, voltage regulator circuit 101 and voltage regulator circuit 102 are distinguished
Drop-down clock signal LC1 and drop-down clock signal LC2 is received, by taking voltage regulator circuit 101 as an example, when voltage regulator circuit 101 not yet connects
During receiving the first operation clock signal HC (n), the drop-down that main pull-down control circuit 10-1 is exported at this time controls signal P (n)
For high potential VH, and during voltage regulator circuit 101 receives the first operation clock signal HC (n), the drop-down control of high potential at this time
Signal P (n) processed by the first auxiliary pull-down circuit 11-1 control and be floating, the electricity of the drop-down of suspension joint control signal P (n)
Position can be pulled up to current potential VH ' by the second auxiliary pull-down circuit 12-1, and the current potential VH ' after drawing high is essentially without drawing high
When twice of current potential VH, drop-down control signal P (n) after drawing high current potential can make pull-down circuit 13-1 more quickly will input
Signal Q (n) and output signal G (n) is pulled down to reference potential VSS.
Next it will be described in detail the circuit framework of each circuit in Voltage stabilizing module 101.Due to Voltage stabilizing module 102 and surely
The circuit framework of die block 101 is substantially the same, difference both be only that receive respectively different drop-down clock signal LC1 and
Clock signal LC2 is pulled down, therefore detailed circuit framework repeats no more omission in Voltage stabilizing module 102.
Fig. 3 is the circuit diagram of the shift registor of one embodiment of the invention.Referring to figure 2. and Fig. 3 reads following theory
It is bright.As shown in figure 3, main pull-down control circuit 10-1 includes the first transistor T51, second transistor T52, third transistor T53
And the 4th transistor T54.The first end T51-1 of the control terminal T51-3 and the first transistor T51 of the first transistor T51 connect
It accepts and draws clock signal LC1.The control terminal T52-3 of second transistor T52 receives input signal Q (n), second transistor T52's
First end T52-1 is electrically connected to the second end T51-2 of the first transistor T51, and the second end T52-2 of second transistor T52 is received
Reference potential VSS.The control terminal T53-3 of third transistor T53 is electrically connected to the second end T51-2 of the first transistor T51, third
The first end T53-1 of transistor T53 receives drop-down clock signal LC1.The control terminal T54-3 of 4th transistor T54 receives input
The first end T54-1 of signal Q (n), the 4th transistor T54 are electrically connected to the second end T53-2 of third transistor T53, and the 4th is brilliant
The second end T54-2 of body pipe T54 receives reference potential VSS.When drop-down clock signal LC1 is enabled, third transistor T53's
Second end T53-2 output drop-down control signal P (n).
Please continue to refer to Fig. 2 and Fig. 3, the first auxiliary pull-down control circuit 11-1 includes the 5th transistor T55, and the 5th is brilliant
The control terminal T55-3 of body pipe T55 receives the first operation clock signal HC (n), and the first end T55-1 of the 5th transistor T55 is electrically connected
It is connected to the control terminal T53-3 of third transistor T53, the second end T55-2 of the 5th transistor receives reference potential VSS, and the 5th is brilliant
Body pipe T55 ends third transistor T53 so that drop-down control signal P (n) is floating according to the first operation clock signal HC (n)
It connects.Second auxiliary pull-down control circuit includes coupling control transistor T56 and coupled capacitor Cc.Coupling control transistor T56
Control terminal T56-3 receive drop-down clock signal LC1, coupling control transistor T56 first end T56-1 receive first operation when
Arteries and veins signal HC (n).Wherein one end of coupled capacitor Cc is electrically connected to the second end T56-2 of coupling control transistor T56, coupling electricity
The other end for holding Cc receives drop-down control signal P (n), when the operation of drop-down clock signal LC1 and first clock signal HC (n)
When being enabled, coupling control transistor T56 control coupled capacitor Cc is by the current potential of the first operation clock signal HC (n) by coupling electricity
The wherein one end for holding Cc is coupled to the other end of coupled capacitor Cc, to draw high the electricity of drop-down control signal P (n) of suspension joint whereby
Position.As previously described, since the current potential VH ' after drawing high is essentially twice for drawing high prepotential, pull-down circuit can be made
Transistor T42 and transistor T32 in 13-1 can be switched on more quickly, therefore can be more quickly by input signal Q
(n) and output signal G (n) is pulled down to reference potential VSS.
Fig. 4 is the circuit diagram of the Voltage stabilizing module of another embodiment of the present invention.Identical label indicates among Fig. 3 and Fig. 4
Identical element or signal.As shown in figure 4, the difference is that only between Voltage stabilizing module 401 and Voltage stabilizing module above-mentioned 101
The first auxiliary pull-down control circuit 41-1 in Voltage stabilizing module 401 has further included the 6th transistor T57.6th transistor T57's
Control terminal T57-3 receives the second operation clock signal HC (n-1), and the first end T57-1 of the 6th transistor T57 is electrically connected to the 5th
The second end T57-2 of the first end T55-1, the 6th transistor T57 of transistor T55 receive reference potential VSS.Second operation clock pulse
Signal HC (n-1) is enabled earlier than the first operation clock signal HC (n), and the 6th transistor T57 operates clock signal according to second
HC (n-1) and first end third transistor T53 before the 5th transistor T55 so that drop-down control signal be suspension joint.
Fig. 5 is the timing diagram of the operation clock signal of one embodiment of the invention.As shown in fig. 5, it is assumed that n is equal to 2, then operate
Clock signal HC1 is enabled earlier than operation clock signal HC2, and operates enabled period and the operation clock pulse letter of clock signal HC1
The enabled period of number HC2 partly overlaps.It please cooperate referring to Fig. 4 and Fig. 5, operate the work phase of clock pulse HC1 in the present embodiment
Between substantially have 50% with operation clock pulse HC2 work during it is be overlapped, therefore can in advance will drop-down control signal P (n) control
For floating, will thus may insure Voltage stabilizing module 401 when receiving operation clock signal HC2, immediately
Drop-down control signal P (n) is pulled up to VH ' by current potential VH by coupled capacitor Cc.
Fig. 6 is the circuit diagram of the Voltage stabilizing module of further embodiment of this invention.Identical label indicates among Fig. 4 and Fig. 6
Identical element or signal.As shown in fig. 6, the difference is that only between Voltage stabilizing module 601 and Voltage stabilizing module above-mentioned 401
The first auxiliary pull-down control circuit 61-1 in Voltage stabilizing module 601 has further included the 7th transistor T58 and the 8th transistor
T59.The first end T55-1 of 5th transistor T55 is electrically connected to the control terminal T53-3 of third transistor T53, the 5th transistor
The second end of T55 receives reference potential VSS.The first of the control terminal T57-3 and the 6th transistor T57 of 6th transistor T57
T57-1 is held to receive the first operation clock signal HC (n), the second end T57-2 of the 6th transistor T57 is electrically connected to the 5th transistor
The control terminal T55-3 of T55.The first end T58-1 of the control terminal T58-3 and the 7th transistor T58 of 7th transistor T58 are received
Second operation clock signal HC (n-1), the second end T58-2 of the 7th transistor T58 are electrically connected the control terminal of the 5th transistor T55
T55-3.The control terminal T59-3 of 8th transistor T59 receives third operation clock signal HC (n+2), and the of the 8th transistor T59
One end T59-1 is electrically connected the control terminal T55-3 of the 5th transistor T55, and the second end T59-2 of the 8th transistor T59 receives reference
Current potential VSS.
Hold it is above-mentioned, second operation clock signal HC (n-1) earlier than first operation clock signal HC (n) is enabled, third behaviour
Make clock signal HC (n+2) and be later than the first operation clock signal HC (n) to be enabled.6th transistor T57 and the 7th transistor
The 5th transistor is connected according to the first operation clock signal HC (n) and the second operation clock signal HC (n-1) respectively in T58
T55 ends third transistor T53 whereby so that drop-down control signal P (n) is suspension joint.In addition to this, the second operation clock signal
The enabled period of HC (n-1) is Chong Die with the first operation enabled period of clock signal HC (n), and third operates clock signal HC (n
+ 2) enabled period is not Chong Die with the first operation enabled period of clock signal HC (n).
Referring to figure 5. and Fig. 6 reads the following description.As shown in fig. 5, it is assumed that n is equal to 2, then clock signal is operated
HC1, operation clock signal HC2 and operation clock signal HC4 are sequentially enabled, and in the present embodiment, operate clock signal
It is essentially 50% overlapping during the work of HC1 and operation clock signal HC2, therefore the 7th transistor T58 can be led in advance
Lead to the 5th transistor T55 and "off" transistor T53 and make drop-down control signal P (n) in advance in floating, to ensure pressure stabilizing
Drop-down immediately can be controlled signal P by coupled capacitor Cc when receiving operation clock signal HC2 by module 601
(n) VH ' is pulled up to by current potential VH, and since operation clock signal HC4 is enabled after operation clock pulse HC2, it can
Make the 8th transistor T59 in operation arteries and veins HC2 disabled state when end the 5th transistor T55 in time, and make pull down control
Signal P (n) is not at floating.
Fig. 7 is the flow chart of the output signal pulldown method of one embodiment of the invention.As shown in fig. 7, displacement above-mentioned is temporary
The output signal pulling operation of storage can summarize a kind of pulldown method of output signal, and the method is suitable for foregoing
Shift registor, the method include step S701~S703.Step S701: drop-down clock signal is provided to main pull-down control circuit
So that main pull-down control circuit output drop-down control signal.Step S702: it provides under the first operation clock signal to the first auxiliary
It draws control circuit to control drop-down control signal as suspension joint, and drop-down clock signal and the first operation clock signal is provided to
Coupling controls transistor to control coupled capacitor, and the drop-down of suspension joint is controlled signal will pass through the coupling of coupled capacitor
Voltage boost.Step S703: pull-down circuit according to draw high the control signal of the drop-down after current potential and by shift registor
Output signal is pulled down to reference potential.
In conclusion the present invention realizes shift registor by above-mentioned various circuit frameworks, above-mentioned operation is cooperated to walk
Suddenly, the first auxiliary pull-down control circuit is first passed through to control the drop-down control signal that main pull-down control circuit is exported for suspension joint
Drop-down in floating is then controlled the electricity of signal by state by the coupled capacitor in the second auxiliary pull-down control circuit
Position is drawn high, and will can thus make the current potential of drop-down control signal can be more than the received highest of integrated circuit institute after drawing high
Current potential, therefore do not need to increase the transistor size in pull-down circuit, the signal pull-down capability of pull-down circuit can also be promoted, is made
Obtaining pull-down circuit more rapidly can be pulled down to reference potential for the output signal of shift registor, to ensure shift registor
Output stablize.
Although the present invention has been disclosed as a preferred embodiment, however, it is not to limit the invention, any to be familiar with this skill
Skill person, without departing from the spirit and scope of the present invention, when can make some changes and embellishment, therefore protection scope of the present invention
Subject to being defined depending on claim.
Claims (11)
1. a kind of shift registor, which is characterized in that receive and according to an input signal and one first operation clock signal and
An output signal is exported, the shift registor includes:
One main pull-down control circuit, to receive the input signal, an a drop-down clock signal and reference potential, and to
One drop-down control signal of output；
One first auxiliary pull-down control circuit, is electrically connected to the main pull-down control circuit and to receive the reference potential,
The first auxiliary pull-down control circuit is suspension joint to control the drop-down control signal；
One second auxiliary pull-down control circuit, to receive the drop-down clock signal and the first operation clock signal,
The second auxiliary pull-down control circuit controls the current potential of signal to draw high the drop-down of suspension joint；And
One pull-down circuit, to receive and according to draw high the control signal of the drop-down after current potential and by the input signal and
The current potential of the output signal is pulled down to the reference potential.
2. shift registor as described in claim 1, which is characterized in that the second auxiliary pull-down control circuit includes a coupling
Control transistor and a coupled capacitor are closed, a control terminal of the coupling control transistor receives the drop-down clock signal,
One first end of the coupling control transistor receives the first operation clock signal, the first end electricity of the coupled capacitor
It is connected to a second end of the coupling control transistor, a second end of the coupled capacitor receives the drop-down control letter
Number, when the drop-down clock signal and the first operation clock signal are enabled, coupling control transistor controls
The ground that the coupled capacitor operates clock signal for described first will pass through the coupling of the coupled capacitor
The current potential of the drop-down control signal of suspension joint is drawn high to the second end of the coupled capacitor.
3. shift registor as described in claim 1, which is characterized in that the main pull-down control circuit includes a first crystal
Pipe, a second transistor, a third transistor and one the 4th transistor, a control terminal of the first transistor and described
One first end of the first transistor receives the drop-down clock signal, and a control terminal of the second transistor receives the input
One first end of signal, the second transistor is electrically connected to a second end of the first transistor, the second transistor
A second end receive the reference potential, a control terminal of the third transistor is electrically connected to the institute of the first transistor
Second end is stated, a first end of the third transistor receives the drop-down clock signal, a control of the 4th transistor
End receives the input signal, and a first end of the 4th transistor is electrically connected to a second end of the third transistor,
One second end of the 4th transistor receives the reference potential, when the drop-down clock signal is enabled, the third
The second end of transistor exports the drop-down and controls signal.
4. shift registor as claimed in claim 3, which is characterized in that the first auxiliary pull-down control circuit includes one the
Five transistors, the control terminal reception of the 5th transistor the first operation clock signal, the one of the 5th transistor
First end is electrically connected to the control terminal of the third transistor, and a second end of the 5th transistor receives the reference
Current potential, the 5th transistor end the third transistor so that the drop-down is controlled according to the first operation clock signal
Signal processed is suspension joint.
5. shift registor as claimed in claim 4, which is characterized in that the first auxiliary pull-down control circuit further includes one
6th transistor, the one second operation clock signal of control terminal reception of the 6th transistor, the one of the 6th transistor
First end is electrically connected to the first end of the 5th transistor, and a second end of the 6th transistor receives the reference
Current potential, the second operation clock signal are enabled earlier than the first operation clock signal, and the 6th transistor is according to institute
It states the second operation clock signal and first ends the third transistor before the 5th transistor so that the drop-down controls
Signal is suspension joint.
6. shift registor as claimed in claim 5, which is characterized in that it is described second operation clock signal enabled period with
The enabled period of the first operation clock signal partly overlaps.
7. shift registor as claimed in claim 3, which is characterized in that the first auxiliary pull-down control circuit includes one the
Five transistors, one the 6th transistor, one the 7th transistor and one the 8th transistor, the first end electricity of the 5th transistor
It is connected to the control terminal of the third transistor, a second end of the 5th transistor receives the reference potential, institute
One first end of a control terminal and the 6th transistor for stating the 6th transistor receives the first operation clock signal, institute
The second end for stating the 6th transistor is electrically connected to a control terminal of the 5th transistor, a control of the 7th transistor
One first end of end and the 7th transistor receives one second operation clock signal, a second end of the 7th transistor
It is electrically connected the control terminal of the 5th transistor, a control terminal of the 8th transistor receives third operation clock pulse letter
Number, a first end of the 8th transistor is electrically connected the control terminal of the 5th transistor, the 8th transistor
One second end receives the reference potential, and the second operation clock signal is enabled earlier than the first operation clock signal,
The third operation clock signal is later than the first operation clock signal and is enabled, the 6th transistor and the described 7th
The 5th crystal is connected according to the first operation clock signal and the second operation clock signal respectively in transistor
Pipe ends the third transistor so that drop-down control signal is suspension joint whereby.
8. shift registor as claimed in claim 7, which is characterized in that it is described second operation clock signal enabled period with
The enabled period of the first operation clock signal partly overlaps, the enabled period of third operation clock signal not with it is described
The overlapping of enabled period of first operation clock signal.
9. shift registor as described in claim 1, which is characterized in that current potential of the drop-down control signal after drawing high
It is essentially the drop-down control signal without twice when drawing high.
10. a kind of output signal pulldown method of shift registor, which is characterized in that the shift registor includes a main drop-down
Control circuit, one first auxiliary pull-down control circuit, one second auxiliary pull-down control circuit and a pull-down circuit, described second
Assisting pull-down control circuit includes a coupling control transistor and a coupled capacitor, and the pull-down circuit is to receive the shifting
The output signal and a reference potential of position buffer, the output signal pulldown method include:
A drop-down clock signal is provided to the main pull-down control circuit so that the one drop-down control of main pull-down control circuit output
Signal processed；
There is provided one first operation clock signal is to control the drop-down control signal to the first auxiliary pull-down control circuit
Suspension joint, and the drop-down clock signal and the first operation clock signal are provided to the coupling control transistor to control
The coupled capacitor is made, the drop-down of suspension joint is controlled to the current potential of signal will pass through the coupling of the coupled capacitor
It draws high；And
The pull-down circuit is according to the drop-down control signal after drawing high current potential and by the output signal of the shift registor
It is pulled down to the reference potential.
11. the output signal pulldown method of shift registor as claimed in claim 10, which is characterized in that the drop-down clock pulse
The enabled period of signal is greater than the enabled period of the first operation clock signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW104120601 | 2015-06-25 | ||
| TW104120601A TWI556220B (en) | 2015-06-25 | 2015-06-25 | Shift register and pull-down method of output signal thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105161133A CN105161133A (en) | 2015-12-16 |
| CN105161133B true CN105161133B (en) | 2019-07-02 |
Family
ID=54801961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510507103.1A Active CN105161133B (en) | 2015-06-25 | 2015-08-18 | Shift register and output signal pull-down method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN105161133B (en) |
| TW (1) | TWI556220B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109903729B (en) * | 2017-12-08 | 2024-04-16 | 京东方科技集团股份有限公司 | Shifting register unit, grid driving circuit, driving method and display device |
| TWI699744B (en) * | 2019-07-16 | 2020-07-21 | 友達光電股份有限公司 | Driving method, shift register, and display device using the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102270509A (en) * | 2010-12-30 | 2011-12-07 | 友达光电股份有限公司 | Shift register circuit |
| CN103985343A (en) * | 2014-03-06 | 2014-08-13 | 友达光电股份有限公司 | shift register circuit and shift register |
| CN104167166A (en) * | 2014-07-18 | 2014-11-26 | 友达光电股份有限公司 | Shift register and method for driving shift register |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003104879A2 (en) * | 2002-06-01 | 2003-12-18 | Samsung Electronics Co., Ltd. | Shift register, liquid crystal display device having the shift register and method of driving scan lines using the same |
| US7872506B2 (en) * | 2008-11-04 | 2011-01-18 | Au Optronics Corporation | Gate driver and method for making same |
| TWI433460B (en) * | 2010-09-21 | 2014-04-01 | Au Optronics Corp | Nth shift register capable of increasing driving capability and method for increasing driving capability of a shift register |
| TWI511459B (en) * | 2012-10-11 | 2015-12-01 | Au Optronics Corp | Gate driving circuit capable of preventing current leakage |
| TWI478132B (en) * | 2013-06-14 | 2015-03-21 | Au Optronics Corp | Gate driver circuit |
| TWI514362B (en) * | 2014-03-10 | 2015-12-21 | Au Optronics Corp | Shift register module and method for driving the same |
-
2015
- 2015-06-25 TW TW104120601A patent/TWI556220B/en active
- 2015-08-18 CN CN201510507103.1A patent/CN105161133B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102270509A (en) * | 2010-12-30 | 2011-12-07 | 友达光电股份有限公司 | Shift register circuit |
| CN103985343A (en) * | 2014-03-06 | 2014-08-13 | 友达光电股份有限公司 | shift register circuit and shift register |
| CN104167166A (en) * | 2014-07-18 | 2014-11-26 | 友达光电股份有限公司 | Shift register and method for driving shift register |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI556220B (en) | 2016-11-01 |
| CN105161133A (en) | 2015-12-16 |
| TW201701261A (en) | 2017-01-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3410424B1 (en) | Emission driver and display device including the same | |
| CN103985343B (en) | shift register circuit and shift register | |
| WO2018040465A1 (en) | Goa driving unit | |
| JP6518785B2 (en) | GOA circuit and liquid crystal display device | |
| GB2550713A (en) | Forward and reverse scanning-type gate driving circuit | |
| US9704437B2 (en) | Gate driving circuit, array substrate, and display device | |
| CN106847156A (en) | Gate driving circuit and display device | |
| CN106782395B (en) | The driving method and driving device of GOA circuit | |
| WO2016065850A1 (en) | Goa unit and drive method, goa circuit, and display device | |
| CN110176204A (en) | Shift register and its driving method, gate driving circuit, display device | |
| CN104299583A (en) | Shifting register, drive method of shifting register, drive circuit and display device | |
| US20130285998A1 (en) | Liquid crystal display and method of driving the same | |
| CN106448540A (en) | Display panel, shift register circuit and driving method | |
| JP6434142B2 (en) | GOA circuit based on low temperature polysilicon semiconductor thin film transistor | |
| CN105118414A (en) | Shift register, driving method thereof, gate driving circuit, and display device | |
| CN102982846B (en) | Shift register for light-induced touch panel | |
| CN105654905A (en) | Shifting register and driving method and circuit thereof and display device | |
| CN106023914A (en) | Shift register and operation method thereof | |
| CN103944553A (en) | Output buffer, gate driving circuit and control method of gate driving circuit | |
| CN102136245B (en) | Shift register | |
| CN103400562B (en) | Gate drive circuit | |
| CN105869565A (en) | Gate drive circuit | |
| CN101131807A (en) | Voltage buffer and its source electrode driver | |
| CN105161133B (en) | Shift register and output signal pull-down method thereof | |
| CN103514840A (en) | Integrated gate driving circuit and liquid crystal panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |