CN105099620A - Algebra switching system, and assembly and decoding algorithm and decoding algorithm of data packet thereof - Google Patents
Algebra switching system, and assembly and decoding algorithm and decoding algorithm of data packet thereof Download PDFInfo
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- CN105099620A CN105099620A CN201510298834.XA CN201510298834A CN105099620A CN 105099620 A CN105099620 A CN 105099620A CN 201510298834 A CN201510298834 A CN 201510298834A CN 105099620 A CN105099620 A CN 105099620A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0076—Distributed coding, e.g. network coding, involving channel coding
Abstract
The invention belongs to the technical field of communication and relates to the ranges of algebra switching, network coding and the like, in particular to an algebra switching system, and an assembly and decoding algorithm and a decoding algorithm of a data packet thereof. The invention is a decoding algorithm in an algebra switching (namely multi-path self-routing) system provided with a network coding function. The invention has the following characteristics that a cell lost in a switching structure can be recovered according to redundant information in a coding cell, and loss of the cell is caused by port contention when the cell passes through the switching structure. Through the decoding function, the loss rate of the data packet in a switching process can be reduced, and thus the targets of increasing the network throughput, improving the communication efficiency and the like can be achieved.
Description
Technical field
The invention belongs to communication technical field, exchange and the scope such as network code to algebraically, be specifically related to a kind of algebraically switching system and assemble and decoding algorithm, packet decoding algorithm.
Background technology
In recent years, along with Internet user's quantity rapidly increases, network size constantly expands, and abundant network application especially the popular of Web Video Service is popularized, the data traffic of existing network continues rapid growth, and this proposes huge challenge to the router as network interconnection important pivot.The expansion of Internet scale, the surge of network traffics, and the continuous appearance of new network application, the network equipments such as routers propose new requirement.High performance router will have powerful ability and good autgmentability, has higher stability, reliability, fail safe.
For now, high-performance router generally has following characteristics:
System has sufficiently high processing data packets ability to reach the transfer capability of millions of bag (Mp/s) per second;
Distributed mass matrix form switching fabric;
High density, multiport and autgmentability thereof;
Hardware searching routing table;
Comprehensive Redundancy Design, high reliability;
Effective QoS means meet client in the requirement of different occasion to different service quality.
Work out high performance router extremely urgent to the network technology demand meeting people.Cost is realized in order to the performance improving router also reduces, propose many switching fabrics in the world, wherein noticeable again have shared bus structure [1], shares and store (SharedMemory) [2], structures such as cross matrix (Crossbar) [4].Shared bus structure is easy to expansion and also realizes than being easier to, but its speed is lower.Although share storage organization can reach higher speed, but its speed is still subject to the restriction of memory speed, its bandwidth of memory performance bottleneck makes when port number is more, and memory bandwidth requirements is comparatively large, can not meet the condition of extensive expanded application.Cross matrix is the most general switching fabric of most typical use, and it is a kind of simple space switching switch, N number of input port and N number of output port is interconnected arbitrarily.When port number N is less, cross matrix be a kind of realize clog-free, from the desirable switching fabric of route.But the quantity of the crosspoint that this structure needs is N
2, hardware implementing complexity is O (N
2), when n is large, its cost becomes unacceptable, does not meet the requirement of extensive expansion.
In order to construct a kind of switching fabric being applicable to extensive expansion, the people such as He Wei propose a kind of multipath from route switching structure [3], algebraically distributive lattice theory is applied to from route matrix by this structure, and this structure has completely distributed from route, without inner buffer, without the advantage such as caching delay and non-jitter [3].Under guarantee provides the condition of QoS, be applicable to extensive expansion, well meet the demand of user.
But this structure has certain packet loss caused by internal blocking, this defect seriously hinders the development and apply of this structure.The present invention proposes on the basis of Multi-path route switching system, add network code module, and devise the various functions that a set of exchanges data and encryption algorithm better realize Multi-path route switching system.The core of the method is by encoding to packet, adds effective redundant information, and decoding recovers the information of losing, reduce the Loss Rate of packet in transmitting procedure, thus reach increase network throughput, improve the targets such as communication quality, reduce the cost of data re-transmission.
Citing document:
[1]ChengTD,FranaszekPA,GeorgiouCJ,etal.Dynamicswitchprotocolsonasharedmediumnetwork:U.S.Patent5,235,592[P].1993-8-10.11s.
[2]AndradeP,CoopermanM,SieberRW.ATMsharedmemoryswitchwithcontentaddressing:U.S.Patent5,513,134[P].1996-4-30.
[3]HuiLi,WeiHe,XiCHEN,PengYi,BinqiangWang,“Multi-pathSelf-routingSwitchingStructurebyInterconnectionofMultistageSortingConcentrators”,IEEECHINACOM2007，Aug.2007,Shanghai.
[4]B.Prabhakar，N.McKeown，R.Ahuja；“Multicastschedulingforinput-queuedswitches”，IEEEJ.SelectedAreasCommun，vol.15，no.5，p855-866，1997.
Summary of the invention
A kind of algebraically switching system with network code function, mainly comprise with lower module: N number of input port (1-1-1, ..., 1-1-N), data preprocessing module (1-2), coding module (1-3), N number of VOQ scheduler module (1-4-1,1-4-2, ..., 1-4-N), algebraically Switching Module (1-5), Knockdown block (1-6-1, ..., 1-6-N), decoder module (1-7-1 ..., 1-7-N), N number of output port (1-8-1, ..., 1-8-N); Above-mentioned modules has cooperatively interacted the operations such as packet cutting in systems in which, coding, exchange, assembling, decoding.
A kind of assembling and decoding algorithm with the algebraically switching system of network code function, comprise: cell of data with parallel form through algebraically Switching Module, parallel data cell first writes and turns in string buffer memory by Knockdown block, after by the cell of data of serial from and turn a string buffer memory and read, the input state machine then in Knockdown block carries out header extraction respectively, header identification, access address are determined, be stored into operation such as assembling buffer memory, the complete judgement of packet etc.; Wherein judged result is sent to output state machine by the complete judgement of packet; Assemble that this function mainly realizes by output state machine, carry out the inquiry of packet complete judgement Structure Receive respectively, get complete packet or abandon or decode, packet exports; If packet is complete, need not decoding, directly sending packet to exporting buffer memory; If lose a cell of data in packet, the cell of data of loss can be decoded in conjunction with remaining cell of data and coding cell; If lose two and two or more, directly abandon this bag.
A kind of decoding algorithm with the packet of the algebraically switching system of network code function, comprise: cell is after exchanging, loss may be produced, by in data coding module, the cell of well cutting is encoded according to certain rule, the coding cell newly produced is sent into VOQ module and switching fabric together with other original cells, after exchange terminates, if cell has loss, then by passing through specific decoding algorithm, in decoder module and Knockdown block, recover primary data information (pdi), whole processing procedure as shown in Figures 2 and 3.
This decoding function of the present invention can reduce the Loss Rate of packet in exchange process, thus reaches increase network throughput, improves the targets such as communication efficiency.
Accompanying drawing explanation
Fig. 1 is the algebraically switching system with network code function.
Fig. 2 is packet Packet1 processing procedure in systems in which.
Fig. 3 is cell assembling and decoding design drawing.
Embodiment
By reference to the accompanying drawings the present invention is described in further detail below by embodiment.
The present invention proposes the encryption algorithm that the applicable algebraically in a kind of algebraically switching system having network code function exchanges.This algorithm is encoded in units of cell, and the data after coding are sent in VOQ scheduler module device and algebraically switching fabric, finally in decoding and Knockdown block, recovers original packet.
The structure of the algebraically switching system of coding whole Network Based involved in the present invention as shown in Figure 1.The IP packet of standard is from N number of input port 11 (1-1-1, ..., 1-1-N) enter, in data preprocessing module 12 (1-2), to synchronous control signal be added, and packet is cut into the equal data slice of length and adds packet header control information.In Fig. 1, the thick arrow of black represents package, i.e. the Ethernet data bag of standard; After packet enters data preprocessing module 12, the thick arrow of grey represents the data slice after being cut, i.e. cell; The thin arrow of grey represents Flow Control, i.e. data synchronizing signal.Coding module 13 (1-3) is to coding for information element, and the redundant information of generation enters post-module with raw data packets.N number of parallel VOQ module 14 (1-4-1 ..., 1-4-N) data are shunted according to output port, packet is sent into switching fabric 15 (1-5) by certain dispatching algorithm, switching fabric 15 i.e. algebraically Switching Module simultaneously.In Knockdown block 16 (1-6-1 ..., 1-6-N), the cell belonging to same packet re-assemblies by system in a certain order, recovers original packet.Only have when having monitored a cell loss concealment in assembling process, just can start decoder module (1-7-1 ..., 1-7-N), recover the cell of loss by decoding.Output port 18 (1-8-1 ..., 1-8-N) for exporting packet.
Composition graphs 3, Knockdown block comprises two functions: and turn string (3-1) and assembling output.And turn string part (namely and turn string state machine 31) and will the cell of data serialization processed be exchanged: in front half exchange gap, by parallel data cell stored in cell buffer memory 32 (3-2), extract header simultaneously, inspection cell validity, put into header buffer memory 33 (3-3), exchange in gap at latter half, cell is read in a serial fashion, and add control signal, send into assembled part together with header buffer memory.
At assembling output, its input state machine carries out header extraction respectively, header identification, access address are determined, stored in operations such as packet header buffer memory 34 (3-4), the judgements of packet integrality, because packet is when being cut into several cells, the identification of data packets word be equipped with to each cell and cell of data identifier word, leave in header.After header extracts, according to the address that identification of data packets word and cell of data identifier word determination cell store.Cell of data is stored in after data pack buffer 36 (3-6), check that whether packet is complete, if complete or imperfect and exceed maximum latency, by packet integrality judged result (comprise complete, packet loss cell but decodable code is recovered, packet loss cell not decodable code recover) be sent to output state machine.
Assembling this function mainly to realize by exporting decoder state machine 35 (3-5), to carry out the complete judgement Structure Receive inquiry of packet respectively, get complete packet or abandon or decode, packet exports.If packet is complete, need not decoding, directly sending packet to exporting buffer memory 37 (3-7); If lose a cell in packet, the cell of data of loss can be decoded in conjunction with remaining cell and coding cell; If lose two and two or more, directly abandon this bag and do abnormality processing, and empty memory space.
Decoding is the inverse process of coding, and thinking is as follows: as shown in Figure 2, and Packet1 is made up of N number of cell, a total N+1 cell after coding.If in the process exchanged, the n-th cell loss concealment in Packet1, then start the data that decoder module recovers loss.Decoding algorithm is: Cell_n=Cell_1 ⊕ Cell_2 ⊕ ... ⊕ Cell_n-1 ⊕ Cell_n+1 ⊕ ... ⊕ Cell_N+1.
Finally, export buffer memory the Packet Generation assembled is exported to network interface.
Fig. 2 is specially, and to the advanced line number Data preprocess 21 of packet Packet1, thus obtains the cell 22 that is cut, again to these coding for information element operation 23, thus obtain new cell 24, process through VOQ scheduler 25 afterwards, Switching Module 26 processes, complete assembling, decoding step 27.
Above content is in conjunction with concrete execution mode further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, some simple deduction or replace can also be made.
Claims (3)
1. there is an algebraically switching system for network code function,
Mainly comprise with lower module: N number of input port, data preprocessing module, coding module, N number of VOQ scheduler module, algebraically Switching Module, Knockdown block, decoder module, N number of output port;
It is characterized in that, above-mentioned modules has cooperatively interacted the operations such as packet cutting in systems in which, coding, exchange, assembling, decoding.
2. there is assembling and the decoding algorithm of the algebraically switching system of network code function, it is characterized in that,
Comprise: cell of data with parallel form through algebraically Switching Module, parallel data cell first writes and turns in string buffer memory by Knockdown block, after by the cell of data of serial from and turn a string buffer memory and read, the input state machine then in Knockdown block carries out header extraction respectively, header identification, access address are determined, be stored into operation such as assembling buffer memory, the complete judgement of packet etc.; Wherein judged result is sent to output state machine by the complete judgement of packet;
Assemble that this function mainly realizes by output state machine, carry out the inquiry of packet complete judgement Structure Receive respectively, get complete packet or abandon or decode, packet exports; If packet is complete, need not decoding, directly sending packet to exporting buffer memory; If lose a cell of data in packet, the cell of data of loss can be decoded in conjunction with remaining cell of data and coding cell; If lose two and two or more, directly abandon this bag.
3. one kind has the decoding algorithm of the packet of the algebraically switching system of network code function, it is characterized in that, comprise: cell is after exchanging, loss may be produced, by in data coding module, the cell of well cutting is encoded according to certain rule, the coding cell newly produced is sent into VOQ module and switching fabric together with other original cells, after exchange terminates, if cell has loss, then by by specific decoding algorithm, in decoder module and Knockdown block, recover primary data information (pdi).
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Cited By (2)
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| CN105187159A (en) * | 2015-09-07 | 2015-12-23 | 香港中文大学深圳研究院 | Decoding method used for grouping and regrouping algebraic exchange engine data packet |
| CN111713056A (en) * | 2018-02-12 | 2020-09-25 | 华为技术有限公司 | Data packet sending method and related equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105187159A (en) * | 2015-09-07 | 2015-12-23 | 香港中文大学深圳研究院 | Decoding method used for grouping and regrouping algebraic exchange engine data packet |
| CN111713056A (en) * | 2018-02-12 | 2020-09-25 | 华为技术有限公司 | Data packet sending method and related equipment |
| CN111713056B (en) * | 2018-02-12 | 2022-01-14 | 华为技术有限公司 | Data packet sending method and related equipment |
| US11444867B2 (en) | 2018-02-12 | 2022-09-13 | Huawei Technologies Co., Ltd. | Packet sending method and related device |
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