CN105093728A - Drive circuit and liquid-crystal display panel - Google Patents
Drive circuit and liquid-crystal display panel Download PDFInfo
- Publication number
- CN105093728A CN105093728A CN201510401896.9A CN201510401896A CN105093728A CN 105093728 A CN105093728 A CN 105093728A CN 201510401896 A CN201510401896 A CN 201510401896A CN 105093728 A CN105093728 A CN 105093728A
- Authority
- CN
- China
- Prior art keywords
- pin
- staggered portion
- area
- staggered
- driving circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Landscapes
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a drive circuit, which comprises a circuit board, wherein the circuit board comprises a first area and a second area; the first area is provided with a plurality of first pins that are arranged at interval; the second area is provided with a plurality of second pins that are arranged at interval; the first pins are set oppositely to the second pins; a top end of each of the first pins is provided with a first staggered portion; a top end of each of the second pins is provided with a second staggered portion; and the first staggered portion and the second staggered portion are set in a staggered way, so that the side length where the first pins are opposite to the second pins is smaller than the sum of the length of the first pins and the second pins. By adopting the drive circuit provided herein, the length at an FPC binding area can be reduced; and the width is also reduced to a certain degree, so as to satisfy the requirement of a narrow frame.
Description
[technical field]
The present invention relates to display technique field, particularly a kind of driving circuit and display panels.
[background technology]
Along with the integrated level of liquid crystal module drived control integrated circuit is more and more higher, the integrated circuit that display driver and touch-control drive has been integrated in a chips, make FOG (FlexOnGlass like this, FPC is hot-pressed onto on glass) the panel quantity of holding gets more and more, but FOG end is all the design of single pin at present, as shown in Figure 1, be limited by FPC (FlexiblePrintedCircuit, FPC) manufacturing process and the double influence of FPC bound device and technique, it is very little that corresponding FPC panel size can not be done, thus make FOG hold overall length long, corresponding FPC length is also longer.When FPC binds, because front equipment end has an adjustable pressure head, FPC size is longer, pressure head length is also longer, in process of production, the pressure head of this length often there will be the unbalance stress at two ends, what cause FPC to bind is stressed also uneven, FPC will be caused like this to bind and to produce the common bad phenomenon of the following two kinds: first, one end ACF (AnisotropicConductiveFilm, anisotropic conducting film) inner gold goal is not exclusively stressed, and the FOG panel causing the golden finger of FPC corresponding with it can not conducting; The second, the gold goal overstress in the ACF of one end, makes gold goal break, and also can cause cannot conducting.
As shown in Figure 2, for solving the problem that above-mentioned single design brings, adopting the design of double pin at present, between first row pin and second row pin, there is gap, very significantly shorten although such dual-row design has in FOG length, FOG width also can increase accordingly.
Therefore, be necessary to propose a kind of new technical scheme, to solve the problems of the technologies described above.
[summary of the invention]
The object of the present invention is to provide a kind of driving circuit and display panels, it effectively can reduce the length that FPC binds region, saves FPC size, thus reduces the cost of FPC; And reduce the width that FPC binds region, be conducive to narrow frame design; FPC can also be reduced and bind the length in region, thus improve the bad problem of the binding that causes because of FPC length.
For solving the problem, technical scheme of the present invention is as follows:
A kind of driving circuit, described driving circuit comprises a circuit board, described circuit board comprises first area and second area, described first area is provided with multiple spaced first pin, described second area is provided with multiple spaced second pin, and described first pin and described second pin are oppositely arranged;
Wherein, the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.
Preferably, in described driving circuit, the described first staggered portion and the described second staggered portion all curved.
Preferably, in described driving circuit, described arc is half elliptic.
Preferably, in described driving circuit, the described first staggered portion and the described second staggered portion all triangular in shape.
Preferably, in described driving circuit, between the described first staggered portion and the described second staggered portion, there is a gap.
A kind of display panels, it comprises driving circuit, data line, sweep trace and pixel cell; Described driving circuit comprises a circuit board, described circuit board comprises first area and second area, described first area is provided with multiple spaced first pin, and described second area is provided with multiple spaced second pin, and described first pin and described second pin are oppositely arranged;
Wherein, the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.
Preferably, in described display panels, the described first staggered portion and the described second staggered portion all curved.
Preferably, in described display panels, described arc is half elliptic.
Preferably, in described display panels, the described first staggered portion and the described second staggered portion all triangular in shape.
Preferably, in described display panels, between the described first staggered portion and the described second staggered portion, there is a gap.
Hinge structure, the present invention is owing to pressing dual-row design by the first pin and the second pin, and the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.Therefore effectively can reduce the length that FPC binds region, save FPC size, thus reduce the cost of FPC; And reduce the width that FPC binds region, be conducive to narrow frame design; FPC can also be reduced and bind the length in region, thus improve the bad problem of the binding that causes because of FPC length.
For foregoing of the present invention can be become apparent, preferred embodiment cited below particularly, and coordinate institute's accompanying drawings, be described in detail below.
[accompanying drawing explanation]
The structural representation of the driving circuit that Fig. 1 provides for prior art;
Another structural representation of the driving circuit that Fig. 2 provides for prior art;
The structural representation of the driving circuit that Fig. 3 provides for the embodiment of the present invention one;
The structural representation of the driving circuit that Fig. 4 provides for the embodiment of the present invention two.
[embodiment]
The word " embodiment " that this instructions uses means to be used as example, example or illustration.In addition, the article " " used in this instructions and claims usually can be interpreted as meaning " one or more ", unless otherwise or from context clear guiding singulative.
Display panel of the present invention can be such as TFT-LCD (ThinFilmTransistorLiquidCrystalDisplay, liquid crystal display panel of thin film transistor), the display panel such as AMOLED (ActiveMatrixOrganicLightEmittingDiode, active matrix organic LED panel).
In the present invention, first pin and the second pin are pressed dual-row design, and the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.Therefore effectively can reduce the length that FPC binds region, save FPC size, thus reduce the cost of FPC; And reduce the width that FPC binds region, be conducive to narrow frame design; FPC can also be reduced and bind the length in region, thus improve the bad problem of the binding that causes because of FPC length.
In order to technical solutions according to the invention are described, be described below by specific embodiment.
Embodiment one
Referring to Fig. 3, is the structural representation of the driving circuit that the embodiment of the present invention one provides; For convenience of explanation, illustrate only the part relevant to the embodiment of the present invention.
Described driving circuit comprises a circuit board 10, described circuit board 10 comprises first area and second area, described first area is provided with multiple spaced first pin 20, described second area is provided with multiple spaced second pin 30, and described first pin 20 is oppositely arranged with described second pin 30; Wherein, the top of described first pin 20 is provided with the first staggered portion 21, the top of described second pin 30 is provided with the second staggered portion 31, described first staggered portion 21 is crisscross arranged with the described second staggered portion 31, with the length sum making described first pin 20 side 40 length relative with described second pin 30 be less than described first pin 20 and described second pin 30.
In embodiments of the present invention, FOG end on described circuit board 10 comprises described first area and described second area, described first area is provided with multiple the first pin 20 arranged at equal intervals, and described second area is provided with multiple the second pin 30 arranged at equal intervals.
As one embodiment of the present invention, the described first staggered portion 21 and the described second staggered portion 31 all triangular in shape.Such profile design, described second staggered portion 31 can be inserted establish in the described first staggered portion 21 and the described first gap interlocked between portion 21, thus make described first pin 20 side 40 length relative with described second pin 30 be less than the length sum of described first pin 20 and described second pin 30.The contraction in length of the length dual-row design compared to existing technology simultaneously also making FOG hold some.
As another preferred embodiment of the present invention, between the described first staggered portion 21 and the described second staggered portion 31, there is a gap, prevent described first pin 20 and described second pin 30 in electrical contact.Preferably, be crisscross arranged each described in the first staggered portion 21 equal with the gap described in each between the second staggered portion 31.
Embodiment two
Referring to Fig. 4, is the structural representation of the driving circuit that the embodiment of the present invention two provides; For convenience of explanation, illustrate only the part relevant to the embodiment of the present invention.
Described driving circuit comprises a circuit board 100, described circuit board 100 comprises first area and second area, described first area is provided with multiple spaced first pin 200, described second area is provided with multiple spaced second pin 300, and described first pin 200 is oppositely arranged with described second pin 300; Wherein, the top of described first pin 200 is provided with the first staggered portion 210, the top of described second pin 300 is provided with the second staggered portion 310, described first staggered portion 210 is crisscross arranged with the described second staggered portion 310, with the length sum making described first pin 200 side 400 length relative with described second pin 300 be less than described first pin 200 and described second pin 300.
In embodiments of the present invention, FOG end on described circuit board 100 comprises described first area and described second area, described first area is provided with multiple the first pin 200 arranged at equal intervals, and described second area is provided with multiple the second pin 300 arranged at equal intervals.
As one embodiment of the present invention, the described first staggered portion 210 and the described second staggered portion 310 all curved.Concrete, described arc is half elliptic.Such profile design, described second staggered portion 310 can be inserted establish in the described first staggered portion 210 and the described first gap interlocked between portion 210, thus make described first pin 200 side 400 length relative with described second pin 300 be less than the length sum of described first pin 200 and described second pin 300.The contraction in length of the length dual-row design compared to existing technology simultaneously also making FOG hold some.
As another preferred embodiment of the present invention, between the described first staggered portion 210 and the described second staggered portion 310, there is a gap, prevent described first pin 200 and described second pin 300 in electrical contact.Preferably, be crisscross arranged each described in the first staggered portion 210 equal with the gap described in each between the second staggered portion 310.
See also Fig. 3 and Fig. 4, the embodiment of the present invention additionally provides a kind of display panels, for convenience of explanation, illustrate only the part relevant to the embodiment of the present invention.
Described display panels comprises: driving circuit, data line, sweep trace and pixel cell; Wherein, described driving circuit comprises a circuit board 10, described circuit board 10 comprises first area and second area, described first area is provided with multiple spaced first pin 20, described second area is provided with multiple spaced second pin 30, and described first pin 20 is oppositely arranged with described second pin 30; Wherein, the top of described first pin 20 is provided with the first staggered portion 21, the top of described second pin 30 is provided with the second staggered portion 31, described first staggered portion 21 is crisscross arranged with the described second staggered portion 31, with the length sum making described first pin 20 side 40 length relative with described second pin 30 be less than described first pin 20 and described second pin 30.
In embodiments of the present invention, FOG end on described circuit board 10 comprises described first area and described second area, described first area is provided with multiple the first pin 20 arranged at equal intervals, and described second area is provided with multiple the second pin 30 arranged at equal intervals.
As one embodiment of the present invention, the described first staggered portion 21 and the described second staggered portion 31 all triangular in shape.But be understandable that, the described first staggered portion 21 and the described second staggered portion 31 also can be all curved.Concrete, described arc is half elliptic.Such profile design, described second staggered portion 31 can be inserted establish in the described first staggered portion 21 and the described first gap interlocked between portion 21, thus make described first pin 20 side 40 length relative with described second pin 30 be less than the length sum of described first pin 20 and described second pin 30.The contraction in length of the length dual-row design compared to existing technology simultaneously also making FOG hold some.
As another preferred embodiment of the present invention, between the described first staggered portion 21 and the described second staggered portion 31, there is a gap, prevent described first pin 20 and described second pin 30 in electrical contact.Preferably, be crisscross arranged each described in the first staggered portion 21 equal with the gap described in each between the second staggered portion 31.
In sum, the embodiment of the present invention is by pressing dual-row design by the first pin and the second pin, and the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.Therefore effectively can reduce the length that FPC binds region, save FPC size, thus reduce the cost of FPC; And reduce the width that FPC binds region, be conducive to narrow frame design; FPC can also be reduced and bind the length in region, thus improve the bad problem of the binding that causes because of FPC length.
Although illustrate and describe the present invention relative to one or more implementation, those skilled in the art are based on to the reading of this instructions and accompanying drawing with understand and will expect equivalent variations and amendment.The present invention includes all such amendments and modification, and only limited by the scope of claims.Especially about the various functions performed by said modules, term for describing such assembly is intended to the random component (unless otherwise instructed) corresponding to the appointed function (such as it is functionally of equal value) performing described assembly, even if be not structurally equal to the open structure of the function in the exemplary implementations performing shown in this article instructions.In addition, although the special characteristic of this instructions relative in some implementations only one be disclosed, this feature can with can be such as expect and other Feature Combinations one or more of other favourable implementations for given or application-specific.And, " comprise " with regard to term, " having ", " containing " or its distortion be used in embodiment or claim with regard to, such term is intended to comprise " to comprise " similar mode to term.
In sum; although the present invention discloses as above with preferred embodiment; but above preferred embodiment is also not used to limit the present invention; those of ordinary skill in the art; without departing from the spirit and scope of the present invention; all can do various change and retouching, the scope that therefore protection scope of the present invention defines with claim is as the criterion.
Claims (10)
1. a driving circuit, it is characterized in that, described driving circuit comprises a circuit board, described circuit board comprises first area and second area, described first area is provided with multiple spaced first pin, described second area is provided with multiple spaced second pin, and described first pin and described second pin are oppositely arranged;
Wherein, the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.
2. driving circuit according to claim 1, is characterized in that, the described first staggered portion and the described second staggered portion all curved.
3. driving circuit according to claim 2, is characterized in that, described arc is half elliptic.
4. driving circuit according to claim 1, is characterized in that, the described first staggered portion and the described second staggered portion all triangular in shape.
5. driving circuit according to claim 1, is characterized in that, has a gap between the described first staggered portion and the described second staggered portion.
6. a display panels, it comprises driving circuit, data line, sweep trace and pixel cell; It is characterized in that, described driving circuit comprises a circuit board, described circuit board comprises first area and second area, described first area is provided with multiple spaced first pin, described second area is provided with multiple spaced second pin, and described first pin and described second pin are oppositely arranged;
Wherein, the top of described first pin is provided with the first staggered portion, the top of described second pin is provided with the second staggered portion, described first staggered portion and the described second staggered portion are crisscross arranged, with the length sum making the described first pin side edge length relative with described second pin be less than described first pin and described second pin.
7. display panels according to claim 6, is characterized in that, the described first staggered portion and the described second staggered portion all curved.
8. display panels according to claim 7, is characterized in that, described arc is half elliptic.
9. display panels according to claim 6, is characterized in that, the described first staggered portion and the described second staggered portion all triangular in shape.
10. display panels according to claim 6, is characterized in that, has a gap between the described first staggered portion and the described second staggered portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510401896.9A CN105093728A (en) | 2015-07-10 | 2015-07-10 | Drive circuit and liquid-crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510401896.9A CN105093728A (en) | 2015-07-10 | 2015-07-10 | Drive circuit and liquid-crystal display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105093728A true CN105093728A (en) | 2015-11-25 |
Family
ID=54574494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510401896.9A Pending CN105093728A (en) | 2015-07-10 | 2015-07-10 | Drive circuit and liquid-crystal display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105093728A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106990630A (en) * | 2017-05-24 | 2017-07-28 | 厦门天马微电子有限公司 | Display panel and display device |
| CN107369692A (en) * | 2017-06-09 | 2017-11-21 | 厦门天马微电子有限公司 | Display panel and display device |
| WO2017206815A1 (en) * | 2016-06-01 | 2017-12-07 | 华为技术有限公司 | Golden finger connector, circuit board, and connector assembly |
| CN108022517A (en) * | 2016-10-31 | 2018-05-11 | 昆山国显光电有限公司 | Drive circuit carrier, display panel and flat-panel monitor |
| CN108364576A (en) * | 2018-01-22 | 2018-08-03 | 精电(河源)显示技术有限公司 | A kind of bilayer conductive COB display modules and its production method |
| CN110689847A (en) * | 2019-11-12 | 2020-01-14 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN111613597A (en) * | 2020-05-18 | 2020-09-01 | 武汉华星光电半导体显示技术有限公司 | Bonding area circuit |
| WO2020215871A1 (en) * | 2019-04-25 | 2020-10-29 | 京东方科技集团股份有限公司 | Flexible substrate and display device |
| US10937722B1 (en) | 2019-09-27 | 2021-03-02 | Au Optronics Corporation | Device substrate |
| WO2022262263A1 (en) * | 2021-06-17 | 2022-12-22 | 合肥维信诺科技有限公司 | Pin binding structure, array substrate and display panel |
| CN115587567A (en) * | 2022-09-30 | 2023-01-10 | 北京百度网讯科技有限公司 | Wiring method and manufacturing method of quantum chip layout and quantum chip |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1209654A (en) * | 1997-08-27 | 1999-03-03 | 日本电气株式会社 | Semiconductor device having alternative long soldering plate and short soldering plate |
| CN1221310A (en) * | 1997-11-27 | 1999-06-30 | 日本电气株式会社 | Tape automated bonding film |
| US6008532A (en) * | 1997-10-23 | 1999-12-28 | Lsi Logic Corporation | Integrated circuit package having bond fingers with alternate bonding areas |
| US20020066964A1 (en) * | 2000-12-04 | 2002-06-06 | Akio Nakamura | Semiconductor device |
| CN2609039Y (en) * | 2003-03-21 | 2004-03-31 | 北京宝龙达信息技术股份有限公司 | AGP display card |
| TW200616168A (en) * | 2004-11-05 | 2006-05-16 | Advanced Semiconductor Eng | Staggered wirebonding configuration |
| CN101022099A (en) * | 2007-03-16 | 2007-08-22 | 华为技术有限公司 | Thick film circuit, pin frame, circuit board and assembly thereof |
| CN101150104A (en) * | 2007-11-12 | 2008-03-26 | 友达光电股份有限公司 | External pin structure, active part array base plate, photoelectric device and making method |
| CN102293072A (en) * | 2009-05-29 | 2011-12-21 | 揖斐电株式会社 | Wiring board and method for manufacturing same |
| CN102468258A (en) * | 2010-11-05 | 2012-05-23 | 飞思卡尔半导体公司 | Semiconductor device with connecting points nested in rows |
| CN102610584A (en) * | 2012-02-21 | 2012-07-25 | 三星半导体(中国)研究开发有限公司 | Staggered-pins structure for substrate |
| CN203368924U (en) * | 2013-06-03 | 2013-12-25 | 江苏星源航天材料股份有限公司 | PCB board welding pad structure |
| CN103969890A (en) * | 2013-09-04 | 2014-08-06 | 上海天马微电子有限公司 | TFT (thin film transistor) array substrate, display panel and display device |
-
2015
- 2015-07-10 CN CN201510401896.9A patent/CN105093728A/en active Pending
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1209654A (en) * | 1997-08-27 | 1999-03-03 | 日本电气株式会社 | Semiconductor device having alternative long soldering plate and short soldering plate |
| US6008532A (en) * | 1997-10-23 | 1999-12-28 | Lsi Logic Corporation | Integrated circuit package having bond fingers with alternate bonding areas |
| CN1221310A (en) * | 1997-11-27 | 1999-06-30 | 日本电气株式会社 | Tape automated bonding film |
| US20020066964A1 (en) * | 2000-12-04 | 2002-06-06 | Akio Nakamura | Semiconductor device |
| CN2609039Y (en) * | 2003-03-21 | 2004-03-31 | 北京宝龙达信息技术股份有限公司 | AGP display card |
| TW200616168A (en) * | 2004-11-05 | 2006-05-16 | Advanced Semiconductor Eng | Staggered wirebonding configuration |
| CN101022099A (en) * | 2007-03-16 | 2007-08-22 | 华为技术有限公司 | Thick film circuit, pin frame, circuit board and assembly thereof |
| CN101150104A (en) * | 2007-11-12 | 2008-03-26 | 友达光电股份有限公司 | External pin structure, active part array base plate, photoelectric device and making method |
| CN102293072A (en) * | 2009-05-29 | 2011-12-21 | 揖斐电株式会社 | Wiring board and method for manufacturing same |
| CN102468258A (en) * | 2010-11-05 | 2012-05-23 | 飞思卡尔半导体公司 | Semiconductor device with connecting points nested in rows |
| CN102610584A (en) * | 2012-02-21 | 2012-07-25 | 三星半导体(中国)研究开发有限公司 | Staggered-pins structure for substrate |
| CN203368924U (en) * | 2013-06-03 | 2013-12-25 | 江苏星源航天材料股份有限公司 | PCB board welding pad structure |
| CN103969890A (en) * | 2013-09-04 | 2014-08-06 | 上海天马微电子有限公司 | TFT (thin film transistor) array substrate, display panel and display device |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017206815A1 (en) * | 2016-06-01 | 2017-12-07 | 华为技术有限公司 | Golden finger connector, circuit board, and connector assembly |
| US11909134B2 (en) | 2016-06-01 | 2024-02-20 | Huawei Technologies Co., Ltd. | Edge connector, circuit board, and connector component |
| US11626673B2 (en) | 2016-06-01 | 2023-04-11 | Huawei Technologies Co., Ltd. | Edge connector, circuit board, and connector component |
| US10998653B2 (en) | 2016-06-01 | 2021-05-04 | Huawei Technologies Co., Ltd. | Edge connector, circuit board, and connector component |
| CN108022517A (en) * | 2016-10-31 | 2018-05-11 | 昆山国显光电有限公司 | Drive circuit carrier, display panel and flat-panel monitor |
| CN106990630A (en) * | 2017-05-24 | 2017-07-28 | 厦门天马微电子有限公司 | Display panel and display device |
| CN107369692A (en) * | 2017-06-09 | 2017-11-21 | 厦门天马微电子有限公司 | Display panel and display device |
| CN107369692B (en) * | 2017-06-09 | 2021-04-30 | 厦门天马微电子有限公司 | Display panel and display device |
| CN108364576A (en) * | 2018-01-22 | 2018-08-03 | 精电(河源)显示技术有限公司 | A kind of bilayer conductive COB display modules and its production method |
| US11387419B2 (en) | 2019-04-25 | 2022-07-12 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Flexible substrate and display device |
| WO2020215871A1 (en) * | 2019-04-25 | 2020-10-29 | 京东方科技集团股份有限公司 | Flexible substrate and display device |
| US10937722B1 (en) | 2019-09-27 | 2021-03-02 | Au Optronics Corporation | Device substrate |
| CN110689847A (en) * | 2019-11-12 | 2020-01-14 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN111613597A (en) * | 2020-05-18 | 2020-09-01 | 武汉华星光电半导体显示技术有限公司 | Bonding area circuit |
| WO2022262263A1 (en) * | 2021-06-17 | 2022-12-22 | 合肥维信诺科技有限公司 | Pin binding structure, array substrate and display panel |
| CN115587567A (en) * | 2022-09-30 | 2023-01-10 | 北京百度网讯科技有限公司 | Wiring method and manufacturing method of quantum chip layout and quantum chip |
| CN115587567B (en) * | 2022-09-30 | 2023-09-26 | 北京百度网讯科技有限公司 | Wiring method and manufacturing method of quantum chip layout and quantum chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105093728A (en) | Drive circuit and liquid-crystal display panel | |
| US9560761B2 (en) | Curved display | |
| EP2985677B1 (en) | In-cell touch screen and display device | |
| US10649289B2 (en) | Array substrate, display panel and display device | |
| US20140375922A1 (en) | Liquid crystal display device and method of driving the same | |
| KR102414074B1 (en) | Curved display apparatus and method of manufacturing the same | |
| TW506103B (en) | Bump layout on a chip | |
| US10228592B2 (en) | Display apparatus and method of manufacturing the same | |
| KR102426692B1 (en) | Nonsquare display | |
| US20210405420A1 (en) | Display panel and display device | |
| TW200723219A (en) | Liquid crystal display | |
| CN104380367A (en) | Display device | |
| TW200717143A (en) | Liquid crystal display | |
| US9874793B2 (en) | Narrow frame liquid crystal display and method for producing the same, large screen liquid crystal display apparatus | |
| US10453870B2 (en) | Flexible display substrate and display device | |
| US20180211876A1 (en) | Array substrate, method for manufacturing the same, and display apparatus | |
| CN105301858A (en) | Display panel, preparation method of display panel and array substrate | |
| WO2020034380A1 (en) | Display panel and display device | |
| CN104656327A (en) | Array substrate and liquid crystal display panel | |
| CN104267552A (en) | Array substrate and liquid crystal display panel | |
| CN104392976A (en) | Driver chip and display device | |
| CN105389057A (en) | Integrated touch display panel and touch display device | |
| CN105739208A (en) | Display device and driving device | |
| US20190004358A1 (en) | Array substrate, liquid crystal panel, and liquid crystal display | |
| KR102608434B1 (en) | Display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20151125 |