CN105071924A - Four-wing attractor chaotic system with three equilibrium points containing absolute values, and circuit - Google Patents

Abstract

The invention relates to a chaotic system and a circuit, and especially relates to a four-wing attractor chaotic system with three equilibrium points containing absolute values, and a circuit. A typical chaotic system such as a Lorenz system, a Chen system and a Lu system all have three equilibrium points among which one is a zero equilibrium point and another two are non-zero equilibrium points, and attractors generated by such a system are two-wing attractors. On the basis of the typical chaotic system, four non-zero equilibrium points or more equilibrium points are established by additionally adopting a saturation function or a continuous function, and thus a chaotic system with four-wing or multi-wing attractors can be constructed. The four-wing attractor chaotic system with three equilibrium points containing absolute values is provided with no need of a saturation function or a continuous function. The types of the chaotic system are increased, and a new choice for applications of the chaotic system to engineering practices is provided.

Description

A kind of three balance points containing absolute value four-winged chaotic attractor chaos system and circuit

Technical field

The present invention relates to a kind of chaos system and circuit, particularly a kind of three balance points containing absolute value four-winged chaotic attractor chaos system and circuit.

Background technology

Typical chaos system is as Lorenz system, Chen system and Lu system all have three balance points, one is wherein had to be zero balancing point, another two is non-zero balancing point, the attractor that this type systematic produces is double-wing chaotic attractor, by increasing method construct four non-zero balance points of saturation function or continuous function or more balance point on the basis of Typical Chaotic Systems, the chaos system with four wings or multiple wing attractor can be constructed, the present invention is not when increasing saturation function or continuous function, what propose a kind of three balance points contains absolute value four-winged chaotic attractor chaos system, add the type of chaos system, a kind of selection is newly provided for chaos system is applied to engineering practice.

Summary of the invention

The technical problem to be solved in the present invention be to provide a kind of three balance points containing absolute value four-winged chaotic attractor chaos system and circuit, the present invention adopts following technological means to realize goal of the invention:

1, three balance points containing an absolute value four-winged chaotic attractor chaos system, it is characterized in that:

$\left\{\begin{array}{c}\frac{dx}{dt}=ax+by+cz\\ \frac{dy}{dt}=-x-\left(f\right(z)-d)y\\ \frac{dz}{dt}=-ex+\left(f\right(y)-d)z\end{array}\right.---i$

In i formula, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function;

Work as a=-0.5, b=2, c=1, d=4, e=0.5, f (z)=z ², f (y)=| during y|, system i is:

$\left\{\begin{array}{c}\frac{dx}{dt}=-0.5x+2yx+z\\ \frac{dy}{dt}=-x-(z^2-4)y\\ \frac{dz}{dt}=-0.5x+\left(\right|y|-4)z\end{array}\right.---ii$

System ii is a kind of two balance points four wing chaos system containing absolute value.

2, a kind of three balance points containing absolute value four-winged chaotic attractor chaos system circuit, it is characterized in that: according to Mathematical Modeling ii constructing analog circuit, utilize operational amplifier U1, operational amplifier U2, operational amplifier U3 and resistance and electric capacity form anti-phase adder and anti-phase fractional order integrator, operational amplifier U6 and resistance and diode is utilized to form absolute value circuit, utilize multiplier U4, multiplier U5 and multiplier U7 realizes multiplying, described operational amplifier U1, operational amplifier U2, operational amplifier U3 and operational amplifier U6 adopts LF347N, multiplier U4, multiplier U5 and multiplier U7 adopts AD633JN,

Described operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U6, multiplier U4 and multiplier U5, described operational amplifier U3 concatenation operation amplifier U6, multiplier U4, multiplier U5 and multiplier U7, described operational amplifier U6 connects multiplier U4 and multiplier U5, described multiplier U4 concatenation operation amplifier U2, described multiplier U5 concatenation operation amplifier U3;

The 1st of described operational amplifier U1, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R12, 7th pin meets output-x, connected with the 13rd pin of operational amplifier U1 by resistance R19, connected with the 13rd pin of operational amplifier U2 by resistance R4, connected with the 13rd pin of operational amplifier U3 by resistance R18, 8th pin connects and exports x, connected with the 6th pin of operational amplifier U1 by resistance R11, 9th pin is connected with the 8th pin by electric capacity C1, 13rd pin is connected with the 14th pin by resistance R9, 14th pin is connected with 9 pins by resistance R10,

The 1st of described operational amplifier U2, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R31, 7th pin meets output-y, connect the 3rd pin of multiplier U4, 8th pin connects and exports y, connected with the 2nd pin of operational amplifier U6 by resistance R20, connected with the 6th pin of operational amplifier U6 by resistance R22, connected with the 13rd pin of operational amplifier U1 by resistance R2, connected with the 13rd pin of operational amplifier U2 by resistance R1, connected with the 6th pin of operational amplifier U2 by resistance R30, 9th pin is connected with the 8th pin by electric capacity C2, 13rd pin completes is crossed resistance R5 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R3,

The 1st of described operational amplifier U3, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R14, 7th pin meets output-z, connected with the 13rd pin of operational amplifier U3 by resistance R8, 8th pin connects and exports z, connect the 1st of multiplier U7 the, 3 pins, connect the 3rd pin of multiplier U5, connected with the 6th pin of operational amplifier U3 by resistance R13, connected with the 13rd pin of operational amplifier U1 by resistance R6, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin completes is crossed resistance R15 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R16,

1st pin of described operational amplifier U6 is connected with the 2nd pin by diode D1,2nd pin is connected with the 1st pin by resistance R21 and diode D2,2nd pin is connected with the 6th pin by resistance R21 and resistance R23,3rd, 5,10,12 pin ground connection, 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected with the 7th pin by resistance R24,7th pin connects the 1st pin of multiplier U5, the 8th, 9,13,14 pins are unsettled;

The equal ground connection of 2nd, 4,6 pin of described multiplier U4, the 5th pin meets VEE, and the 7th pin is connected with operational amplifier U2 the 13rd pin by resistance R17, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U5, the 5th pin meets VEE, and the 7th pin is connected with the 13rd pin of operational amplifier U3 by resistance R7, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U7, the 5th pin meets VEE, and the 7th pin connects the 1st pin of multiplier U4, and the 8th pin meets VCC.

Useful fruit of the present invention is: propose a kind of two balance points four wing chaos system containing absolute value, add the type of chaos system, provide a kind of selection newly for chaos system is applied to engineering practice.

Accompanying drawing explanation

Fig. 1 is circuit structure block diagram of the present invention.

Fig. 2 is the actual connection layout of circuit of U1 of the present invention.

Fig. 3 is the actual connection layout of circuit of U2, U4 and U7 of the present invention.

Fig. 4 is the actual connection layout of circuit of U3 and U5 of the present invention.

Fig. 5 is the actual connection layout of circuit of U6 of the present invention.

Fig. 6 is the phasor in y-z direction of the present invention.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, see Fig. 1-Fig. 6.

1, three balance points containing an absolute value four-winged chaotic attractor chaos system, it is characterized in that:

$\left\{\begin{array}{c}\frac{dx}{dt}=ax+by+cz\\ \frac{dy}{dt}=-x-\left(f\right(z)-d)y\\ \frac{dz}{dt}=-ex+\left(f\right(y)-d)z\end{array}\right.---i$

In i formula, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function;

Work as a=-0.5, b=2, c=1, d=4, e=0.5, f (z)=z ², f (y)=| during y|, system i is:

$\left\{\begin{array}{c}\frac{dx}{dt}=-0.5x+2yx+z\\ \frac{dy}{dt}=-x-(z^2-4)y\\ \frac{dz}{dt}=-0.5x+\left(\right|y|-4)z\end{array}\right.---ii$

System ii is a kind of two balance points four wing chaos system containing absolute value.

2, a kind of three balance points containing absolute value four-winged chaotic attractor chaos system circuit, it is characterized in that: according to Mathematical Modeling ii constructing analog circuit, utilize operational amplifier U1, operational amplifier U2, operational amplifier U3 and resistance and electric capacity form anti-phase adder and anti-phase fractional order integrator, operational amplifier U6 and resistance and diode is utilized to form absolute value circuit, utilize multiplier U4, multiplier U5 and multiplier U7 realizes multiplying, described operational amplifier U1, operational amplifier U2, operational amplifier U3 and operational amplifier U6 adopts LF347N, multiplier U4, multiplier U5 and multiplier U7 adopts AD633JN,

Described operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U6, multiplier U4 and multiplier U5, described operational amplifier U3 concatenation operation amplifier U6, multiplier U4, multiplier U5 and multiplier U7, described operational amplifier U6 connects multiplier U4 and multiplier U5, described multiplier U4 concatenation operation amplifier U2, described multiplier U5 concatenation operation amplifier U3;

The 1st of described operational amplifier U1, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R12, 7th pin meets output-x, connected with the 13rd pin of operational amplifier U1 by resistance R19, connected with the 13rd pin of operational amplifier U2 by resistance R4, connected with the 13rd pin of operational amplifier U3 by resistance R18, 8th pin connects and exports x, connected with the 6th pin of operational amplifier U1 by resistance R11, 9th pin is connected with the 8th pin by electric capacity C1, 13rd pin is connected with the 14th pin by resistance R9, 14th pin is connected with 9 pins by resistance R10,

The 1st of described operational amplifier U2, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R31, 7th pin meets output-y, connect the 3rd pin of multiplier U4, 8th pin connects and exports y, connected with the 2nd pin of operational amplifier U6 by resistance R20, connected with the 6th pin of operational amplifier U6 by resistance R22, connected with the 13rd pin of operational amplifier U1 by resistance R2, connected with the 13rd pin of operational amplifier U2 by resistance R1, connected with the 6th pin of operational amplifier U2 by resistance R30, 9th pin is connected with the 8th pin by electric capacity C2, 13rd pin completes is crossed resistance R5 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R3,

The 1st of described operational amplifier U3, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R14, 7th pin meets output-z, connected with the 13rd pin of operational amplifier U3 by resistance R8, 8th pin connects and exports z, connect the 1st of multiplier U7 the, 3 pins, connect the 3rd pin of multiplier U5, connected with the 6th pin of operational amplifier U3 by resistance R13, connected with the 13rd pin of operational amplifier U1 by resistance R6, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin completes is crossed resistance R15 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R16,

1st pin of described operational amplifier U6 is connected with the 2nd pin by diode D1,2nd pin is connected with the 1st pin by resistance R21 and diode D2,2nd pin is connected with the 6th pin by resistance R21 and resistance R23,3rd, 5,10,12 pin ground connection, 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected with the 7th pin by resistance R24,7th pin connects the 1st pin of multiplier U5, the 8th, 9,13,14 pins are unsettled;

The equal ground connection of 2nd, 4,6 pin of described multiplier U4, the 5th pin meets VEE, and the 7th pin is connected with operational amplifier U2 the 13rd pin by resistance R17, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U5, the 5th pin meets VEE, and the 7th pin is connected with the 13rd pin of operational amplifier U3 by resistance R7, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U7, the 5th pin meets VEE, and the 7th pin connects the 1st pin of multiplier U4, and the 8th pin meets VCC.

Resistance R3=R5=R9=R10=R11=R12=R13=R14=R15=R16=10k Ω in circuit,

R20=R21=R22=R24=10k Ω, R7=R17=1K Ω, R28=5k Ω, R4=R6=100k Ω, R1=R8=25K Ω, R18=R19=200K Ω, R2=50K Ω, electric capacity C1=C2=C3=10nF in circuit.

Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned citing, and the change that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1. three balance points containing an absolute value four-winged chaotic attractor chaos system, it is characterized in that:

$\left\{\begin{array}{c}\frac{dx}{dt}=ax+by+cz\\ \frac{dy}{dt}=-x-\left(f\right(z)-d)y\\ \frac{dz}{dt}=-ex+\left(f\right(y)-d)z\end{array}\right.---i$

In i formula, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function;

Work as a=-0.5, b=2, c=1, d=4, e=0.5, f (z)=z ², f (y)=| during y|, system i is:

$\left\{\begin{array}{c}\frac{dx}{dt}=-0.5x+2yx+z\\ \frac{dy}{dt}=-x-(z^2-4)y\\ \frac{dz}{dt}=-0.5x+\left(\right|y|-4)z\end{array}\right.---ii$

System ii is a kind of two balance points four wing chaos system containing absolute value.

2. a balance point containing absolute value four-winged chaotic attractor chaos system circuit, it is characterized in that: according to Mathematical Modeling ii constructing analog circuit, utilize operational amplifier U1, operational amplifier U2, operational amplifier U3 and resistance and electric capacity form anti-phase adder and anti-phase fractional order integrator, operational amplifier U6 and resistance and diode is utilized to form absolute value circuit, utilize multiplier U4, multiplier U5 and multiplier U7 realizes multiplying, described operational amplifier U1, operational amplifier U2, operational amplifier U3 and operational amplifier U6 adopts LF347N, multiplier U4, multiplier U5 and multiplier U7 adopts AD633JN,

Described operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U6, multiplier U4 and multiplier U5, described operational amplifier U3 concatenation operation amplifier U6, multiplier U4, multiplier U5 and multiplier U7, described operational amplifier U6 connects multiplier U4 and multiplier U5, described multiplier U4 concatenation operation amplifier U2, described multiplier U5 concatenation operation amplifier U3;

The 1st of described operational amplifier U1, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R12, 7th pin meets output-x, connected with the 13rd pin of operational amplifier U1 by resistance R19, connected with the 13rd pin of operational amplifier U2 by resistance R4, connected with the 13rd pin of operational amplifier U3 by resistance R18, 8th pin connects and exports x, connected with the 6th pin of operational amplifier U1 by resistance R11, 9th pin is connected with the 8th pin by electric capacity C1, 13rd pin is connected with the 14th pin by resistance R9, 14th pin is connected with 9 pins by resistance R10,

The 1st of described operational amplifier U2, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R31, 7th pin meets output-y, connect the 3rd pin of multiplier U4, 8th pin connects and exports y, connected with the 2nd pin of operational amplifier U6 by resistance R20, connected with the 6th pin of operational amplifier U6 by resistance R22, connected with the 13rd pin of operational amplifier U1 by resistance R2, connected with the 13rd pin of operational amplifier U2 by resistance R1, connected with the 6th pin of operational amplifier U2 by resistance R30, 9th pin is connected with the 8th pin by electric capacity C2, 13rd pin completes is crossed resistance R5 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R3,

The 1st of described operational amplifier U3, 2 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by resistance R14, 7th pin meets output-z, connected with the 13rd pin of operational amplifier U3 by resistance R8, 8th pin connects and exports z, connect the 1st of multiplier U7 the, 3 pins, connect the 3rd pin of multiplier U5, connected with the 6th pin of operational amplifier U3 by resistance R13, connected with the 13rd pin of operational amplifier U1 by resistance R6, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin completes is crossed resistance R15 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R16,

1st pin of described operational amplifier U6 is connected with the 2nd pin by diode D1,2nd pin is connected with the 1st pin by resistance R21 and diode D2,2nd pin is connected with the 6th pin by resistance R21 and resistance R23,3rd, 5,10,12 pin ground connection, 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected with the 7th pin by resistance R24,7th pin connects the 1st pin of multiplier U5, the 8th, 9,13,14 pins are unsettled;

The equal ground connection of 2nd, 4,6 pin of described multiplier U4, the 5th pin meets VEE, and the 7th pin is connected with operational amplifier U2 the 13rd pin by resistance R17, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U5, the 5th pin meets VEE, and the 7th pin is connected with the 13rd pin of operational amplifier U3 by resistance R7, and the 8th pin meets VCC;

The equal ground connection of 2nd, 4,6 pin of described multiplier U7, the 5th pin meets VEE, and the 7th pin connects the 1st pin of multiplier U4, and the 8th pin meets VCC.