CN105050318B - With the pcb board structure and its method of testing for burying resistance test section - Google Patents
With the pcb board structure and its method of testing for burying resistance test section Download PDFInfo
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- CN105050318B CN105050318B CN201510389916.5A CN201510389916A CN105050318B CN 105050318 B CN105050318 B CN 105050318B CN 201510389916 A CN201510389916 A CN 201510389916A CN 105050318 B CN105050318 B CN 105050318B
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- Prior art keywords
- layer
- pcb board
- resistance
- burying
- resistance layer
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/163—Monitoring a manufacturing process
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The invention discloses a kind of pcb board structure for having and burying resistance test section, including pcb board main body, if being provided with dried layer in pcb board main body buries resistance layer, all resistance layer in the vertical directions that bury are sequentially arranged at intervals, several instrument connections are provided with pcb board main body, instrument connection buries resistance layer through all, test wire harness is provided with each instrument connection, test wire harness include with each test lead for burying resistance layer independent connection, be fixed with an elastic guide bar on each test lead.The invention also discloses a kind of for the above-mentioned measuring method with the pcb board structure for burying resistance test section.The present invention can improve the deficiencies in the prior art, realize the complete detection for burying resistance layer, and be adjusted according to testing result to burying resistance layer resistance, save the time, reduce scrappage.
Description
Technical field
It is especially a kind of that there is the pcb board structure for burying resistance test section and its survey the present invention relates to PCB technical field
Method for testing.
Background technology
With the development of science and technology, requirement of the people to electronic product also more and more higher, therefore electronic component is also increasingly
Tend to miniaturization.In the design of existing PCB circuit boards, people, which gradually adopt, buries resistance material to replace the electricity in circuit
Resistance.The A of Chinese invention patent application CN 104619114 disclose it is a kind of have bury the PCB plates of resistance and bury the test side of resistance
Method, the resistivity for burying resistance material on whole pcb board can be detected.But the method for testing of this pcb board is only capable of
Accomplish to detect during sampling, and when discovery is buried and hinders undesirable, whole pcb board can only scrap processing, be unable to reach drop
The effect of low scrappage.
The content of the invention
There is the pcb board structure for burying resistance test section and its test side the technical problem to be solved in the present invention is to provide a kind of
Method, the deficiencies in the prior art can be improved, realize the complete detection for burying resistance layer, and according to testing result to burying resistance layer resistance
It is adjusted, saves the time, reduces scrappage.
In order to solve the above technical problems, the technical solution used in the present invention is as follows.
It is a kind of that there is the pcb board structure for burying resistance test section, including pcb board main body, buried if being provided with dried layer in pcb board main body
Resistance layer, all resistance layer in the vertical directions that bury are sequentially arranged at intervals, and several instrument connections, instrument connection are provided with pcb board main body
Resistance layer is buried through all, test wire harness is provided with each instrument connection, test wire harness includes burying what resistance layer was independently connected with each
Test lead, an elastic guide bar is fixed with each test lead.
Preferably, the resistance layer of burying includes insulated substrate, resistive layer is provided with insulated substrate（7）, the two of resistive layer
Side is provided with conductive layer, and conductive layer is set higher than resistive layer.
Preferably, the top surface of the insulated substrate is evenly arranged with several the first grooves, the bottom surface of resistive layer is set
Have and one-to-one first lug boss of the first groove；The top surface of resistive layer is provided with along the first of instrument connection orientation and led
Chute, the both sides of the first guiding gutter are staggeredly equipped with several the second guiding gutters, and the second guiding gutter mutually interconnects with the first guiding gutter
It is logical.
Preferably, the bottom surface of the insulated substrate is provided with several toothed regions, through hole is provided with toothed region, it is each
Through hole is coaxially disposed.
Preferably, the instrument connection is provided with arc flange with burying the junction of resistance layer.
Preferably, the madial wall of the instrument connection is provided with insulation laminating layer.
Preferably, being provided with several rubber threading holes in the test wire harness, test lead passes through rubber threading hole
It is connected with each resistance layer of burying.
A kind of method of testing for the pcb board structure that resistance test section is buried for above-mentioned having, comprises the following steps：
A, using universal meter connecting test wire to each resistance value buried in resistance layer between two neighboring instrument connection
Measure；
B, test wire harness is taken out, each different sections for burying resistance layer are divided into by conducting area, half according to step A measurement result
Area and insulation layer are turned on, conducting area, half are turned on by instrument connection using Signa Gel, semiconductive gel and insulating gels respectively
Area and insulation layer are filled.
Preferably, in step B, fill order for be sequentially filled from the bottom to top it is each bury resistance layer, often fill one layer and bury resistance
Layer, the resistance layer of burying after filling is remeasured by instrument connection using test wire harness and universal meter, according to measurement result pair
The filling mode for burying resistance layer not being filled is adjusted.
Preferably, in step B, in when burying resistance layer of one layer of surface of filling, the surface for burying resistance layer herein first is fixed absolutely
Edge cover, the height of insulating boot are controlled in 0.3mm~0.5mm, and insulating boot is divided according to conducting area, half conducting area and insulation layer
Interior setting baffle plate, insulating boot top open up hand-hole, guide groove are offered between adjacent hand-hole；After filling, by leading
Signa Gel and/or semiconductive gel are again filled with groove and/or insulating gels are corrected to the resistance value for burying resistance layer.
It is using beneficial effect caused by above-mentioned technical proposal：The present invention buries the arrangement of resistance layer by changing,
According to the design needs of circuit board while test, subregion is carried out to burying resistance layer, the gel for then carrying out different resistivity is filled out
Fill, realize the adjustment for burying resistance layer resistance.The structure for burying resistance layer designs for the implant operation in later stage, can improve gel with burying
The conjugation of resistance layer, the appearance of space and bubble is reduced, improve the precision for resistance adjustment.
Brief description of the drawings
Fig. 1 is the structure chart of pcb board in one embodiment of this hair.
Fig. 2 is the profile that resistance layer is buried in one embodiment of this hair.
Fig. 3 is the structure chart of instrument connection in one embodiment of this hair.
Fig. 4 is the structure chart that wire harness is tested in one embodiment of this hair.
Fig. 5 is the partial enlarged drawing at A positions in Fig. 4.
Fig. 6 is the top view of resistive layer top surface in one embodiment of this hair.
In figure：1st, pcb board main body；2nd, resistance layer is buried；3rd, instrument connection, 4, test wire harness, 5, test lead；6th, insulated substrate；
7th, resistive layer；8th, conductive layer；9th, the first groove；10th, the first lug boss；11st, the first guiding gutter；12nd, the second guiding gutter；13rd, tooth
Shape portion；14th, through hole；15th, arc flange；16th, insulate laminating layer；17th, rubber threading hole；18th, elastic guide bar；19th, metal is led
Silk；20th, ring shaped contact ring.
Embodiment
Reference picture 1-6, the specific embodiment of the present invention includes pcb board main body 1, if being provided with pcb board main body 1
Dried layer buries resistance layer 2, and all in the vertical directions of resistance layer 2 that bury are sequentially arranged at intervals, and several tests are provided with pcb board main body 1
Hole 3, instrument connection 3 bury resistance layer 2 through all, and test wire harness 4 is provided with each instrument connection 3, and test wire harness 4 includes burying with each
The test lead 5 that resistance layer 2 is independently connected, an elastic guide bar 18 is fixed with each test lead 5.Burying resistance layer 2 is included absolutely
Edge basic unit 6, resistive layer 7 is provided with insulated substrate 6, the both sides of resistive layer 7 are provided with conductive layer 8, and conductive layer 8 is higher than resistive layer
7 are set.The top surface of insulated substrate 6 is evenly arranged with several the first grooves 9, and the bottom surface of resistive layer 7 is provided with and the first groove 9
One-to-one first lug boss 10；The top surface of resistive layer 7 is provided with the first guiding gutter 11 along the orientation of instrument connection 3,
The both sides of first guiding gutter 11 are staggeredly equipped with several the second guiding gutters 12, and the second guiding gutter 12 and the first guiding gutter 11 are mutual
Connection.The bottom surface of insulated substrate 6 is provided with several toothed regions 13, and through hole 14 is provided with toothed region 13, and each through hole 14 is same
Axle is set.Instrument connection 3 is provided with arc flange 15 with burying the junction of resistance layer 2.The madial wall of instrument connection 3 is provided with insulation fitting
Layer 16.Several rubber threading holes 17 are provided with test wire harness 4, test lead 5 buries resistance by rubber threading hole 17 with each
Layer 2 connects.
In addition, the end of test lead 5 is provided with multiple wire guides 19, the end of each wire guide 19 is connected with one
Individual ring shaped contact ring 20.Contacted with burying resistance layer 2 and measured by ring shaped contact ring 20, the measurement contact surface of abundance can be provided
Product, measurement result is caused larger error occur because contact resistance is excessive when avoiding being repeatedly inserted into test.Ring shaped contact ring 20 is not
Mounting easily is produced with the external world, improves smoothness during test insertion.
A kind of method of testing for the pcb board structure that resistance test section is buried for above-mentioned having, comprises the following steps：
A, using universal meter connecting test wire 5 to each resistance buried in resistance layer 2 between two neighboring instrument connection 3
Value measures；
B, take out test wire harness 4, according to step A measurement result by each different sections for burying resistance layer 2 be divided into conducting area,
Half conducting area and insulation layer, respectively using Signa Gel, semiconductive gel and insulating gels by instrument connection 3 to conducting area, half
Conducting area and insulation layer are filled.Fill order for be sequentially filled from the bottom to top it is each bury resistance layer 2, often fill one layer bury resistance layer
2, the resistance layer 2 of burying after filling is remeasured by instrument connection 3 using test wire harness 4 and universal meter, according to measurement result
The filling mode for burying resistance layer not being filled is adjusted.In when burying resistance layer 2 of one layer of surface of filling, resistance is buried herein first
The surface fixed insulation cover of layer 2, the height of insulating boot are controlled in 0.3mm~0.5mm, according to conducting area, half conducting area and insulation
Being divided in insulating boot for area sets baffle plate, opens up hand-hole at the top of insulating boot, guide groove is offered between adjacent hand-hole；Filling
After, by being again filled with Signa Gel and/or semiconductive gel and/or insulating gels in guide groove to burying the electricity of resistance layer 2
Resistance is corrected.
Wherein, Signa Gel includes 27wt% silver powder, 12wt% zinc oxide, 3.5wt% benzene sulfonic acid sodium salt, the two of 2wt%
Ethylisopropanolamine, 10wt% isopropyl propionate, 1.5wt% to fluoro thiophenol, surplus is epoxy resin.Semiconductive gel bag
Include 11wt% silver powder, 5wt% zinc oxide, 5wt% 4- Hydrazinobenzenesulfonamides, 7.5wt% 5- bromines Methyl anthranilate,
2wt% PTPP, 3.5wt% to fluoro thiophenol, surplus is epoxy resin.Insulating gels include the poly- to benzene of 12wt%
Dioctyl phthalate butanediol ester, 3wt% acetone, 1.2wt% glass fibre, 5wt% 3,5- difluorobenzamides, 13wt% it is thio
Propyl acetate, surplus are epoxy resin.
Because each resistance value buried between resistance layer is there is interactional relation, in step B, in measurement result to not
It is pre- with calculating according to the actual value for burying resistance layer after filling during the filling mode for burying resistance layer being filled is adjusted
The deviation of valuation, show that the influence coefficient that resistance layer buries resistance layer for top layer is buried in lower section, and using this influence coefficient to that will inject
Gel variations and injection rate be modified.
The present invention can to pcb board bury resistance carry out comprehensively detect and adjust, can by pcb board bury hinder this process
In scrappage be reduced to by about 0.8 ‰ or so of prior art within 0.1 ‰.
The general principle and principal character and advantages of the present invention of the present invention has been shown and described above.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the simply explanation described in above-described embodiment and specification is originally
The principle of invention, without departing from the spirit and scope of the present invention, various changes and modifications of the present invention are possible, these changes
Change and improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (9)
1. a kind of have the pcb board structure for burying resistance test section, including pcb board main body（1）, pcb board main body（1）Inside it is provided with some
Layer buries resistance layer（2）, it is characterised in that：It is all to bury resistance layer（2）In the vertical direction is sequentially arranged at intervals, pcb board main body（1）On set
It is equipped with several instrument connections（3）, instrument connection（3）Resistance layer is buried through all（2）, each instrument connection（3）Inside it is provided with test wire harness
（4）, test wire harness（4）Including burying resistance layer with each（2）The test lead of independent connection（5）, each test lead（5）Upper fixation
There is an elastic guide bar（18）；It is described to bury resistance layer（2）Including insulated substrate（6）, insulated substrate（6）On be provided with resistive layer
（7）, resistive layer（7）Both sides be provided with conductive layer（8）, conductive layer（8）Higher than resistive layer（7）Set.
2. according to claim 1 have the pcb board structure for burying resistance test section, it is characterised in that：The insulated substrate（6）
Top surface be evenly arranged with several the first grooves（9）, resistive layer（7）Bottom surface be provided with and the first groove（9）Correspond
The first lug boss（10）；Resistive layer（7）Top surface be provided with along instrument connection（3）First guiding gutter of orientation（11）,
First guiding gutter（11）Both sides be staggeredly equipped with several the second guiding gutters（12）, the second guiding gutter（12）With the first guiding gutter
（11）It is interconnected.
3. according to claim 1 have the pcb board structure for burying resistance test section, it is characterised in that：The insulated substrate（6）
Bottom surface be provided with several toothed regions（13）, toothed region（13）On be provided with through hole（14）, each through hole（14）It is coaxially disposed.
4. according to claim 1 have the pcb board structure for burying resistance test section, it is characterised in that：The instrument connection（3）With
Bury resistance layer（2）Junction be provided with arc flange（15）.
5. according to claim 1 have the pcb board structure for burying resistance test section, it is characterised in that：The instrument connection（3）'s
Madial wall is provided with insulation laminating layer（16）.
6. according to claim 1 have the pcb board structure for burying resistance test section, it is characterised in that：The test wire harness（4）
Inside it is provided with several rubber threading holes（17）, test lead（5）Pass through rubber threading hole（17）Resistance layer is buried with each（2）Even
Connect.
7. a kind of method of testing for the pcb board structure that resistance test section is buried for having described in claim 1-6 any one, its
It is characterised by comprising the following steps：
A, using universal meter connecting test wire（5）Resistance layer is buried to each（2）It is upper to be located at two neighboring instrument connection（3）Between electricity
Resistance measures；
B, test wire harness is taken out（4）, resistance layer is buried by each according to step A measurement result（2）Different sections be divided into conducting area,
Half conducting area and insulation layer, pass through instrument connection using Signa Gel, semiconductive gel and insulating gels respectively（3）To conducting area,
Half conducting area and insulation layer are filled.
8. the method for testing with the pcb board structure for burying resistance test section according to claim 7, it is characterised in that：Step B
In, fill order each buries resistance layer to be sequentially filled from the bottom to top（2）, often fill one layer and bury resistance layer（2）, use test wire harness
（4）Pass through instrument connection with universal meter（3）To burying resistance layer after filling（2）Remeasured, according to measurement result to not carrying out
The filling mode for burying resistance layer of filling is adjusted.
9. the method for testing with the pcb board structure for burying resistance test section according to claim 7, it is characterised in that：Step B
In, bury resistance layer on one layer of surface of filling（2）When, bury resistance layer herein first（2）Surface fixed insulation cover, the height of insulating boot
Control in 0.3mm~0.5mm, baffle plate is set according to conducting area, half conducting area and being divided in insulating boot for insulation layer, insulating boot
Top opens up hand-hole, and guide groove is offered between adjacent hand-hole；After filling, by being again filled with conduction electrocoagulation in guide groove
Glue and/or semiconductive gel and/or insulating gels are to burying resistance layer（2）Resistance value be corrected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510389916.5A CN105050318B (en) | 2015-07-06 | 2015-07-06 | With the pcb board structure and its method of testing for burying resistance test section |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510389916.5A CN105050318B (en) | 2015-07-06 | 2015-07-06 | With the pcb board structure and its method of testing for burying resistance test section |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105050318A CN105050318A (en) | 2015-11-11 |
| CN105050318B true CN105050318B (en) | 2017-11-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510389916.5A Active CN105050318B (en) | 2015-07-06 | 2015-07-06 | With the pcb board structure and its method of testing for burying resistance test section |
Country Status (1)
| Country | Link |
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| CN (1) | CN105050318B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113552416A (en) * | 2021-06-30 | 2021-10-26 | 惠州市金百泽电路科技有限公司 | Method for measuring resistance value of inner-layer buried resistance pattern of circuit board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1228534A (en) * | 1998-12-25 | 1999-09-15 | 北京航空材料研究院 | Electrical measurement method for measuring conducting material structure |
| CN101072467A (en) * | 2006-05-09 | 2007-11-14 | 株式会社电装 | Component-embedded board device and faulty wiring detecting method for the same |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4477484A (en) * | 1982-12-10 | 1984-10-16 | International Business Machines Corporation | Electroless plating monitor |
| JP2003322665A (en) * | 2002-05-01 | 2003-11-14 | Jsr Corp | Connector for electric resistance measurement and device and method for measuring electric resistance of circuit board |
-
2015
- 2015-07-06 CN CN201510389916.5A patent/CN105050318B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1228534A (en) * | 1998-12-25 | 1999-09-15 | 北京航空材料研究院 | Electrical measurement method for measuring conducting material structure |
| CN101072467A (en) * | 2006-05-09 | 2007-11-14 | 株式会社电装 | Component-embedded board device and faulty wiring detecting method for the same |
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| Publication number | Publication date |
|---|---|
| CN105050318A (en) | 2015-11-11 |
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Address after: Jiangsu province 210000 hole Lishui Economic Development Zone of Nanjing City Road, No. 7 Applicant after: Jiangsu Ben Chuan intelligent circuit Polytron Technologies Inc Address before: 210000 Lishui Economic Development Zone, Jiangsu, Nanjing Applicant before: NANJING ALLFAVOR ELECTRONIC CO., LTD. |
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