CN105049056B - A kind of one-hot encoding detection circuit - Google Patents
A kind of one-hot encoding detection circuit Download PDFInfo
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- CN105049056B CN105049056B CN201510483798.4A CN201510483798A CN105049056B CN 105049056 B CN105049056 B CN 105049056B CN 201510483798 A CN201510483798 A CN 201510483798A CN 105049056 B CN105049056 B CN 105049056B
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Abstract
The present invention relates to a kind of one-hot encoding detection circuit.There are larger area and the expense of time for the detection of overlength one-hot encoding for available circuit.The one-hot encoding detection circuit of the present invention includes one input compression module group and a state detection module based on dichotomy.The input compression module group is made of multi-stage compression module, and more bit input datas are compressed into 2 bit output states；The state detection module rules out input bit according to 2 bit status that input compression module exports and is complete zero, has that 1 bit is 1 or to have more bits be 1.The input compression module group includes the multistage input compression module of series connection, and N grades of input compression modules are two N, 1 grade of input compression module arranged side by side.The present invention realizes the detection of one-hot encoding using dichotomy, particularly suitable for overlength one-hot encoding detection of the bit number more than 1000.Present invention design is succinct, saves circuit area, reduces power consumption, the advantage for also having speed.
Description
Technical field
The present invention relates to a kind of one-hot encoding detection circuit, belong to IC design technical field.
Background technology
One-hot encoding, is referred to as one-hot code in english literature, it is directly perceived for be exactly how many state with regard to how many
Bit, and only a bit is 1, and other are all a kind of 0 code system.One-hot encoding can effectively improve circuit speed and can
By property, in encoder state machine, transmission coding etc. is when application.
One-hot coding has many disarmed states, and the validity of one-hot encoding should be examined in the occasion using one-hot encoding
Survey.Otherwise when disarmed state is entered, circuit will be in error condition.
Detection for the less one-hot encoding of status number can be realized using simple combinational circuit.But when status number increases
Added-time, the detection circuit complexity of one-hot encoding sharply increase.Special circuit is needed to realize for the one-hot encoding of overlength.
For smaller or medium scale one-hot encoding detection circuit can will coding -1 again with original encoding step-by-step with, after operation
All bit phases of data or and export H；All bit phases of coding and output state position G.When it is 1 that coding, which only has 1 bit,
G=0, H=1；When it is 1 that coding, which has more than 1 bit, G=1, H=1；When being encoded to complete zero, G=1, H=0.According to G and H
Value can detect the state of one-hot encoding.But this method needs the subtracter of bit more than one.After bit number increase, subtraction
Device is on a grand scale, and speed can not improve.
Chinese patent application《A kind of one-hot encoding detection method and one-hot encoding detector》(application number：201510023614) carry
A kind of detection method and detector of expansible one-hot encoding are gone out.It is only for overlength but the circuit that this application proposes is complicated
There are larger area and the expense of time for hot code detection.
The content of the invention
The purpose of the present invention is overcome deficiency of the prior art, there is provided a kind of one-hot encoding detection circuit.
The one-hot encoding detection circuit of the present invention includes an input compression module group based on dichotomy and a state inspection
Survey module.The input compression module group is made of multi-stage compression module, and more bit input datas are compressed into the output of 2 bits
State；The state detection module according to 2 bit status that input compression module group exports rule out input bit for complete zero,
Have that 1 bit is 1 or there are more bits be 1.
Inputting compression module group includes the multistage input compression module of series connection, and N grades of input compression modules are arranged side by side two
A N-1 grades of inputs compression module, N are the natural number more than 1.
1st grade of input compression module has 4 input ports, 2 output ports；2nd grade of input compression module has 8 inputs
Port, 4 output ports；And so on, N grades of input compression modules have 2(N+1)A input port, 2NA output port.
1st grade input compression module structure be：It is non-including two three inputs and door, two two input OR gates and ten
Door；One or three input connects the output terminal of first liang of input OR gate with one of door input, another two input the first NOT gate of termination and
The output of the output of second NOT gate, the one or three input and door connects the input of the 3rd NOT gate, two inputs of first liang of input OR gate
The output of the 4th NOT gate and the output of the 5th NOT gate are connect respectively；Two or three input and an input of door connect second liang of input OR gate
Output terminal, the output of another two input the 6th NOT gate of termination and the 7th NOT gate, to connect the 8th non-for the two or three input and the output of door
The input of door, two of second liang of input OR gate input the output and the output of the tenth NOT gate that connect the 9th NOT gate respectively；4th is non-
The input of door is connected with the input of the 7th NOT gate, the first input end as the input compression module；The input of 5th NOT gate and
The input connection of 6th NOT gate, the second input terminal as the input compression module；The input of first NOT gate and the tenth NOT gate
Input connection, the 3rd input terminal as the input compression module；The input of second NOT gate is connected with the input of the 9th NOT gate, is made
For the 4th input terminal of the input compression module；The output of 3rd NOT gate and the output of the 8th NOT gate are as the input compression module
Two output terminals.The structure of 2nd grade of input compression module is two the 1st grade of input compression modules arranged side by side, its four export
Four input terminals of the end respectively with the 1st grade of input compression module are connected；And so on, the 2 of N grades of input compression modules of most end(N +1)Input terminal of a input terminal as whole one-hot encoding detection circuit.
The state detection module includes two two inputs and door, two input XOR gates and three NOT gates；First
Two inputs and two inputs of door connect the output of the 11st NOT gate and the output of the 12nd NOT gate, first liang of input and door respectively
Output connects the input of the 13rd NOT gate；The input of 11st NOT gate, an input of two input XOR gates, second liang of input and door
An input connect, an input terminal as state detection module；The input of 12nd NOT gate, two input the another of XOR gates
One input, second liang of input connect with another input of door, another input terminal as state detection module；13rd
Three with the output of door respectively as state detection module of the output of NOT gate, the output, second liang of input of two input XOR gates
Output terminal, and the output terminal of whole one-hot encoding detection circuit；Two input terminals of state detection module connect the 1st grade of input respectively
Two output terminals of compression module.
The present invention realizes the detection of one-hot encoding using dichotomy, solely hot particularly suitable for overlength of the bit number more than 1000
Code detection.Present invention design is succinct, saves circuit area, reduces power consumption, the advantage for also having speed.
Brief description of the drawings
Fig. 1 is circuit structure schematic diagram；
Fig. 2 is the structure diagram of the 1st grade of input compression module in Fig. 1；
Fig. 3 is the structure diagram of state detection module in Fig. 1.
Embodiment
Such as Fig. 1, a kind of one-hot encoding detection circuit, which includes, one input compression module group C and a state based on dichotomy
Detection module D.The input compression module group C is made of multi-stage compression module, and more bit input datas are compressed into 2 bits
Output state；It is complete that the state detection module D rules out input bit according to 2 bit status that input compression module exports
0th, have that 1 bit is 1 or there are more bits be 1.
Inputting compression module group C includes the multistage input compression module of series connection, and N grades of input compression module C (N) are arranged side by side
Two N-1 grades of input compression module C (N-1), N is natural number more than 1.
1st grade of input compression module C (1) has 4 input ports, 2 output ports；2nd grade of input compression module C (2)
There are 8 input ports, 4 output ports；And so on, N grades of input compression module C (N) have 2(N+1)A input port, 2NIt is a
Output port.
Such as Fig. 2, the structure of the 1st grade of input compression module C (1) is：Including two three inputs and door, two two input OR gates
With ten NOT gates；One or three input and an input of door 11 connect the output terminal of first liang of input OR gate 21, another two input terminal
The output of the first NOT gate 301 and the second NOT gate 302 is connect, the one or three input and the output of door 11 connect the input of the 3rd NOT gate 303, the
Two of one or two input OR gate 21 input connects the output of the 4th NOT gate 304 and the output of the 5th NOT gate 305 respectively；Two or three input
An input with door 12 connects the output terminal of second liang of input OR gate 22, and another two input the 6th NOT gate 306 and the 7th of termination is non-
The output of the output of door 307, the two or three input and door 12 meets the input of the 8th NOT gate 308, second liang of input OR gate 22 two
Input connects the output of the 9th NOT gate 309 and the output of the tenth NOT gate 310 respectively；The input of 4th NOT gate 304 and the 7th NOT gate 307
Input connection, the first input end as the input compression module；The input of 5th NOT gate 305 is defeated with the 6th NOT gate 306
Enter connection, the second input terminal as the input compression module；The input of first NOT gate 301 and the input of the tenth NOT gate 310 connect
Connect, the 3rd input terminal as the input compression module；The input of second NOT gate 302 is connected with the input of the 9th NOT gate 309, is made
For the 4th input terminal of the input compression module；The output of 3rd NOT gate 303 and the output of the 8th NOT gate 308 are as the input pressure
Two output terminals of contracting module.
The structure of 2nd grade of input compression module C (2) is two the 1st grade of input compression module C (1) arranged side by side, its four defeated
Four input terminals of the outlet respectively with the 1st grade of input compression module C (1) are connected；And so on, most final stage input compression module C
(N) 2(N+1)Input terminal of a input terminal as whole one-hot encoding detection circuit.
As Fig. 3, state detection module D include two two inputs and door, two input XOR gates and three NOT gates；First
Two inputs and two inputs of door 41 connect the output of the 11st NOT gate 311 and the output of the 12nd NOT gate 312 respectively, and first liang defeated
Enter the input that the output with door 41 connects the 13rd NOT gate 313；The input of 11st NOT gate 311, two inputs one of XOR gates 51
Input, second liang of input connect with an input of door 42, an input terminal as state detection module；12nd NOT gate
312 input, another input, the second liang of input of two input XOR gates 51 connect with another input of door 42, as shape
Another input terminal of state detection module；The output d1 of 13rd NOT gate 313, two input XOR gates 51 output d2, second liang
Three output terminals of the output d3 of input and door 42 as state detection module, and the output of whole one-hot encoding detection circuit
End；Two input terminals of state detection module connect two output terminals of the 1st grade of input compression module respectively.
When the bit number K of input one-hot encoding detection circuit is more than 2N, and less than 2(N+1)When, then input increase by 2(N+1)- K bit
Zero-signal, make final process bit number be 2(N+1), N is the natural number more than 1.
When the bit number K of input one-hot encoding detection circuit is equal to 2(N+1)When, it is 2 by an input bit number(N+1)It is defeated
Enter compression module group and export 2 bits, the 2 bits output of input compression module group enters state detection module.
Illustrated below by taking the one-hot encoding detection circuit of 7 bits as an example.Because 227 ＜ 2 of ＜(2+1), so taking N=2.Will
The 0 of one-hot encoding input 1 bit of increase of 7 bits, forms the one-hot encoding input of 8 bits.Because one-hot encoding increases the 0 of any bit
1 number of one-hot encoding will not be changed.So the defeated of one-hot encoding detection circuit will not be changed by increasing the input of the 0 of any bit
Go out.The input compression module that input bit number is 8 is made of C (2) and the C (1) of cascade.The input that input bit number is 8 is compressed
The 2 bits output of module is connected to the input of state detection module.The output of state detection module is the one-hot encoding inspection of 7 bits
The output of slowdown monitoring circuit.When the one-hot encoding for inputting 7 bits is full 0, the output of one-hot encoding detection circuit is d1=1, d2=0, d3=
0, judgement input coding bit is complete zero；When the one-hot encoding for inputting 7 bits has and only 1 bit is 1, one-hot encoding detection circuit
It is 1 to there is 1 bit to export as d1=0, d2=1, d3=0, judgement input coding bit；When input 7 bits one-hot encoding have it is super
Cross 1 bit for 1 when, the output of one-hot encoding detection circuit be d1=0, d2=0, d3=1, adjudicates input coding and is than peculiar more bits
1.Complete the function of the one-hot encoding detection circuit of 7 bits.
It should be appreciated that examples detailed above is the description of the invention, rather than limitation of the present invention, it is any without departing from
Innovation and creation in the range of true spirit, each fall within protection scope of the present invention.
Claims (2)
1. a kind of one-hot encoding detection circuit, including one input compression module group and a state-detection mould based on dichotomy
Block；It is characterized in that：The input compression module group is made of multi-stage compression module, and more bit input datas are compressed into 2
Bit output state；The state detection module rules out input ratio according to 2 bit status that input compression module group exports
Specially for complete zero, have that 1 bit is 1 or there are more bits be 1；
Inputting compression module group includes the multistage input compression module of series connection, and N grade input compression modules are two side by side the
N-1 grades of input compression modules, N are the natural number more than 1；
1st grade of input compression module has 4 input ports, 2 output ports；2nd grade of input compression module has 8 input terminals
Mouth, 4 output ports；And so on, N grades of input compression modules have 2(N+1)A input port, 2NA output port；
1st grade input compression module structure be：Including two three inputs and door, two two input OR gates and ten NOT gates；The
One or three inputs and an input of door (11) connect the output terminal of first liang of input OR gate (21), another two input the first NOT gate of termination
(301) and the second NOT gate (302) output, the one or three input connects the input of the 3rd NOT gate (303) with the output of door (11), first
Two inputs of two input OR gates (21) connect the output of the 4th NOT gate (304) and the output of the 5th NOT gate (305) respectively；Two or three
Input and an input of door (12) connect the output terminal of second liang of input OR gate (22), another two input the 6th NOT gate of termination
(306) and the 7th NOT gate (307) output, the two or three input connects the input of the 8th NOT gate (308) with the output of door (12), second
Two inputs of two input OR gates (22) connect the output of the 9th NOT gate (309) and the output of the tenth NOT gate (310) respectively；4th is non-
The input of door (304) is connected with the input of the 7th NOT gate (307), the first input end as the input compression module；5th is non-
The input of door (305) is connected with the input of the 6th NOT gate (306), the second input terminal as the input compression module；First is non-
The input of door (301) is connected with the input of the tenth NOT gate (310), the 3rd input terminal as the input compression module；Second is non-
The input of door (302) is connected with the input of the 9th NOT gate (309), the 4th input terminal as the input compression module；3rd is non-
Two output terminals of the output of door (303) and the output of the 8th NOT gate (308) as the input compression module；
The structure of 2nd grade of input compression module is two the 1st grade of input compression modules arranged side by side, its four output terminals are respectively with the
Four input terminals connection of 1 grade of input compression module；And so on, the 2 of N grades of input compression modules of most end(N+1)A input terminal
Input terminal as whole one-hot encoding detection circuit；
The state detection module includes two two inputs and door, two input XOR gates and three NOT gates；First liang defeated
Enter and connect the output of the 11st NOT gate (311) and the output of the 12nd NOT gate (312) respectively with two of door (41) inputs, first liang
Input and the output of door (41) connect the input of the 13rd NOT gate (313)；The input of 11st NOT gate (311), two input XOR gates
(51) input, second liang of input connects with an input of door (42), an input terminal as state detection module；
The input of 12nd NOT gate (312), two input XOR gates (51) another input, second liang input with door (42) another
Input connects, another input terminal as state detection module；The output of 13rd NOT gate (313), two input XOR gates
(51) output, the output of second liang of input and door (42) respectively as state detection module three output terminals, and entirely
The output terminal of one-hot encoding detection circuit；Two input terminals of state detection module meet two of the 1st grade of input compression module respectively
Output terminal.
A kind of 2. one-hot encoding detection circuit as claimed in claim 1, it is characterised in that：When the input one-hot encoding detection circuit
Bit number K be more than 2N, and less than 2(N+1)When, then input increase by 2(N+1)The zero-signal of-K bit, makes the bit number of final process
For 2(N+1), N is the natural number more than 1；
When the bit number K for inputting the one-hot encoding detection circuit is equal to 2(N+1)When, it is 2 by an input bit number(N+1)It is defeated
Enter compression module group and export 2 bits, the 2 bits output of input compression module group enters state detection module.
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