CN104993048A - Resistor-type storage unit based on annealing adjustment, and preparation method - Google Patents
Resistor-type storage unit based on annealing adjustment, and preparation method Download PDFInfo
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- CN104993048A CN104993048A CN201510363761.8A CN201510363761A CN104993048A CN 104993048 A CN104993048 A CN 104993048A CN 201510363761 A CN201510363761 A CN 201510363761A CN 104993048 A CN104993048 A CN 104993048A
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Abstract
The invention discloses a resistor-type storage unit based on annealing adjustment, and the storage unit comprises a film substrate (1), a single micro-nano material (2), metal electrodes (3), and a copper conductor (4). The single micro-nano material (2) is placed on the film substrate (1), and two ends of the single micro-nano material (2) are welded with the metal electrodes (3). The metal electrodes (3) are welded with the copper conductor (4). The film substrate (1) is made of polyimide or polyethylene glycol terephthalate films. The single micro-nano material (2) is a lead sulfide material shaped like a quadrangular prism, and the metal electrodes (3) are silver electrodes. The storage unit can achieve no annealing at two ends, can achieve annealing at one end, or can achieve annealing at two ends. The storage unit has a flexible structure, is good in resistor switching performance, can serve as a durable storage unit for use, is simple in manufacture technology of devices, and is convenient for actual use.
Description
Technical field
The invention belongs to micro-nano technical field of electronic devices, be specifically related to the resistance-type memory of single one-dimensional micro-nanometer structural material under different annealing conditions and preparation method.
Technical background
Memory is an indispensable part in whole IC market, and the memory used at present is mainly divided into volatility random asccess memory and non-volatility memorizer two class.And non-volatile flash storage is because its transmission speed becomes the main body of whole storage market soon.Along with the arriving in electronic product intelligence epoch, the persistent request of memory improves constantly, and the size of memory device is also constantly reducing, and this just causes the storage density based on the Flash flash memory of MOS structure to be difficult to continue to improve.Therefore research and develop the non-volatility memorizer that storage density is high, storage speed is fast, persistence is strong and will become the inexorable trend of memory development from now on.
The characteristic that micro Nano material has not available for many general materials because its size is little, the resistance switch performance that such as blemish causes is exactly one of its characteristic.After micro Nano material adds a larger reverse voltage, resistance can reduce suddenly, namely becomes low resistive state LRS from high-impedance state HRS, and can get back to original high-impedance state again by adding larger forward bias material resistance.By this performance, we can make memory device micro Nano material, and this memory device has good persistence.Because annealing can affect System of Detecting Surface Defects For Material, therefore anneal and also can regulate the memory property of micro Nano material memory.
Summary of the invention
The object of the invention is propose a kind of preparation method of memory and regulate the method for memory property.
The present invention is achieved through the following technical solutions.
Resistive memory device of the present invention comprises film substrate (1), single micro Nano material (2), metal electrode (3), copper conductor (4).Single micro Nano material (2) is put in film substrate (1), and its two ends weld metal electrode (3), metal electrode is soldering copper wire (4) again.
Film substrate of the present invention is the non-conductive type thin-film material such as polyimides (Kapton) or PETG (PET), described single micro Nano material is vulcanized lead (PbS) material of quadrangular shape, and described metal electrode is silver (Ag) electrode.
Memory device of the present invention has three kinds: one is all unannealed memory devices in two ends, a kind of memory device being one end and annealing, finally a kind of memory device being two ends and all annealing.
The unannealed memory device preparation method in two ends of the present invention is that the smooth film substrate of 0.5 ~ 1mm places single micro Nano material at thickness, then to burn-on at single micro Nano material two ends metal electrode, place 3 ~ 5 hours in the atmospheric environment of cleaning, finally difference welding lead on the metal electrode of two ends, then place 5 ~ 10 hours in clean atmosphere environment.
The memory device preparation method of one end of the present invention annealing places single micro Nano material in smooth film substrate, then to burn-on in single micro Nano material one end metal electrode, then the annealing furnace putting into 250 ~ 300 DEG C is annealed 20min, place 1 hour in the atmospheric environment of cleaning after taking-up, to burn-on metal electrode at the other end of single micro Nano material again, finally difference welding lead on the metal electrode of two ends, places 5 ~ 10 hours in clean atmosphere environment.
The memory device preparation method all annealed in two ends of the present invention places single micro Nano material in smooth film substrate, then to burn-on at single micro Nano material two ends metal electrode, then the annealing furnace putting into 250 ~ 300 DEG C is annealed 20min, place 1 hour in the atmospheric environment of cleaning after taking-up, finally difference welding lead on the metal electrode of two ends, places 5 ~ 10 hours in clean atmosphere environment.
Flexible structure of the present invention has good resistance switch performance, can be used as persistent storage device and uses, and the manufacture craft of device is simple, is conducive to practical application.
Accompanying drawing explanation
Fig. 1 is the front cross-sectional schematic diagram of resistance-type memory.Wherein, 1 is film substrate, and 2 is single micro-nanometer structural materials, and 3 is metal electrodes, and 4 is wires.
Fig. 2 is the I-V curve chart of the unannealed memory in two ends, and added is 1V triangular waveform alternating voltage, 1.-be 6. voltage scanning direction, electric current is a microampere order of magnitude.As can be seen from the figure this device has non-crossing type resistance switch effect.
Fig. 3 is the I-V curve chart of one end annealing memory, and added is 1V triangular waveform alternating voltage, 1.-be 7. voltage scanning direction, electric current is a milliampere order of magnitude.As can be seen from the figure this device has chiasma type resistance switch effect.
Fig. 4 all anneals the I-V curve chart of memory in two ends, and added is 1V triangular waveform alternating voltage, 1.-be 4. voltage scanning direction, electric current is a milliampere order of magnitude.As can be seen from the figure this device has non-crossing type quasi-resistance switching effect.
Fig. 5 is the memory property test result figure of the unannealed memory in two ends, and when adding one very little back bias voltage (-0.1V), device current is very little, presents high-impedance state.When adding one higher back bias voltage (-2V), electric current obviously become large and voltage gets back to-0.1V time device resistance reduce to present low resistive state, the change of resistance means the write of information.And when adding one higher positive bias (2V), device current forward increases and voltage gets back to-0.1V time device resistance become again initial high-impedance state again, this means that the forward bias of increasing is the erase process of an information.In figure, 1 is voltage, and 2 is corresponding curent changes.
Fig. 6 is the enlarged drawing of Fig. 5 dotted box portion, correspond to a circulation of information write and erasing.
Fig. 7 is the memory property test result figure of one end annealing memory device, and its making alive is the same with Fig. 5 with change procedure, unlike the order of magnitude of device current.
Fig. 8 is the enlarged drawing of Fig. 7 dotted box portion, correspond to a circulation of information write and erasing.
Embodiment
Below by embodiment, further describe three kinds of resistive memory devices that the present invention proposes.
Embodiment 1.
Single PbS nano wire is placed in the Kapton film substrate of smooth cleaning, to burn-on at PbS nano wire two ends silver electrode, place 3 hours under clean atmosphere environment, then in two end electrodes soldering copper wire respectively, place 5 hours under clean atmosphere environment, Here it is all unannealed memory device in two ends.
As can be seen from Figure 5 ,-0.1V reads electric current, adds that resistance reduction ER effect is large afterwards compared with high back bias voltage (-2V), thus written information.The positive bias effect after-current that 2V is high is returned to initial conditions, and before meaning, the information of write is wiped free of, Here it is a complete information storing process.
Embodiment 2.
Single PbS nano wire is placed in the Kapton film substrate of smooth cleaning, to burn-on in PbS nano wire one end silver electrode, place 3 hours under clean atmosphere environment, then anneal 20min in the annealing furnace of 250 DEG C, take out and place 3 hours in clean atmosphere environment, then to burn-on silver electrode at the nano wire other end, finally soldering copper wire respectively in two end electrodes, place 5 hours under clean atmosphere environment, Here it is one end annealing memory device.
As can be seen from Figure 7, its voltage added and storing process the same with Fig. 5, but its corresponding size of current is different, this just illustrates the memory property that can be regulated memory by annealing.
Embodiment 3.
Single PbS nano wire is placed in the Kapton film substrate of smooth cleaning, to burn-on at PbS nano wire two ends silver electrode, place 3 hours under clean atmosphere environment, difference soldering copper wire in two end electrodes again, then anneal 20min in the annealing furnace of 250 DEG C, take out and place 5 hours in clean atmosphere environment, Here it is two ends all anneal memory device.
Because the storage of the nano materials such as PbS is relevant with its blemish, two ends annealing effectively can eliminate blemish, so it shows quasi-resistance switch performance.
The present invention is not limited to the memory device that PbS nano material is made, and much other nano material has similar phenomenon, and therefore the method has certain applicability.
Claims (4)
1. the resistance-type memory regulated based on annealing, it is characterized in that comprising film substrate (1), single micro Nano material (2), metal electrode (3), copper conductor (4), single micro Nano material (2) is put in film substrate (1), its two ends weld metal electrode (3), metal electrode is soldering copper wire (4) again;
Described film substrate is polyimides or pet film material, and described single micro Nano material is the vulcanized lead material of quadrangular shape, and described metal electrode is silver electrode;
Described resistance-type memory is that two ends are all unannealed, anneal in one end or all anneal in two ends.
2. the preparation method of a kind of resistance-type memory based on annealing adjustment described in claims 1, it is characterized in that the unannealed memory device preparation method in described two ends places single micro Nano material in smooth film substrate, then to burn-on at single micro Nano material two ends metal electrode, place 3 ~ 5 hours in the atmospheric environment of cleaning, finally difference welding lead on the metal electrode of two ends, then place 5 ~ 10 hours in clean atmosphere environment.
3. the preparation method of a kind of resistance-type memory based on annealing adjustment described in claims 1, it is characterized in that the memory device preparation method of described one end annealing places single micro Nano material in smooth film substrate, then to burn-on in single micro Nano material one end metal electrode, then the annealing furnace putting into 250 ~ 300 DEG C is annealed 20min, place 1 hour in the atmospheric environment of cleaning after taking-up, to burn-on metal electrode at the other end of single micro Nano material again, finally difference welding lead on the metal electrode of two ends, place 5 ~ 10 hours in clean atmosphere environment.
4. the preparation method of a kind of resistance-type memory based on annealing adjustment described in claims 1, it is characterized in that the memory device preparation method annealed at described two ends places single micro Nano material in smooth film substrate, then to burn-on at single micro Nano material two ends metal electrode, then the annealing furnace putting into 250 ~ 300 DEG C is annealed 20min, place 1 hour in the atmospheric environment of cleaning after taking-up, finally difference welding lead on the metal electrode of two ends, places 5 ~ 10 hours in clean atmosphere environment.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109065711A (en) * | 2018-08-01 | 2018-12-21 | 河北大学 | A kind of solid electrolyte resistance-variable storing device and preparation method thereof |
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| US20100044678A1 (en) * | 2008-08-21 | 2010-02-25 | International Business Machines Corporation | Method of placing a semiconducting nanostructure and semiconductor device including the semiconducting nanostructure |
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| US20100044678A1 (en) * | 2008-08-21 | 2010-02-25 | International Business Machines Corporation | Method of placing a semiconducting nanostructure and semiconductor device including the semiconducting nanostructure |
| CN103840080A (en) * | 2013-12-05 | 2014-06-04 | 南昌大学 | Voltage control storage based on one-dimensional cadmium doping zinc oxide nanowire and preparing method of voltage control storage |
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| JIANPING ZHENG ET AL.: "Modulation of Surface Trap Induced Resistive Switching by Electrode Annealing in Individual PbS Micro/Nanowire-Based Devices for Resistance Random Access Memory", 《ACS APPLIED MATERIALS & INTERFACES》 * |
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Application publication date: 20151021 |