CN104993030A - Method for preparing P-type low-defect silicon carbide epitaxial wafer - Google Patents
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- CN104993030A CN104993030A CN201510309580.7A CN201510309580A CN104993030A CN 104993030 A CN104993030 A CN 104993030A CN 201510309580 A CN201510309580 A CN 201510309580A CN 104993030 A CN104993030 A CN 104993030A
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 61
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title abstract description 12
- 230000007547 defect Effects 0.000 claims abstract description 36
- 238000002360 preparation method Methods 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000000463 material Substances 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 4
- 239000002019 doping agent Substances 0.000 claims description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 26
- 229910052710 silicon Inorganic materials 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 23
- 229910052799 carbon Inorganic materials 0.000 claims description 23
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 claims description 12
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000000576 coating method Methods 0.000 claims description 10
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000007664 blowing Methods 0.000 abstract 1
- 238000009776 industrial production Methods 0.000 abstract 1
- 239000013049 sediment Substances 0.000 abstract 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 25
- 229910052739 hydrogen Inorganic materials 0.000 description 25
- 239000001257 hydrogen Substances 0.000 description 25
- 239000007789 gas Substances 0.000 description 15
- 238000010792 warming Methods 0.000 description 15
- 238000000407 epitaxy Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
The invention provides a method for preparing a P-type low-defect silicon carbide epitaxial wafer, comprising the steps of substrate preparation, online substrate etching, buffer layer growth and epitaxial layer growth, wherein the epitaxial layer is grown in an approach of 'growing, etching, blowing and re-growing'. By adopting the method, the dislocation density of the base plane is reduced effectively, the sediment in the cavity is reduced, the defect density of the silicon carbide epitaxial surface is reduced, and the quality of the silicon carbide epitaxial material is improved. Moreover, the method has a wide range of applications, makes the production cost low, and is suitable for industrial production.
Description
Technical field
The present invention relates to a kind of preparation method of semi-conducting material, be specifically related to a kind of preparation method of silicon carbide epitaxial wafer.
Background technology
Carborundum (SiC) is the third generation semi-conducting material grown up after first generation Semiconducting Silicon Materials, germanium and the second carrying semiconductor material GaAs, indium phosphide, the broad stopband of carbofrax material is 2-3 times of silicon and GaAs, makes semiconductor device (more than 500 DEG C) to work and to have the ability of launching blue light at relatively high temperatures; High breakdown electric field all will exceed an order of magnitude than silicon and GaAs, this just determines SiC and has high pressure, powerful characteristic and high saturated electron drift velocity and low-k as semiconductor device, has the service behaviour of the high frequency as semiconductor device, high speed; SiC thermal conductivity is 3.3 times of silicon, 10 times of GaAs, and this just means its good heat conductivity, greatly can improve the integrated level of circuit, reduces cooling heat radiation system, thus greatly reduces the volume of complete machine.Therefore constantly perfect along with carbofrax material and device technology, certain fields are carried out alternative Si with carborundum and are pointed the day and await for it.There is due to carborundum the features such as broad-band gap, high critical breakdown strength, high thermal conductivity, the high saturated elegant speed of electronics, be particularly suitable for high-power, high-voltage power electronic device, become the study hotspot of current power electronic applications.Say for high-voltage power electronic device, need super thick silicon carbide epitaxial layers, thickness can reach 200 microns, and grow so thick epitaxial loayer needs a great problem solved to reduce defect exactly, especially basal plane dislocation and blemish.
Traditional method reduces defect by increasing resilient coating between substrate and epitaxial loayer, this has certain effect for thin epitaxy sheet, but stress results limited to super thick silicon carbide epitaxial wafer, during due to growth super thick silicon carbide epitaxial layers, elapsed time is long, growth chamber environment constantly worsens along with the growth of time, especially the deposit at surrounding and top, epitaxial layer quality can be caused greatly to reduce, urgently invent a kind of preparation method being not only applicable to thin silicon carbide epitaxial wafer but also being applicable to super thick silicon carbide epitaxial wafer.
Summary of the invention
For the problems referred to above, the preparation method of silicon carbide epitaxial wafer provided by the invention, reduces basal plane dislocation density, reduces chamber hortungskoriper, effectively reduces the defect concentration on silicon carbide epitaxial wafer surface.The method is applicable to any silicon carbide epitaxy technique, all has good effect to growth super thick or thin silicon carbide epitaxial wafer.
The preparation method of the low defect silicon carbide epitaxial wafer of P type provided by the invention, comprises the following steps:
1) online etched substrate: place silicon carbide substrates in reative cell, vacuumize, pass into H with the flow of 40 ~ 80L/min and 5 ~ 10L/min respectively
2and HCl, under 20-60mbar pressure and 1510 ~ 1710 DEG C of temperature, etch 5 ~ 20min;
2) growth of resilient coating: stop passing into HCl, grown silicon source, growth carbon source and trimethyl aluminium TMA dopant is passed into respectively, the resilient coating that growth 0.2 ~ 5 μm is thick at 1500 ~ 1680 DEG C of temperature and 20 ~ 100mbar pressure with the flow of 6 ~ 10mL/min, 3 ~ 5mL/min and 1500 ~ 1800mL/min;
3) growth of epitaxial loayer
A grows: pass into H with the flow of 40 ~ 80L/min, 10 ~ 40mL/min, 5 ~ 20mL/min and 800 ~ 1500mL/min respectively
2, grown silicon source, growth carbon source and TMA dopant, at 1500 ~ 1680 DEG C of temperature and 20 ~ 100mbar pressure, grow 5 ~ 50 μm of thick epitaxial loayers;
B etches: stop respectively passing into silicon source, carbon source and TMA, at 1510 ~ 1710 DEG C, maintain 2 ~ 5min; HCl is passed into, etching 2 ~ 5min with 5 ~ 10L/min flow;
C brushes: after stopping logical HCl, blow H with the flow of 45 ~ 90mL/min
22 ~ 10min;
D regrowth: repeat step a grown epitaxial layer to 5 ~ 200 μm.
In first optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, described backing material is 4H-SiC or 6H-SiC.
In second optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, described grown silicon source is SiH
4or SiHCl
3, growth carbon source is C
2h
4or C
3h
8.
In 3rd optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the b in repeating said steps 3 is to Step d.
In 4th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the number of times of described repetition is 0 ~ 50 time.
In 5th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the number of times of described repetition is 0 ~ 20 time.
In 6th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the number of times of described repetition is 0 ~ 5 time.
In 7th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the growth thickness of described epitaxial loayer is 5 ~ 20 μm.
In 8th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the growth thickness of described epitaxial loayer is 20 ~ 100 μm.
In 9th optimal technical scheme of the preparation method of the low defect silicon carbide epitaxial wafer of described P type, the growth thickness of described epitaxial loayer is 100 ~ 200 μm.
Compared with immediate prior art, technical scheme provided by the invention has following excellent effect:
1) silicon carbide substrates provided by the invention has the etch pit of large basal plane dislocation, makes basal plane dislocation in epitaxy technique more easily be converted into screw dislocation, reaches the object reducing basal plane dislocation density;
2) blemish particle and the defect that caused by particle is reduced;
3) due to corrasion, extended the growth chamber cleaning frequency, greatly reduce growth cost and improve growth efficiency;
4) method provided by the invention, manufacture method is simple, good process repeatability, is applicable to suitability for industrialized production;
5) 1/cm is reduced to based on super thick silicon carbide epitaxial wafer surface defect density provided by the invention
2below, basal plane dislocation density reaches 100/cm
2below.
Accompanying drawing explanation
Fig. 1: the schematic flow sheet of the inventive method.
Fig. 2: the defect map of embodiment 4 epitaxial wafer
Fig. 3: the atomic force microscope figure of embodiment 4 epitaxial wafer
Embodiment
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below.
Embodiment 1
A kind of P type low defect thickness 15um silicon carbide epitaxy piece preparation method, comprises the following steps:
1) online etched substrate: place 4H-SiC substrate in reative cell, vacuumize, passing into flow is the hydrogen of 40L/min and the HCl of 5L/min, and reative cell internal pressure is 40mbar, and temperature is 1680 DEG C, maintains 5 minutes;
2) growth of resilient coating: stop passing into HCl, be cooled to 1650 DEG C, pass into the SiH that flow is 6mL/min
4with the C of 3mL/min
3h
8, be that the trimethyl aluminium TMA of 1500mL/min is dopant with flow, growth pressure is 40mbar;
3) growth of epitaxial loayer
A grows: by the hydrogen of 40L/min flow, the SiH of 10mL/min
4with the C of 5mL/min
3h
8pass into reative cell, keep temperature to be 1650 DEG C, pressure 40mbar, with the trimethyl aluminium TMA of 800mL/min flow for dopant, the epitaxial loayer of growth 6 μm of thickness;
B etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
C brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
D regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 15um.
Embodiment 2
A kind of P type low defect thickness 30um silicon carbide epitaxy piece preparation method, comprises the following steps:
1) online etched substrate: place 4H-SiC substrate in reative cell, vacuumize, passing into flow is the hydrogen of 40L/min and the HCl of 5L/min, and reative cell internal pressure is 40mbar, and temperature is 1680 DEG C, maintains 5 minutes;
2) growth of resilient coating: stop passing into HCl, be cooled to 1650 DEG C, pass into the SiH that flow is 6mL/min
4with the C of 3mL/min
3h
8, be that the trimethyl aluminium TMA of 1500mL/min is dopant with flow, growth pressure is 40mbar;
3) growth of epitaxial loayer
A grows: by the hydrogen of 40L/min flow, the SiH of 10mL/min
4with the C of 5mL/min
3h
8pass into reative cell, keep temperature to be 1650 DEG C, pressure 40mbar, with the trimethyl aluminium TMA of 800mL/min flow for dopant, the epitaxial loayer of growth 10 μm of thickness;
B etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
C brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
D regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 20um.
E etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
F brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
G regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 30um.
Embodiment 3
A kind of P type low defect thickness 80um silicon carbide epitaxy piece preparation method, comprises the following steps:
1) online etched substrate: place 4H-SiC substrate in reative cell, vacuumize, passing into flow is the hydrogen of 40L/min and the HCl of 5L/min, and reative cell internal pressure is 40mbar, and temperature is 1680 DEG C, maintains 5 minutes;
2) growth of resilient coating: stop passing into HCl, be cooled to 1650 DEG C, pass into the SiH that flow is 6mL/min
4with the C of 3mL/min
3h
8, be that the trimethyl aluminium TMA of 1500mL/min is dopant with flow, growth pressure is 40mbar;
3) growth of epitaxial loayer
A grows: by the hydrogen of 40L/min flow, the SiH of 10mL/min
4with the C of 5mL/min
3h
8pass into reative cell, keep temperature to be 1650 DEG C, pressure 40mbar, with the trimethyl aluminium TMA of 800mL/min flow for dopant, the epitaxial loayer of growth 10 μm of thickness;
B etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
C brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
D regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 30um.
E etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
F brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
G regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 50um.
H etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
I brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
J regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 80um.
Embodiment 4
A kind of P type low defect thickness 100um silicon carbide epitaxy piece preparation method, comprises the following steps:
1) online etched substrate: place 4H-SiC substrate in reative cell, vacuumize, passing into flow is the hydrogen of 40L/min and the HCl of 5L/min, and reative cell internal pressure is 40mbar, and temperature is 1680 DEG C, maintains 5 minutes;
2) growth of resilient coating: stop passing into HCl, be cooled to 1650 DEG C, pass into the SiH that flow is 6mL/min
4with the C of 3mL/min
3h
8, be that the trimethyl aluminium TMA of 1500mL/min is dopant with flow, growth pressure is 40mbar;
3) growth of epitaxial loayer
A grows: by the hydrogen of 40L/min flow, the SiH of 10mL/min
4with the C of 5mL/min
3h
8pass into reative cell, keep temperature to be 1650 DEG C, pressure 40mbar, with the trimethyl aluminium TMA of 800mL/min flow for dopant, the epitaxial loayer of growth 10 μm of thickness;
B etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
C brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
D regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 40um.
E etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
F brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
G regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 70um.
H etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
I brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
J regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 100um.
Embodiment 5
A kind of P type low defect thickness 180um silicon carbide epitaxy piece preparation method, comprises the following steps:
1) online etched substrate: place 4H-SiC substrate in reative cell, vacuumize, passing into flow is the hydrogen of 40L/min and the HCl of 5L/min, and reative cell internal pressure is 40mbar, and temperature is 1680 DEG C, maintains 5 minutes;
2) growth of resilient coating: stop passing into HCl, be cooled to 1650 DEG C, pass into the SiH that flow is 6mL/min
4with the C of 3mL/min
3h
8, be that the trimethyl aluminium TMA of 1500mL/min is dopant with flow, growth pressure is 40mbar;
3) growth of epitaxial loayer
A grows: by the hydrogen of 40L/min flow, the SiH of 10mL/min
4with the C of 5mL/min
3h
8pass into reative cell, keep temperature to be 1650 DEG C, pressure 40mbar, with the trimethyl aluminium TMA of 800mL/min flow for dopant, the epitaxial loayer of growth 10 μm of thickness;
B etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
C brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
D regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 30um.
E etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
F brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
G regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 50um.
H etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
I brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
J regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 80um.
K etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
L brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
M regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 120um.
N etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
O brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
P regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 150um.
Q etches: stop silicon source, the passing into of carbon source and dopant, be warming up to 1680 DEG C, maintain 2 minutes; Pass into the HCl of 5L/min flow, maintain 2 minutes;
R brushes: stop logical HCl, regulates hydrogen flowing quantity to 45mL/min, brushes 5 minutes;
S regrowth: arrange gas flow, the temperature and pressure consistent with step a, continued growth epitaxial loayer is to 180um.
Defect test
Test by the blemish of Cadela CS20 defect analyzer to the silicon carbide epitaxial wafer of 100 micron thickness prepared by embodiments of the invention 4, as shown in Figure 2, test obtains surface defect density and reaches 0.56/cm result
2.
Surface roughness is tested
Test the surface topography of the silicon carbide epitaxial wafer of 100 micron thickness prepared by embodiments of the invention 4 and roughness by atomic force microscope, as shown in Figure 3, it is 0.108nm that test obtains surface roughness root mean square to test result.
Above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit; those of ordinary skill in the field are to be understood that; can modify to the specific embodiment of the present invention with reference to above-described embodiment or equivalent to replace, these do not depart from any amendment of spirit and scope of the invention or equivalently to replace within the claims that all awaits the reply in application.
Claims (10)
1. a preparation method for the low defect silicon carbide epitaxial wafer of P type, comprises the following steps:
1) online etched substrate: place silicon carbide substrates in reative cell, vacuumize, pass into H with the flow of 40 ~ 80L/min and 5 ~ 10L/min respectively
2and HCl, under 20-60mbar pressure and 1510 ~ 1710 DEG C of temperature, etch 5 ~ 20min;
2) growth of resilient coating: stop passing into HCl, grown silicon source, growth carbon source and trimethyl aluminium TMA dopant is passed into respectively, the resilient coating that growth 0.2 ~ 5 μm is thick at 1500 ~ 1680 DEG C of temperature and 20 ~ 100mbar pressure with the flow of 6 ~ 10mL/min, 3 ~ 5mL/min and 1500 ~ 1800mL/min;
3) growth of epitaxial loayer
A grows: pass into H with the flow of 40 ~ 80L/min, 10 ~ 40mL/min, 5 ~ 20mL/min and 800 ~ 1500mL/min respectively
2, grown silicon source, growth carbon source and TMA dopant, at 1500 ~ 1680 DEG C of temperature and 20 ~ 100mbar pressure, grow 5 ~ 50 μm of thick epitaxial loayers;
B etches: stop respectively passing into silicon source, carbon source and TMA, at 1510 ~ 1710 DEG C, maintain 2 ~ 5min; HCl is passed into, etching 2 ~ 5min with 5 ~ 10L/min flow;
C brushes: after stopping logical HCl, blow H with the flow of 45 ~ 90mL/min
22 ~ 10min;
D regrowth: repeat step a grown epitaxial layer to 5 ~ 200 μm.
2. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that described backing material is 4H-SiC or 6H-SiC.
3. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that described grown silicon source is SiH
4or SiHCl
3, growth carbon source is C
2h
4or C
3h
8.
4. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that b in repeating said steps 3 is to Step d.
5. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 4, is characterized in that the number of times of described repetition is 0 ~ 50 time.
6. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 4, is characterized in that the number of times of described repetition is 0 ~ 20 time.
7. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 4, is characterized in that the number of times of described repetition is 0 ~ 5 time.
8. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that the growth thickness of described epitaxial loayer is 5 ~ 20 μm.
9. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that the growth thickness of described epitaxial loayer is 20 ~ 100 μm.
10. the preparation method of the low defect silicon carbide epitaxial wafer of P type according to claim 1, is characterized in that the growth thickness of described epitaxial loayer is 100 ~ 200 μm.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105869996A (en) * | 2016-04-25 | 2016-08-17 | 全球能源互联网研究院 | Silicon carbide epitaxial growth system and growth method thereof |
| CN110117814A (en) * | 2018-02-05 | 2019-08-13 | 西安电子科技大学 | The preparation method of silicon carbide epitaxy with low-density C vacancy defect |
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| CN101104952A (en) * | 2007-07-24 | 2008-01-16 | 中国电子科技集团公司第五十五研究所 | High doping concentration silicon carbide epitaxial growth method |
| CN102569055A (en) * | 2010-12-14 | 2012-07-11 | 北京天科合达蓝光半导体有限公司 | Adjustment method of SiC (silicon carbide) single crystal flatness by wet etching |
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| CN105869996A (en) * | 2016-04-25 | 2016-08-17 | 全球能源互联网研究院 | Silicon carbide epitaxial growth system and growth method thereof |
| CN110117814A (en) * | 2018-02-05 | 2019-08-13 | 西安电子科技大学 | The preparation method of silicon carbide epitaxy with low-density C vacancy defect |
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