CN104952784B - Groove isolation construction, its production method and semiconductor devices and imaging sensor - Google Patents
Groove isolation construction, its production method and semiconductor devices and imaging sensor Download PDFInfo
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- CN104952784B CN104952784B CN201410129079.8A CN201410129079A CN104952784B CN 104952784 B CN104952784 B CN 104952784B CN 201410129079 A CN201410129079 A CN 201410129079A CN 104952784 B CN104952784 B CN 104952784B
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- 238000002955 isolation Methods 0.000 title claims abstract description 90
- 238000010276 construction Methods 0.000 title claims abstract description 78
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 238000003384 imaging method Methods 0.000 title claims abstract description 17
- 239000000126 substance Substances 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 238000011065 in-situ storage Methods 0.000 claims abstract description 39
- 229910052799 carbon Inorganic materials 0.000 claims description 20
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 19
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 18
- 229910052796 boron Inorganic materials 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 13
- 230000005012 migration Effects 0.000 abstract description 12
- 238000013508 migration Methods 0.000 abstract description 12
- 239000004615 ingredient Substances 0.000 abstract description 7
- 230000008859 change Effects 0.000 abstract description 6
- 239000013049 sediment Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
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- 238000002360 preparation method Methods 0.000 description 4
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910003818 SiH2Cl2 Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 150000001721 carbon Chemical group 0.000 description 1
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- 239000000203 mixture Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
Abstract
This application discloses a kind of groove isolation construction, its production method and semiconductor devices and imaging sensors.Wherein, the groove isolation construction includes the shallow trench being set in substrate, the isolated substance layer being set in shallow trench, and the epitaxial structure being set between shallow trench and isolated substance layer, epitaxial structures include at least one layer by adulterating the epitaxial layer formed in situ.Above-mentioned epitaxial layer is formed from the inner wall of shallow trench to external sediment, it can form close combination interface with the inner surface of shallow trench, leakage current is generated so as to avoid the junction between the inner wall and epitaxial layer of shallow trench, the ingredient of epitaxial layer or structure can be made to change by way of adulterating in situ simultaneously, to be further reduced the migration of carrier in the epitaxial layer, and it is further reduced leakage current present in semiconductor devices.
Description
Technical field
This application involves semiconductor integrated circuit manufacture technology field, in particular to a kind of groove isolation construction, its
Production method and semiconductor devices and imaging sensor.
Background technique
Need to be arranged between different components isolation structure in the semiconductor device to open device isolation.Wherein, groove
Isolation structure becomes most common isolation junction in semiconductor devices because it has many advantages, such as that isolation effect is good, manufacture craft is simple
One of structure.Existing groove isolation construction generally includes to be set to the shallow trench in substrate, and the isolation being set in shallow trench
Material layer.This groove isolation construction is during practical operation, since the carrier in shallow trench surrounding substrate can migrate
Leakage current is generated to shallow trench inner surface, and then between shallow trench inner surface and isolated substance layer, to reduce semiconductor device
The performance of part.
Imaging sensor is the semiconductor transducer that can be experienced optical image information and convert thereof into exportable signal.
Conventional images sensor generally includes to be set to the devices such as photodiode and transistor in substrate, and is set to above-mentioned device
Groove isolation construction between part.During practical operation, the groove isolation construction in imaging sensor equally can also be produced
Leakage current is led to the problem of between raw shallow trench inner surface and groove isolation construction as indicated above.This leakage phenomenon
The pixel that can reduce imaging sensor is generated, and then reduces the performance of imaging sensor.
Currently, technical staff attempts in the manufacturing process of groove isolation construction, after forming shallow trench, in shallow trench
Wall carries out ion implanting to form injection region on the inner wall of shallow trench, by changing shallow trench inner wall section relative to substrate
Material to stop the carrier mobility in substrate to shallow trench inner surface, and then reduces the leakage current in groove isolation construction.So
And in this approach, blocking of the process of ion implanting because will receive other device architectures (such as photoresist etc.) on substrate,
And cause the injection ion distribution in injection region uneven.And this uneven distribution just can result in groove isolation construction still
Leakage current can so be generated.Simultaneously, in the above-mentioned methods, the process of ion implanting is it is also possible to can be to substrate and other devices
Part causes to damage, and then further decreases the performance of semiconductor devices.
Summary of the invention
The application is intended to provide a kind of groove isolation construction, its production method and semiconductor devices and imaging sensor, with
Improve the performance of semiconductor devices.
This application provides a kind of groove isolation constructions, including the shallow trench being set in substrate, and are set to shallow ridges
Isolated substance layer in slot, wherein groove isolation construction further include: epitaxial structure, be set to shallow trench and isolated substance layer it
Between, epitaxial structure includes at least one layer by adulterating the epitaxial layer formed in situ.
Further, the doped chemical adulterated in the epitaxial layer of above-mentioned fleet plough groove isolation structure is carbon or boron.
Further, the epitaxial structure of above-mentioned fleet plough groove isolation structure includes: the first epitaxial layer, be set to shallow trench with every
From between material layer；And second epitaxial layer, it is set between the first epitaxial layer and isolated substance layer.
Further, in the epitaxial structure of above-mentioned fleet plough groove isolation structure, doped chemical is boron in the first epitaxial layer；Second
Doped chemical is carbon in epitaxial layer.
Further, the epitaxial structure of above-mentioned fleet plough groove isolation structure further include: third epitaxial layer, be set to shallow trench and
Between first epitaxial layer, doped chemical is carbon in third epitaxial layer.
Further, the doping of doped chemical is 5 × 10 in each epitaxial layer in above-mentioned fleet plough groove isolation structure13~5 ×
1018atom/cm3。
Further, the 1/10~1/4 of the width with a thickness of shallow trench of above-mentioned fleet plough groove isolation structure epitaxial structures.
Present invention also provides a kind of production method of groove isolation construction, which includes: to be formed in the substrate
Shallow trench；The step of forming epitaxial structure on the inner wall of shallow trench, forming epitaxial structure includes forming at least one layer by original position
Adulterate the epitaxial layer formed；Isolated substance layer is formed on epitaxial structure.
Further, it in the production method of above-mentioned groove isolation construction, adulterates in the step of forming epitaxial layer in situ,
Doped chemical is carbon or boron.
Further, in the production method of above-mentioned groove isolation construction, formed epitaxial structure the step of include: along shallow ridges
The inner wall of slot forms the first epitaxial layer；And the second extension is formed far from the surface of shallow trench inner wall side along the first epitaxial layer
Layer.
Further, in the production method of above-mentioned groove isolation construction, formed epitaxial structure the step of include: along shallow ridges
The inner wall of slot forms the first epitaxial layer by the boron in situ that adulterates；Pass through along the first epitaxial layer far from the surface of shallow trench inner wall side
Doped carbon in situ forms the second epitaxial layer.
Further, in the production method of above-mentioned groove isolation construction, the step of forming the first epitaxial layer before, along shallow
The inner wall of groove passes through doped carbon in situ and forms third epitaxial layer, and the table of the inner wall side along third epitaxial layer far from shallow trench
Face forms the first epitaxial layer by the boron in situ that adulterates.
Further, in the production method of above-mentioned groove isolation construction, formed the first epitaxial layer the step of in, with BF2
For presoma, BF2Flow be 20~200sccm, the doping of boron is 5 × 1013~5 × 1018atom/cm3；It is formed outside second
In the step of prolonging layer and third epitaxial layer, with CH4For presoma, CH4Flow be 20~200sccm, the doping of C is 5 ×
1013~5 × 1018atom/cm3。
Present invention also provides a kind of semiconductor devices, including groove isolation construction, and wherein groove isolation construction is this Shen
Groove isolation construction that please be above-mentioned.
Present invention also provides a kind of imaging sensors, including groove isolation construction, and wherein groove isolation construction is this Shen
Groove isolation construction that please be above-mentioned.
Using technical solution provided by the present application, setting includes at least one layer by original between shallow trench and isolated substance layer
The epitaxial structure for the epitaxial layer that position doping is formed.Being formed by epitaxial layer is to be formed by the inner wall of shallow trench to external sediment,
Close combination interface can be formed with the inner surface of shallow trench, avoid the combination between the inner wall and epitaxial layer of shallow trench
Place generates leakage current, while the ingredient of epitaxial layer or structure can be made to change by way of adulterating in situ, thus into one
Step reduces the migration of carrier in the epitaxial layer, and is further reduced leakage current present in semiconductor devices.Meanwhile the extension
Layer can also avoid ion implanting from causing to damage to substrate and other devices, to further increase the property of semiconductor devices
Energy.
Detailed description of the invention
The accompanying drawings constituting a part of this application is used to provide further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 shows the schematic diagram of the section structure of the groove isolation construction according to provided by the application embodiment；
Fig. 2 shows the signals of the process of the production method of the groove isolation construction according to provided by the application embodiment
Figure；
Fig. 3 is shown in the production method of the groove isolation construction according to provided by the application embodiment, in the substrate
Matrix the schematic diagram of the section structure after forming shallow trench；
Fig. 4 shows the base after forming the epitaxial structure for including one layer of epitaxial layer on the inner wall of shallow trench shown in Fig. 3
Body the schematic diagram of the section structure；
Fig. 5 shows the base after forming the epitaxial structure for including two layers of epitaxial layer on the inner wall of shallow trench shown in Fig. 3
Body the schematic diagram of the section structure；
Fig. 6 shows the base after forming the epitaxial structure for including three layers of epitaxial layer on the inner wall of shallow trench shown in Fig. 3
Body the schematic diagram of the section structure；And
Fig. 7 shows the matrix section knot formed after isolated substance layer on the epitaxial layer in middle shallow trench shown in Fig. 4
Structure schematic diagram.
Specific embodiment
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singular
Also be intended to include plural form, additionally, it should be understood that, when in the present specification using belong to "comprising" and/or " packet
Include " when, indicate existing characteristics, step, operation, device, component and/or their combination.
For ease of description, spatially relative term can be used herein, as " ... on ", " ... top ",
" ... upper surface ", " above " etc., for describing such as a device shown in the figure or feature and other devices or spy
The spatial relation of sign.It should be understood that spatially relative term is intended to comprising the orientation in addition to device described in figure
Except different direction in use or operation.For example, being described as if the device in attached drawing is squeezed " in other devices
It will be positioned as " under other devices or construction after part or construction top " or the device of " on other devices or construction "
Side " or " under other devices or construction ".Thus, exemplary term " ... top " may include " ... top " and
" in ... lower section " two kinds of orientation.The device can also be positioned with other different modes and (is rotated by 90 ° or in other orientation), and
And respective explanations are made to the opposite description in space used herein above.
In this application technical term " epitaxial layer " refer to have material layer identical with Substrate orientation, or with substrate material
Expect identical material layer.Technical term " doping in situ " refers in grown epitaxial layer, while being passed through the presoma of doped chemical
To be doped to epitaxial layer.Technical term " thickness of epitaxial structure " refers in epitaxial structure along the inner wall perpendicular to shallow trench
Thickness on direction.Technical term " shallow ridges groove width " refers to the width that the cross section of substrate surface is parallel in shallow trench.
As described in background technique, the carrier in shallow trench surrounding substrate can move to shallow trench inner surface,
To generate leakage current between shallow trench inner surface and groove isolation construction, and then reduce the performance of semiconductor devices.This Shen
Inventor please studies the above problem, proposes a kind of groove isolation construction.As shown in Figure 1, the groove isolation construction
Including the shallow trench 20 being set in substrate 10, the isolated substance layer 40 being set in shallow trench 20, and it is set to shallow trench
Epitaxial structure 30 between 20 and isolated substance layer 40, epitaxial structures 30 are formed including at least one layer by doping in situ outer
Prolong layer.
In above-mentioned groove isolation construction, setting includes at least one layer by original position between shallow trench 20 and isolated substance layer 40
Adulterate the epitaxial structure 30 of the epitaxial layer formed.The epitaxial layer is to be formed by the inner wall in shallow trench to external sediment, can
Close combination interface is formed with the inner surface of shallow trench 20, so as to avoid between the inner wall and epitaxial layer of shallow trench 20
Junction generates leakage current, while the ingredient of epitaxial layer or structure can be made to change by way of adulterating in situ, thus
It is further reduced the migration of carrier in the epitaxial layer, and is further reduced leakage current present in semiconductor devices.Meanwhile it should
Epitaxial layer can also avoid ion implanting from causing to damage to substrate 10 and other devices, to further increase semiconductor devices
Performance.
Above-mentioned groove isolation construction epitaxial structures 30 may include one layer of epitaxial layer, also may include epitaxial layer.
The doped chemical that wherein each epitaxial layer is adulterated can be the element of any ingredient that can change epitaxial layer or lattice structure,
In preferably carbon or boron.When adulterating to form epitaxial layer using carbon, since carbon atom can be embedded in lattice in epitaxial layer, so that
Lattice in epitaxial layer deforms.This lattice deformability can improve the chemical bond energy of epitaxial layer, and then can reduce carrier
Migration in the epitaxial layer, and reduce leakage current present in semiconductor devices.When forming epitaxial layer using boron doping, due to
Boron can occupy the atom of basis material in epitaxial layer, to generate hole in the epitaxial layer.The hole can be generated with carrier
It is compound, to reduce the migration of carrier in the epitaxial layer, and reduce leakage current present in semiconductor devices.
Above-mentioned epitaxial structure 30 preferably includes epitaxial layer.In a preferred embodiment, above-mentioned epitaxial structure 30
Including the first epitaxial layer 31 and the second epitaxial layer 32.Wherein, the first epitaxial layer 31 is set to shallow trench 20 and isolated substance layer 40
Between；Second epitaxial layer 32 is set between the first epitaxial layer 31 and isolated substance layer 40, wherein the first epitaxial layer 31 and second
At least one layer of epitaxial layer formed for doping in situ in epitaxial layer 32.One layer in the first epitaxial layer 31 and the second epitaxial layer 32
When the epitaxial layer formed for doping in situ, doping in situ can be carried out to the first epitaxial layer 31, or to the second epitaxial layer 32 into
Row doping in situ.When the first epitaxial layer 31 and the second epitaxial layer 32 are the epitaxial layer that doping in situ is formed, the first epitaxial layer
31 and second doped chemical in epitaxial layer 32 it is identical or different.When doped chemical phase in the first epitaxial layer 31 and the second epitaxial layer 32
Meanwhile the quality that can be improved epitaxial structure is formed by substep, and then can preferably stop carrier mobility, it avoids outside
Prolong and generate leakage current between layer and groove isolation construction, and then is conducive to improve the performance of semiconductor devices；When the first epitaxial layer
31 with when doped chemical difference, the first epitaxial layer 31 and the second epitaxial layer 32 can pass through different modes in the second epitaxial layer 32
Barrier layer is formed to by the carrier migrated in shallow trench surrounding substrate, is conducive to be further reduced in shallow trench inner surface and ditch
The leakage current that recess isolating structure generates, and further increase the performance of semiconductor devices.
It is preferred that doped chemical is boron, doped chemical in the second epitaxial layer 32 in first epitaxial layer 31 in above-mentioned epitaxial structure 30
For carbon.By be first arranged hole and carrier in boracic epitaxial layer generate it is compound to reduce carrier moving in the epitaxial layer
It moves.And further by the setting of carbon containing epitaxial layer, to reduce the migration of carrier in the epitaxial layer, to preferably reduce half
Leakage current present in conductor device.
Above-mentioned epitaxial structure 30 can also be wrapped further on the basis of including the first epitaxial layer 31 and the second epitaxial layer 32
Include third epitaxial layer 33.The third epitaxial layer 33 is set between shallow trench 20 and the first epitaxial layer 31.It is preferred that third epitaxial layer
33 are adulterated by carbon and are formed.When using the epitaxial structure 30 with above structure, above-mentioned third epitaxial layer 33 can reduce current-carrying
Migration of the son into the first epitaxial layer 31, is conducive to be further reduced the leakage current generated between groove isolation construction and substrate,
And further increase the performance of semiconductor devices.
In the epitaxial structure 30 of above-mentioned groove isolation construction, not to the doping of doped chemical in each above-mentioned epitaxial layer
Particular/special requirement, as long as the ingredient or lattice structure of epitaxial layer can be changed.In a preferred embodiment, each epitaxial layer
The doping of middle doped chemical is 5 × 1013~5 × 1018atom/cm3.If the doping of doped chemical less than 5 ×
1013atom/cm3, then epitaxial layer can weaken the barrier effect of carrier mobility to a certain extent；If doped chemical
Doping is greater than 5 × 1018atom/cm3, then the doped chemical in epitaxial layer may diffuse into substrate 10, Jin Erying
Ring the stability of semiconductor devices.
In the epitaxial structure 30 of above-mentioned groove isolation construction, those skilled in the art can also be according to actual process demand
Set the sum of above-mentioned each epitaxy layer thickness (i.e. the thickness of epitaxial structure 30).In a preferred embodiment, epitaxial structure 30
The width with a thickness of shallow trench 20 1/10~1/4.If the thickness of epitaxial structure 30 is less than 1/10, epitaxial layer is to load
The barrier effect of stream migration can weaken to a certain extent；If the thickness of epitaxial structure 30 is greater than 1/4, shallow trench 20
The thickness of middle isolation material layer 40 is too small, and then influences the isolation effect of groove isolation construction.
Those skilled in the art are under teachings of the present application, and selection technique appropriate of having the ability is to prepare above-mentioned trench isolations
Structure additionally provides a kind of production method of preferred groove isolation construction in this application.As shown in Fig. 2, the production method
It include: to form shallow trench in the substrate；The step of forming epitaxial structure on the inner wall of shallow trench, forming epitaxial structure includes shape
At at least one layer by adulterating the epitaxial layer formed in situ；Isolated substance layer is formed on epitaxial structure.
The production method of this groove isolation construction provided herein is formed between shallow trench and isolated substance layer
Including at least one layer by adulterating the epitaxial structure of the epitaxial layer formed in situ.Being formed by epitaxial layer is the inner wall by shallow trench
Formed to external sediment, close combination interface can be formed with the inner surface of shallow trench, avoid inner wall in shallow trench with
Junction between epitaxial layer generates leakage current, while can make the ingredient or structure hair of epitaxial layer by way of adulterating in situ
Changing to be further reduced the migration of carrier in the epitaxial layer, and is further reduced leakage present in semiconductor devices
Electric current.Meanwhile the epitaxial layer can also avoid ion implanting from causing to damage to substrate and other devices, to further increase
The performance of semiconductor devices.
The illustrative embodiments according to the application are described in more detail below.However, these illustrative embodiments
It can be implemented by many different forms, and should not be construed to be limited solely to embodiments set forth herein.It should
These embodiments that are to provide understood are in order to enable disclosure herein is thoroughly and complete, and by these exemplary realities
The design for applying mode is fully conveyed to those of ordinary skill in the art, in the accompanying drawings, for the sake of clarity, expands layer and region
Thickness, and make that identical device is presented with like reference characters, thus description of them will be omitted.
Fig. 3 to Fig. 7 is shown in the production method of groove isolation construction provided by the present application, is obtained after each step
Matrix the schematic diagram of the section structure.Below in conjunction with Fig. 3 to Fig. 7, groove isolation construction provided herein is further illustrated
Production method.
Firstly, forming shallow trench 20 in substrate 10, and then form base structure as shown in Figure 3.In a kind of preferred reality
The step of applying in mode, forming shallow trench 20 includes: that patterned mask layer is formed on substrate 10；Figure in mask layer
Etched substrate 10 forms shallow trench 20；And removal mask layer.It should be noted that when needing that dielectric layer is formed on the substrate
When, dielectric layer is first preferably formed on substrate 10, patterned mask layer is then formed on dielectric layer, then along mask layer
Pattern etching dielectric layer and substrate 10 finally remove mask layer to form shallow trench 20 in dielectric layer and substrate 10.
Above-mentioned substrate 10 can be monocrystalline silicon (Si) or brilliant germanium (Ge), be also possible to silicon-on-insulator (SOI), on insulator
Germanium (GOI).As an example, using monocrystalline silicon as substrate 10 in present embodiment.Above-mentioned dielectric layer can be common in this field
Dielectric material, such as SiO2, the technique for forming above-mentioned dielectric layer can be chemical vapor deposition or sputtering etc..Etch above-mentioned lining
The technique at bottom 10 can be dry etching, preferably plasma etching.Above-mentioned technique is state of the art, no longer superfluous herein
It states.
After the step of forming shallow trench 20 in substrate 10, epitaxial structure is formed on the inner wall of above-mentioned shallow trench 20
30.The step of wherein forming epitaxial structure 30 includes forming at least one layer by adulterating the epitaxial layer formed in situ.When being formed by
Epitaxial structure 30 be one layer by adulterating the epitaxial layer formed in situ when, form base structure as shown in Figure 4.Above-mentioned epitaxial layer is
Referring to has material layer identical with 10 crystal orientation of substrate, or material layer identical with 10 material of substrate.When substrate 10 is Si, on
Stating epitaxial layer can be single crystalline Si, SiGe or SiC etc..The technique for forming above-mentioned epitaxial layer is epitaxial growth technology, such as chemistry
Vapor deposition or atomic layer deposition etc..When growing single crystalline Si epitaxial layer, in a kind of optional embodiment, with SiH4Or
SiH2Cl2For presoma, the temperature of deposition is 800~1100 DEG C, and deposition rate is 0.0001~0.2 μm/min.When growth monocrystalline
When SiGe epitaxial layer, in a kind of optional embodiment, with SiH4And GeH4For presoma, the temperature of deposition is 500~700 DEG C,
Deposition rate is 0.0001~0.2 μm/min.When growing above-mentioned epitaxial layer, while the presoma of doped chemical is passed through with external
The matrix for prolonging layer carries out doping in situ.In the step of forming epitaxial layer above by doping in situ, doped chemical is carbon or boron.
Above-mentioned epitaxial structure 30 can also include epitaxial layer.In a preferred embodiment, epitaxial structure 30 wraps
Two layers of epitaxial layer is included, at this point, the step of forming above-mentioned epitaxial structure 30 includes: inner wall the first epitaxial layer of formation along shallow trench 20
31；And the second epitaxial layer 32 is formed far from the surface of 20 inner wall side of shallow trench along the first epitaxial layer 31, and then form such as Fig. 5
Shown in base structure.At least one layer of extension formed for doping in situ in above-mentioned first epitaxial layer 31 and the second epitaxial layer 32
Layer.It, can be to outside first when one layer in the first epitaxial layer 31 and the second epitaxial layer 32 is the epitaxial layer that doping in situ is formed
Prolong layer 31 and carry out doping in situ, or the second epitaxial layer 32 is doped.When the first epitaxial layer 31 and the second epitaxial layer 32 are equal
When adulterating the epitaxial layer formed for original position, doped chemical is identical or different in the first epitaxial layer 31 and the second epitaxial layer 32.When
When one epitaxial layer 31 is identical with doped chemical in the second epitaxial layer 32, the quality that can be improved epitaxial structure is formed by substep,
And then can preferably stop carrier that can migrate, the leakage current generated between epitaxial layer and groove isolation construction is avoided, into
And be conducive to improve the performance of semiconductor devices；When the first epitaxial layer 31 and doped chemical difference in the second epitaxial layer 32, the
One epitaxial layer 31 and the second epitaxial layer 32 can be by different modes to the carrier shape by migrating in shallow trench surrounding substrate
At barrier layer, be conducive to be further reduced the leakage current in shallow trench inner surface and groove isolation construction generation, and further mention
The performance of high semiconductor devices.
In above-mentioned formation epitaxial structure 30 the step of, the preferably is formed by the boron in situ that adulterates along the inner wall of shallow trench 20
One epitaxial layer 31, and pass through doped carbon in situ far from the surface of 20 inner wall side of shallow trench along the first epitaxial layer 31 and formed outside second
Prolong layer 32.By be first arranged hole and carrier in boracic epitaxial layer generate it is compound to reduce carrier moving in the epitaxial layer
It moves.And further by the setting of carbon containing epitaxial layer, to reduce the migration of carrier in the epitaxial layer, to preferably reduce half
Leakage current present in conductor device.
In above-mentioned formation epitaxial structure 30 the step of, preferably the step of forming the first epitaxial layer 31 before, along shallow trench
20 inner wall passes through doped carbon in situ and forms third epitaxial layer 33, and along third epitaxial layer 33 far from 20 inner wall side of shallow trench
Surface forms the first epitaxial layer 31 by the boron in situ that adulterates.At this point, epitaxial structure 30 includes three layers of epitaxial layer, it is outer three times to form this
The step of prolonging layer includes: that third epitaxial layer 33 is first formed on the inner wall in shallow trench 20；Is formed on third epitaxial layer 33
One the first epitaxial layer of epitaxial layer 31；And the second epitaxial layer 32 is formed on the first epitaxial layer 31, and then formed as shown in FIG. 6
Base structure.When forming the epitaxial structure 30 with above structure, above-mentioned third epitaxial layer 33 can reduce carrier to the
Migration in one epitaxial layer 31 is conducive to be further reduced the leakage current generated between groove isolation construction and substrate, goes forward side by side one
Step improves the performance of semiconductor devices.
In the step of forming epitaxial structure 30, formed the first epitaxial layer 31 the step of preferably with BF2For presoma, BF2's
Flow is 20~200sccm, and the doping of boron is 5 × 1013~5 × 1018atom/cm3；It is formed outside the second epitaxial layer 32 and third
In the step of prolonging layer 33, preferably with CH4For presoma, CH4Flow be 20~200sccm, the doping of C is 5 × 1013~5
×1018atom/cm3.It is evenly distributed forming doped chemical in epitaxial structure in this way, is conducive to be further reduced ditch
The leakage current generated between recess isolating structure and substrate, and further increase the performance of semiconductor devices.
After the step of forming epitaxial structure 30 on the inner wall of shallow trench 20, formed on the epitaxial layer in shallow trench 20
Isolated substance layer 40, and then form base structure as shown in Figure 7.In a kind of optional embodiment, isolated substance layer is formed
40 the step of includes: the formation isolated substance preparation layers on epitaxial structure 30；Isolated substance preparation layers are planarized, are formed
Isolated substance layer 40.Above-mentioned isolated substance preparation layers can be the common isolated material in this field, such as SiO2Or SiN etc., shape
It can be chemical vapor deposition or sputtering etc. at the technique of above-mentioned isolated substance preparation layers.It should be noted that Fig. 7 is illustrated only
The case where forming isolated substance layer 40 on the epitaxial structure 30 for have one layer of epitaxial layer.It can certainly be with multilayer epitaxial
Isolated substance layer 40 is formed on the epitaxial structure 30 of layer.
Present invention also provides a kind of semiconductor devices, including groove isolation construction, and wherein groove isolation construction is this Shen
The groove isolation construction that please be provide.The leakage current between groove isolation construction and substrate in above-mentioned semiconductor device is subtracted
It is small, to improve the performance of semiconductor devices.
Present invention also provides a kind of imaging sensors, including groove isolation construction, and wherein groove isolation construction is this Shen
The groove isolation construction that please be provide.The leakage current between groove isolation construction and substrate in above-mentioned imaging sensor is subtracted
It is small, to improve the pixel of imaging sensor, and then reduce the photoelectric properties of imaging sensor.
Above-mentioned imaging sensor includes the printed circuit board set gradually, chip, transparent electrode, optical filter and glass base
Plate is wherein provided with semiconductor devices, such as photodiode or transistor, is provided between above-mentioned semiconductor device on chip
Groove isolation construction, and at least one groove isolation construction is groove isolation construction provided by the present application.In a kind of optional reality
It applies in mode, multiple above-mentioned semiconductor devices form sensing unit, it is provided with groove isolation construction between above-mentioned sensing unit,
And at least one groove isolation construction is groove isolation construction provided by the present application.Wherein, the composition of above-mentioned sensing unit can be with
It is set according to the prior art.In a kind of optional embodiment, above-mentioned sensing unit includes photodiode, resets crystalline substance
Body pipe, source follower transistor and selection transistor.The group of above-mentioned imaging sensor becomes the prior art, and details are not described herein.
It can be seen from the above description that the application the above embodiments realize following technical effect: in shallow trench
Setting includes at least one layer of epitaxial structure by adulterating the epitaxial layer formed in situ between isolated substance layer.It is formed by extension
Layer is to be formed by the inner wall of shallow trench to external sediment, can form close combination interface with the inner surface of shallow trench, keep away
The junction exempted between the inner wall and epitaxial layer of shallow trench generates leakage current, while can be made by way of adulterating in situ
The ingredient or structure of epitaxial layer change, to be further reduced the migration of carrier in the epitaxial layer, and are further reduced
Leakage current present in semiconductor devices.Meanwhile the epitaxial layer can also avoid ion implanting from making substrate and other devices
At damage, to further increase the performance of semiconductor devices.
The foregoing is merely preferred embodiment of the present application, are not intended to limit this application, for the skill of this field
For art personnel, various changes and changes are possible in this application.Within the spirit and principles of this application, made any to repair
Change, equivalent replacement, improvement etc., should be included within the scope of protection of this application.
Claims (9)
1. a kind of groove isolation construction, including the shallow trench being set in substrate, and the isolation being set in the shallow trench
Material layer, which is characterized in that the groove isolation construction further include:
Epitaxial structure is set between the shallow trench and the isolated substance layer, the epitaxial structure include it is at least one layer of by
The epitaxial layer that doping in situ is formed；
The epitaxial structure includes:
First epitaxial layer is set between the shallow trench and the isolated substance layer；And
Second epitaxial layer is set between first epitaxial layer and the isolated substance layer；
In the epitaxial structure,
Doped chemical described in first epitaxial layer is boron；
Doped chemical described in second epitaxial layer is carbon.
2. groove isolation construction according to claim 1, which is characterized in that the epitaxial structure further include:
Third epitaxial layer is set between the shallow trench and first epitaxial layer, is adulterated described in the third epitaxial layer
Element is carbon.
3. groove isolation construction according to claim 1 or 2, which is characterized in that doped chemical in each epitaxial layer
Doping is 5 × 1013~5 × 1018atom/cm3。
4. groove isolation construction according to claim 1, which is characterized in that the epitaxial structure with a thickness of the shallow ridges
The 1/10~1/4 of groove width.
5. a kind of production method of groove isolation construction, which is characterized in that the production method includes:
Shallow trench is formed in the substrate；
The step of forming epitaxial structure on the inner wall of the shallow trench, form the epitaxial structure include formed it is at least one layer of by
The epitaxial layer that doping in situ is formed；And
Isolated substance layer is formed on the epitaxial structure；
The step of forming the epitaxial structure include:
Inner wall along the shallow trench forms the first epitaxial layer by the boron in situ that adulterates；And
Pass through doped carbon in situ far from the surface of shallow trench inner wall side along first epitaxial layer and forms the second epitaxial layer.
6. production method according to claim 5, which is characterized in that the step of forming first epitaxial layer before, edge
The inner wall of the shallow trench passes through doped carbon in situ and forms third epitaxial layer, and along the third epitaxial layer far from the shallow trench
The surface of inner wall side first epitaxial layer is formed by the in situ boron that adulterates.
7. production method according to claim 6, which is characterized in that
In the step of forming first epitaxial layer, with BF2For presoma, BF2Flow be 20~200sccm, the doping of boron
It is 5 × 1013~5 × 1018atom/cm3；
In the step of forming second epitaxial layer and third epitaxial layer, with CH4For presoma, CH4Flow be 20~
The doping of 200sccm, C are 5 × 1013~5 × 1018atom/cm3。
8. a kind of semiconductor devices, including groove isolation construction, which is characterized in that the groove isolation construction is claim 1
To groove isolation construction described in any one of 4.
9. a kind of imaging sensor, including groove isolation construction, which is characterized in that the groove isolation construction is claim 1
To groove isolation construction described in any one of 4.
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| CN108258001A (en) * | 2018-01-26 | 2018-07-06 | 德淮半导体有限公司 | Imaging sensor and its manufacturing method |
| CN113471234B (en) * | 2021-06-30 | 2023-08-18 | 武汉新芯集成电路制造有限公司 | Semiconductor device and method for manufacturing the same |
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|---|---|---|---|---|
| CN1265225A (en) * | 1997-05-23 | 2000-08-30 | 艾利森电话股份有限公司 | Integrated circuit, components thereof and mfg. method |
| CN1735969A (en) * | 2002-11-12 | 2006-02-15 | 微米技术有限公司 | Grounded gate and isolation techniques for reducing dark current in CMOS image sensors |
| CN1819138A (en) * | 2004-12-30 | 2006-08-16 | 东部亚南半导体株式会社 | Manufacturing isolation layer in CMOS image sensor |
| CN103681444A (en) * | 2012-09-04 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | Shallow groove isolation structure and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1265225A (en) * | 1997-05-23 | 2000-08-30 | 艾利森电话股份有限公司 | Integrated circuit, components thereof and mfg. method |
| CN1735969A (en) * | 2002-11-12 | 2006-02-15 | 微米技术有限公司 | Grounded gate and isolation techniques for reducing dark current in CMOS image sensors |
| CN1819138A (en) * | 2004-12-30 | 2006-08-16 | 东部亚南半导体株式会社 | Manufacturing isolation layer in CMOS image sensor |
| CN103681444A (en) * | 2012-09-04 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | Shallow groove isolation structure and manufacturing method thereof |
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