CN104935191A - Composite logic protection amplifying type mixed triggering power source for detecting power faults - Google Patents
Composite logic protection amplifying type mixed triggering power source for detecting power faults Download PDFInfo
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- CN104935191A CN104935191A CN201510316205.5A CN201510316205A CN104935191A CN 104935191 A CN104935191 A CN 104935191A CN 201510316205 A CN201510316205 A CN 201510316205A CN 104935191 A CN104935191 A CN 104935191A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/2176—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only comprising a passive stage to generate a rectified sinusoidal voltage and a controlled switching element in series between such stage and the output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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Abstract
The invention discloses a composite logic protection amplifying type mixed triggering power source for detecting power faults. The composite logic protection amplifying type mixed triggering power source for detecting power faults is mainly composed of a diode rectifier U, a non-linear triggering circuit, a buffering crystal oscillating circuit, a quartz crystal oscillating circuit, a power logic voltage stabilizing circuit, a logic protection amplifying circuit and a composite protection circuit. By the adoption of the composite logic protection amplifying type mixed triggering power source for detecting power faults, the power supply of a circuit can be quickly switched off when current inputs or running temperature of the circuit is overhigh, the circuit is prevented from being damaged by impact of the current or long-term running at the high temperature, the service life of the circuit is greatly prolonged, and the power logic voltage stabilizing circuit is creatively combined with the non-linear triggering circuit, so that the circuit structure can be greatly simplified, radio-frequency interference of the circuit and radio-frequency interference of external connection also can be reduced, and thereby manufacturing cost and maintenance cost are greatly reduced.
Description
Technical field
The present invention relates to a kind of switching power supply, specifically refer to that power failure detects with compound virtual protection amplifying type mixing triggering voltage.
Background technology
At present, along with the develop rapidly of power industry, the equipment that people are used for Power System Faults Detection also has great development.Because the maintenance of electric power system often relates to hundreds of kilovolt, the even voltage circuit of up to a million kilovolts, therefore its maintenance circuit is very long, so also very high to the power reguirements of fault test set.But, but larger ripple coefficient is there is in current people to the portable power source that fault test set provides, not only can produce radio-frequency electromagnetic interference, and its circuit structure more complicated, maintenance and cost of manufacture are higher, therefore greatly limit the scope of application of fault test set, be unfavorable for that people check on a large scale to circuit.
Summary of the invention
The object of the invention is to the defect that ripple coefficient is comparatively large, radio frequency interference is serious, circuit is complicated and efficiency is not high overcoming the existence of current fault test set power supply, a kind of brand-new electric power system fault detection device virtual protection amplifying type mixing triggering voltage is provided.
Object of the present invention is achieved through the following technical solutions: power failure detects with compound virtual protection amplifying type mixing triggering voltage; primarily of diode rectifier U; the non-linear circuits for triggering be connected with diode rectifier U; the buffered crystal oscillator circuit be connected with these non-linear circuits for triggering and quartz crystal oscillator circuits, and the logical power voltage stabilizing circuit be serially connected between diode rectifier U and non-linear circuits for triggering forms.Meanwhile, between logical power voltage stabilizing circuit and non-linear circuits for triggering, be also serially connected with virtual protection amplifying circuit, diode rectifier U is provided with compound protective circuit, this virtual protection amplifying circuit is primarily of power amplifier P2, power amplifier P3, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the negative input of NAND gate IC6 after resistance R16, one end is connected with the negative input of NAND gate IC5, the resistance R13 that the other end is connected with the electrode input end of power amplifier P2, be serially connected in the resistance R14 between the negative input of power amplifier P2 and output, one end is connected with the output of NAND gate IC5, the resistance R15 that the other end is connected with the negative input of power amplifier P3, be serially connected in the polar capacitor C7 between the electrode input end of power amplifier P3 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C5 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R17, P pole is connected with the output of power amplifier P3, N pole is in turn through diode D5 that resistance R12 is connected with the tie point of resistance R17 with voltage stabilizing didoe D4 after resistance R18, and N pole is connected with the negative pole of electric capacity C5, the voltage stabilizing didoe D3 that P pole is connected with the tie point of resistance R12 with diode D5 forms, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P2, the electrode input end of the output NAND gate IC6 of power amplifier P3 is connected, and its electrode input end is then connected with the output of power amplifier P2, the positive pole of described polar capacitor C6 is connected with logical power voltage stabilizing circuit, and resistance R18 is then connected with non-linear circuits for triggering with the tie point of resistance R12.
Described logical power voltage stabilizing circuit is by power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, N pole is connected with the output of power amplifier P1, the diode D2 of P pole ground connection after resistance R4, one end is connected with the first input end of NAND gate IC1, the resistance R5 that the other end is connected with the output of NAND gate IC2 after electric capacity C4, one end is connected with the output of NAND gate IC1, the resistance R6 that the other end is connected with the tie point of electric capacity C4 with resistance R5, one end is connected with the output of NAND gate IC3, the resistance R7 that the other end is connected with the output of NAND gate IC4 after resistance R8, and one end is connected with the negative input of power amplifier P1, the resistance R3 of other end ground connection forms, second input end grounding of described NAND gate IC1, its output is also connected with the first input end of NAND gate IC2, second input of NAND gate IC2 is connected with the cathode output end of diode rectifier U, its output is then connected with second input of NAND gate IC4 with the first input end of NAND gate IC3 respectively, and second input of NAND gate IC3 is connected with the first input end of NAND gate IC4, the electrode input end of described power amplifier P1 is connected with the cathode output end of diode rectifier U, and its output is connected with non-linear circuits for triggering, the positive pole of described polar capacitor C6 is connected with the output of power amplifier P1.
Described compound protective circuit is by incoming line, time-base integrated circuit Q101, diode rectifier U101, transformer 101, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, one end is connected with the emitter of triode VT101, the resistance R101 that the other end is connected with the collector electrode of triode VT103, one end is connected with the base stage of triode VT101, the other end is connected with the emitter of triode VT104, the slide rheostat RP101 that sliding end is connected with the base stage of triode VT103, N pole is connected with the collector electrode of triode VT101, the diode D101 that P pole is connected with the base stage of triode VT102, the relay K 101 in parallel with diode D101, one end is connected with the P pole of diode D101, the resistance R103 that the other end is connected with the base stage of triode VT105, P pole is connected with the collector electrode of triode VT101 after resistance R102, the diode D103 that N pole is connected with the Discharge pin of time-base integrated circuit Q101, one end is connected with the N pole of diode D103, the resistance R104 that the other end is connected with the collector electrode of triode VT105, P pole is connected with the N pole of diode D103, the diode D102 that N pole is connected with the GND pin of time-base integrated circuit Q101, one end is connected with the P pole of diode D103, the other end is connected with the N pole of diode D102, the slide rheostat RP102 that sliding end is connected with the Control voltage pin of time-base integrated circuit Q101, P pole ground connection, the diode D104 that N pole is connected with the P pole of diode D103, minus earth, the electric capacity C101 that positive pole is connected with Thresshold pin with the Trigger pin of time-base integrated circuit Q101 simultaneously, the thermistor RT101 in parallel with electric capacity C101, and one end is connected with the N pole of diode D104, the slide rheostat RP103 that the other end is connected with the positive pole of electric capacity C101 after resistance R105 forms, wherein, the secondary two ends of transformer T101 are connected with two inputs of diode rectifier U101 respectively, the two ends on its former limit are connected on two incoming lines, the negative output terminal ground connection of diode rectifier U101, the collector electrode of triode VT101 is connected with the positive output end of diode rectifier U101, the base stage of triode VT101 is connected with the emitter of triode VT103 with the emitter of triode VT102 simultaneously, the collector electrode of triode VT101 is also connected with the collector electrode of triode VT102, the emitter of triode VT101 is also connected with the collector electrode of triode VT104, the grounded emitter of triode VT104, the base stage of triode VT104 is connected with the collector electrode of triode VT105, the grounded emitter of triode VT105, the GND pin ground connection of time-base integrated circuit Q101, the N pole of diode D104 is connected with Reset pin with the Vcc pin of time-base integrated circuit Q101 simultaneously, the normally closed electric shock switch S 101 of described relay K 101 is arranged on incoming line.
Described non-linear circuits for triggering are by transistor Q1, and transistor Q2, diode D1, tunable capacitor C3, resistance R2, resistance R9, resistance R10 and resistance R11 form; The P pole of described diode D1 is connected with the collector electrode of transistor Q1, its N pole is connected with the collector electrode of transistor Q2 after resistance R11 through resistance R10 in turn, and the negative pole of tunable capacitor C3 is connected with the collector electrode of transistor Q2, its positive pole is connected with the collector electrode of transistor Q1 after resistance R2 through resistance R9 in turn; The base stage of described transistor Q1 is connected with the tie point of resistance R11 with resistance R10, and its emitter is connected with the output of power amplifier P1; The base stage of transistor Q2 is connected with the tie point of resistance R9 with resistance R2, and its emitter is connected with the tie point of resistance R8 with resistance R7; The cathode output end of described diode rectifier U is then connected with the collector electrode of transistor Q1; Described resistance R12 is then connected with the emitter of transistor Q2 with the tie point of resistance R18.
Described quartz crystal oscillator circuits is by inverting amplifier U1, be serially connected in the resistance R1 between the input of inverting amplifier U1 and output and quartz oscillator X1, the electric capacity C1 that positive pole is connected with the input of inverting amplifier U1, negative pole is connected with the P pole of diode D1, and the tunable capacitor C2 that positive pole is connected with the output of inverting amplifier U1, negative pole is connected with the N pole of diode D1 forms.
Described buffered crystal oscillator circuit is by inverting amplifier U2, the inverting amplifier U3 that input is connected with the output of inverting amplifier U2, the inductance L 2 that one end is connected with the output of inverting amplifier U2, the other end is connected with the output of inverting amplifier U3 after inductance L 1, and the quartz oscillator X2 that one end is connected with the input of inverting amplifier U2, the other end is connected with the tie point of inductance L 2 with inductance L 1 forms; The input of described inverting amplifier U2 is also connected with the positive pole of tunable capacitor C3, and the output of inverting amplifier U3 is then also connected with the collector electrode of transistor Q2.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) initiative of the present invention logical power voltage stabilizing circuit and non-linear circuits for triggering are combined, circuit structure can not only be greatly simplify, and circuit self and external radio frequency interference can also be reduced, cost of manufacture and maintenance cost are had reduction by a relatively large margin.
(2) the present invention effectively can overcome the late effect of conventional power source circuit, effectively can improve the quality of power supply.
(3) scope of application of the present invention is comparatively wide, can be applicable to the fault detect environment of different occasion.
(4) the present invention adopts compound protective circuit; the power supply of circuit can be cut off rapidly when the operating temperature of input current or circuit is too high; avoid circuit be subject to the impact of electric current or at high temperature run the damage caused for a long time, substantially increase the useful life of circuit.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is virtual protection amplification circuit structure schematic diagram of the present invention.
Fig. 3 is the circuit diagram of compound protective circuit of the present invention.
Description of reference numerals:
10, compound protective circuit; 20, virtual protection amplifying circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1; the present invention is primarily of diode rectifier U; the non-linear circuits for triggering be connected with diode rectifier U; the buffered crystal oscillator circuit be connected with non-linear circuits for triggering and quartz crystal oscillator circuits; be serially connected in the logical power voltage stabilizing circuit between diode rectifier U and non-linear circuits for triggering; be serially connected in the virtual protection amplifying circuit 20 between logical power voltage stabilizing circuit and non-linear circuits for triggering, and the compound protective circuit 10 arranged on diode rectifier U forms.
Wherein, described logical power voltage stabilizing circuit is by power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, and diode D2, resistance R3, resistance R4, resistance R5, resistance R6 resistance R7, resistance R8 and electric capacity C4 forms.
During connection, the N pole of diode D2 is connected with the output of power amplifier P1, its P pole ground connection after resistance R4.One end of resistance R5 is connected with the first input end of NAND gate IC1, and its other end is connected with the output of NAND gate IC2 after electric capacity C4; One end of resistance R6 is connected with the output of NAND gate IC1, and its other end is connected with the tie point of electric capacity C4 with resistance R5; And one end of resistance R7 is connected with the output of NAND gate IC3, its other end is connected with the output of NAND gate IC4 after resistance R8; One end of resistance R3 is connected with the negative input of power amplifier P1, its other end ground connection.
For guaranteeing result of use, second input of this NAND gate IC1 needs ground connection, and its output will be connected with the first input end of NAND gate IC2; Second input of NAND gate IC2 is connected with the cathode output end of diode rectifier U, and its output is then connected with second input of NAND gate IC4 with the first input end of NAND gate IC3 respectively; Second input of NAND gate IC3 is connected with the first input end of NAND gate IC4.Meanwhile, the electrode input end of described power amplifier P1 is connected with the cathode output end of diode rectifier U.
Described non-linear circuits for triggering are by transistor Q1, and transistor Q2, diode D1, tunable capacitor C3, resistance R2, resistance R9, resistance R10 and resistance R11 form.During connection, the P pole of described diode D1 is connected with the collector electrode of transistor Q1, and its N pole is connected with the collector electrode of transistor Q2 after resistance R11 through resistance R10 in turn; The negative pole of tunable capacitor C3 is connected with the collector electrode of transistor Q2, its positive pole is connected with the collector electrode of transistor Q1 after resistance R2 through resistance R9 in turn.
The base stage of described transistor Q1 is connected with the tie point of resistance R11 with resistance R10, and its emitter is connected with the output of power amplifier P1; The base stage of transistor Q2 is connected with the tie point of resistance R9 with resistance R2, and its emitter is connected with the tie point of resistance R8 with resistance R7.Meanwhile, the cathode output end of this diode rectifier U will be connected with the collector electrode of transistor Q1.
The structure of described virtual protection amplifying circuit as shown in Figure 2, namely it is primarily of power amplifier P2, power amplifier P3, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the negative input of NAND gate IC6 after resistance R16, one end is connected with the negative input of NAND gate IC5, the resistance R13 that the other end is connected with the electrode input end of power amplifier P2, be serially connected in the resistance R14 between the negative input of power amplifier P2 and output, one end is connected with the output of NAND gate IC5, the resistance R15 that the other end is connected with the negative input of power amplifier P3, be serially connected in the polar capacitor C7 between the electrode input end of power amplifier P3 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C5 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R17, P pole is connected with the output of power amplifier P3, N pole is in turn through diode D5 that resistance R12 is connected with the tie point of resistance R17 with voltage stabilizing didoe D4 after resistance R18, and N pole is connected with the negative pole of electric capacity C5, the voltage stabilizing didoe D3 that P pole is connected with the tie point of resistance R12 with diode D5 forms.
Meanwhile, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P2; The electrode input end of the output NAND gate IC6 of power amplifier P3 is connected, and its electrode input end is then connected with the output of power amplifier P2.Wherein, the positive pole of polar capacitor C6 will be connected with the output of power amplifier P1, and resistance R18 is then connected with the emitter of transistor Q2 with the tie point of resistance R12.
As shown in Figure 3, described compound protective circuit 10 by incoming line, time-base integrated circuit Q101, diode rectifier U101, transformer 101, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, resistance R101, resistance R102, resistance R103, resistance R104, resistance R105, relay K 101, diode D101, diode D102, diode D103, diode D104, electric capacity C101;
During connection, one end of resistance R101 is connected with the emitter of triode VT101, the other end is connected with the collector electrode of triode VT103, one end of slide rheostat RP101 is connected with the base stage of triode VT101, the other end is connected with the emitter of triode VT104, sliding end is connected with the base stage of triode VT103, the N pole of diode D101 is connected with the collector electrode of triode VT101, P pole is connected with the base stage of triode VT102, relay K 101 is in parallel with diode D101, one end of resistance R103 is connected with the P pole of diode D101, the other end is connected with the base stage of triode VT105, the P pole of diode D103 is connected with the collector electrode of triode VT101 after resistance R102, N pole is connected with the Discharge pin of time-base integrated circuit Q101, one end of resistance R104 is connected with the N pole of diode D103, the other end is connected with the collector electrode of triode VT105, the P pole of diode D102 is connected with the N pole of diode D103, N pole is connected with the GND pin of time-base integrated circuit Q101, one end of slide rheostat RP102 is connected with the P pole of diode D103, the other end is connected with the N pole of diode D102, sliding end is connected with the Control voltage pin of time-base integrated circuit Q101, the P pole ground connection of diode D104, N pole is connected with the P pole of diode D103, the minus earth of electric capacity C101, positive pole is connected with Thresshold pin with the Trigger pin of time-base integrated circuit Q101 simultaneously, thermistor RT101 is in parallel with electric capacity C101, one end of slide rheostat RP103 is connected with the N pole of diode D104, the other end is connected with the positive pole of electric capacity C101 after resistance R105, wherein, the secondary two ends of transformer T101 are connected with two inputs of diode rectifier U101 respectively, the two ends on its former limit are connected on two incoming lines, the negative output terminal ground connection of diode rectifier U101, the collector electrode of triode VT101 is connected with the positive output end of diode rectifier U101, the base stage of triode VT101 is connected with the emitter of triode VT103 with the emitter of triode VT102 simultaneously, the collector electrode of triode VT101 is also connected with the collector electrode of triode VT102, the emitter of triode VT101 is also connected with the collector electrode of triode VT104, the grounded emitter of triode VT104, the base stage of triode VT104 is connected with the collector electrode of triode VT105, the grounded emitter of triode VT105, the GND pin ground connection of time-base integrated circuit Q101, the N pole of diode D104 is connected with Reset pin with the Vcc pin of time-base integrated circuit Q101 simultaneously, the normally closed electric shock switch S 101 of described relay K 101 is arranged on incoming line.When the electric current of input or the overall operation temperature of circuit exceed preset value, relay K 101 obtains the electric normally-closed contact switch S 101 that makes and disconnects, thus completes the power-off of whole circuit.
Described quartz crystal oscillator circuits is by inverting amplifier U1, be serially connected in the resistance R1 between the input of inverting amplifier U1 and output and quartz oscillator X1, the electric capacity C1 that positive pole is connected with the input of inverting amplifier U1, negative pole is connected with the P pole of diode D1, and the tunable capacitor C2 that positive pole is connected with the output of inverting amplifier U1, negative pole is connected with the N pole of diode D1 forms.
Described buffered crystal oscillator circuit is made up of inverting amplifier U2, inverting amplifier U3, inductance L 1, inductance L 2 and quartz oscillator X2.During connection, the input of inverting amplifier U3 is connected with the output of inverting amplifier U2, and one end of inductance L 2 is connected with the output of inverting amplifier U2, and its other end is connected with the output of inverting amplifier U3 after inductance L 1.
One end of quartz oscillator X2 is connected with the input of inverting amplifier U2, the other end is connected with the tie point of inductance L 1 with inductance L 2.Meanwhile, the input of described inverting amplifier U2 is also connected with the positive pole of tunable capacitor C3, and the output of inverting amplifier U3 is then also connected with the collector electrode of transistor Q2.
As mentioned above, just the present invention can well be realized.
Claims (4)
1. power failure detects with compound virtual protection amplifying type mixing triggering voltage, primarily of diode rectifier U, the non-linear circuits for triggering be connected with diode rectifier U, the buffered crystal oscillator circuit be connected with these non-linear circuits for triggering and quartz crystal oscillator circuits, and the logical power voltage stabilizing circuit be serially connected between diode rectifier U and non-linear circuits for triggering forms, it is characterized in that, virtual protection amplifying circuit (20) is also serially connected with between logical power voltage stabilizing circuit and non-linear circuits for triggering, diode rectifier U is provided with compound protective circuit (10), this virtual protection amplifying circuit (20) is primarily of power amplifier P2, power amplifier P3, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the negative input of NAND gate IC6 after resistance R16, one end is connected with the negative input of NAND gate IC5, the resistance R13 that the other end is connected with the electrode input end of power amplifier P2, be serially connected in the resistance R14 between the negative input of power amplifier P2 and output, one end is connected with the output of NAND gate IC5, the resistance R15 that the other end is connected with the negative input of power amplifier P3, be serially connected in the polar capacitor C7 between the electrode input end of power amplifier P3 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C5 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R17, P pole is connected with the output of power amplifier P3, N pole is in turn through diode D5 that resistance R12 is connected with the tie point of resistance R17 with voltage stabilizing didoe D4 after resistance R18, and N pole is connected with the negative pole of electric capacity C5, the voltage stabilizing didoe D3 that P pole is connected with the tie point of resistance R12 with diode D5 forms, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P2, the electrode input end of the output NAND gate IC6 of power amplifier P3 is connected, and its electrode input end is then connected with the output of power amplifier P2, the positive pole of described polar capacitor C6 is connected with logical power voltage stabilizing circuit, and resistance R18 is then connected with non-linear circuits for triggering with the tie point of resistance R12,
Described logical power voltage stabilizing circuit is by power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, N pole is connected with the output of power amplifier P1, the diode D2 of P pole ground connection after resistance R4, one end is connected with the first input end of NAND gate IC1, the resistance R5 that the other end is connected with the output of NAND gate IC2 after electric capacity C4, one end is connected with the output of NAND gate IC1, the resistance R6 that the other end is connected with the tie point of electric capacity C4 with resistance R5, one end is connected with the output of NAND gate IC3, the resistance R7 that the other end is connected with the output of NAND gate IC4 after resistance R8, and one end is connected with the negative input of power amplifier P1, the resistance R3 of other end ground connection forms, second input end grounding of described NAND gate IC1, its output is also connected with the first input end of NAND gate IC2, second input of NAND gate IC2 is connected with the cathode output end of diode rectifier U, its output is then connected with second input of NAND gate IC4 with the first input end of NAND gate IC3 respectively, and second input of NAND gate IC3 is connected with the first input end of NAND gate IC4, the electrode input end of described power amplifier P1 is connected with the cathode output end of diode rectifier U, and its output is connected with non-linear circuits for triggering, the positive pole of described polar capacitor C6 is connected with the output of power amplifier P1,
Described compound protective circuit (10) is by incoming line, time-base integrated circuit Q101, diode rectifier U101, transformer 101, triode VT101, triode VT102, triode VT103, triode VT104, triode VT105, one end is connected with the emitter of triode VT101, the resistance R101 that the other end is connected with the collector electrode of triode VT103, one end is connected with the base stage of triode VT101, the other end is connected with the emitter of triode VT104, the slide rheostat RP101 that sliding end is connected with the base stage of triode VT103, N pole is connected with the collector electrode of triode VT101, the diode D101 that P pole is connected with the base stage of triode VT102, the relay K 101 in parallel with diode D101, one end is connected with the P pole of diode D101, the resistance R103 that the other end is connected with the base stage of triode VT105, P pole is connected with the collector electrode of triode VT101 after resistance R102, the diode D103 that N pole is connected with the Discharge pin of time-base integrated circuit Q101, one end is connected with the N pole of diode D103, the resistance R104 that the other end is connected with the collector electrode of triode VT105, P pole is connected with the N pole of diode D103, the diode D102 that N pole is connected with the GND pin of time-base integrated circuit Q101, one end is connected with the P pole of diode D103, the other end is connected with the N pole of diode D102, the slide rheostat RP102 that sliding end is connected with the Control voltage pin of time-base integrated circuit Q101, P pole ground connection, the diode D104 that N pole is connected with the P pole of diode D103, minus earth, the electric capacity C101 that positive pole is connected with Thresshold pin with the Trigger pin of time-base integrated circuit Q101 simultaneously, the thermistor RT101 in parallel with electric capacity C101, and one end is connected with the N pole of diode D104, the slide rheostat RP103 that the other end is connected with the positive pole of electric capacity C101 after resistance R105 forms, wherein, the secondary two ends of transformer T101 are connected with two inputs of diode rectifier U101 respectively, the two ends on its former limit are connected on two incoming lines, the negative output terminal ground connection of diode rectifier U101, the collector electrode of triode VT101 is connected with the positive output end of diode rectifier U101, the base stage of triode VT101 is connected with the emitter of triode VT103 with the emitter of triode VT102 simultaneously, the collector electrode of triode VT101 is also connected with the collector electrode of triode VT102, the emitter of triode VT101 is also connected with the collector electrode of triode VT104, the grounded emitter of triode VT104, the base stage of triode VT104 is connected with the collector electrode of triode VT105, the grounded emitter of triode VT105, the GND pin ground connection of time-base integrated circuit Q101, the N pole of diode D104 is connected with Reset pin with the Vcc pin of time-base integrated circuit Q101 simultaneously, the normally closed electric shock switch S 101 of described relay K 101 is arranged on incoming line.
2. power failure according to claim 1 detects with compound virtual protection amplifying type mixing triggering voltage, it is characterized in that, described non-linear circuits for triggering are by transistor Q1, transistor Q2, diode D1, tunable capacitor C3, resistance R2, resistance R9, resistance R10 and resistance R11 form; The P pole of described diode D1 is connected with the collector electrode of transistor Q1, its N pole is connected with the collector electrode of transistor Q2 after resistance R11 through resistance R10 in turn, and the negative pole of tunable capacitor C3 is connected with the collector electrode of transistor Q2, its positive pole is connected with the collector electrode of transistor Q1 after resistance R2 through resistance R9 in turn; The base stage of described transistor Q1 is connected with the tie point of resistance R11 with resistance R10, and its emitter is connected with the output of power amplifier P1; The base stage of transistor Q2 is connected with the tie point of resistance R9 with resistance R2, and its emitter is connected with the tie point of resistance R8 with resistance R7; The cathode output end of described diode rectifier U is then connected with the collector electrode of transistor Q1; Described resistance R12 is then connected with the emitter of transistor Q2 with the tie point of resistance R18.
3. power failure according to claim 2 detects with compound virtual protection amplifying type mixing triggering voltage; it is characterized in that; described quartz crystal oscillator circuits is by inverting amplifier U1; be serially connected in the resistance R1 between the input of inverting amplifier U1 and output and quartz oscillator X1; the electric capacity C1 that positive pole is connected with the input of inverting amplifier U1, negative pole is connected with the P pole of diode D1, and the tunable capacitor C2 that positive pole is connected with the output of inverting amplifier U1, negative pole is connected with the N pole of diode D1 forms.
4. power failure according to claim 3 detects with compound virtual protection amplifying type mixing triggering voltage, it is characterized in that, described buffered crystal oscillator circuit is by inverting amplifier U2, the inverting amplifier U3 that input is connected with the output of inverting amplifier U2, one end is connected with the output of inverting amplifier U2, the inductance L 2 that the other end is connected with the output of inverting amplifier U3 after inductance L 1, and one end is connected with the input of inverting amplifier U2, the quartz oscillator X2 that the other end is connected with the tie point of inductance L 2 with inductance L 1 forms, the input of described inverting amplifier U2 is also connected with the positive pole of tunable capacitor C3, and the output of inverting amplifier U3 is then also connected with the collector electrode of transistor Q2.
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- 2014-11-27 CN CN201410705779.7A patent/CN104467482A/en active Pending
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| CN1076792A (en) * | 1992-03-23 | 1993-09-29 | 杜伟毅 | Switching Power Supply control, driving circuit that cost performance is high |
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