CN104934331A - Method for protecting bonding pads of wafer - Google Patents

Method for protecting bonding pads of wafer Download PDF

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Publication number
CN104934331A
CN104934331A CN201410101125.3A CN201410101125A CN104934331A CN 104934331 A CN104934331 A CN 104934331A CN 201410101125 A CN201410101125 A CN 201410101125A CN 104934331 A CN104934331 A CN 104934331A
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CN
China
Prior art keywords
wafer
present
ester carbonate
film
fatty poly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410101125.3A
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Chinese (zh)
Inventor
戚德奎
李新
吴萍
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201410101125.3A priority Critical patent/CN104934331A/en
Publication of CN104934331A publication Critical patent/CN104934331A/en
Pending legal-status Critical Current

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Abstract

The invention provides a method for protecting bonding pads of a wafer. The method comprises the steps of providing the wafer; forming an aliphatic polycarbonate film on the bonding pads at the front surface of the wafer; dividing the wafer; and performing thermal decomposition for removing the aliphatic polycarbonate film. According to a manufacturing process provided by the invention, the aliphatic polycarbonate film is used for covering the surface chip area of the wafer, thereby effectively preventing erosion of the pads by residues and solution which are generated in a cutting process, and furthermore improving yield rate of devices.

Description

A kind of method protecting wafer bond pad
Technical field
The present invention relates to semiconductor fabrication process, particularly relate to a kind of method protecting wafer bond pad.
Background technology
On a wafer, usually connected together by the individual extremely thousands of crystal grain (Die) of hundreds of.By semiconductor crystal wafer (Wafer), cut into the complete chip of circuit system (Chip) or crystal grain (Die) unit one by one, the process of its segmentation is called scribing (Dicing).In the Wafer Dicing process of high density crystal grain (die), the residue that long-time laser or physics cutting produce and Shui Chong, likely damage is produced to exposed bond pad (Bonding PAD), cause pad (PAD) to be etched, have a strong impact on follow-up bonding process.
For preventing wafer bond pad in cutting process impaired, be necessary to take measures to protect PAD.
Therefore, be badly in need of a kind of new guard method, to overcome deficiency of the prior art.
Summary of the invention
In summary of the invention part, introduce the concept of a series of reduced form, this will further describe in embodiment part.Summary of the invention part of the present invention does not also mean that the key feature and essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range attempting to determine technical scheme required for protection.
In order to solve problems of the prior art, the present invention proposes a kind of method protecting wafer bond pad, comprising the following steps: to provide wafer; The bond pad of described wafer frontside is formed fatty poly-ester carbonate film; Described wafer is split; Described fatty poly-ester carbonate film is removed in thermal decomposition.
Preferably, described fatty poly-ester carbonate thin-film material is poly (propylene carbonate).
Preferably, described fatty poly-ester carbonate raw material is dissolved in methyl phenyl ethers anisole, by crystal column surface described in the mode uniform fold of spin coating.
Preferably, the step of oven dry is also comprised after carrying out described spin coating.
Preferably, the temperature of described oven dry is 100 ~ 120 DEG C.
Preferably, described heat decomposition temperature is 240 ~ 260 DEG C.
To sum up, adopt fatty poly-ester carbonate plastic film covering in the Surface Core panel region of wafer according to manufacturing process according to the present invention, effectively avoid the residue that produces in cutting process and solution to the erosion of pad, and then improve the yield of device.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
Figure 1A-1E is the generalized section of method implementation step successively according to an exemplary embodiment of the present invention;
Fig. 2 is the flow chart of method implementation step successively according to an exemplary embodiment of the present invention.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, by following description, detailed step is proposed, to explain the manufacturing process of the present invention's proposition.Obviously, the specific details that the technical staff that execution of the present invention is not limited to semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other execution modes.
Should be understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
[exemplary embodiment]
Below in conjunction with exemplary cross sectional view, the present invention is described in more detail, wherein denotes the preferred embodiments of the present invention, should be appreciated that those skilled in the art can modify the present invention described here, and still realize advantageous effects of the present invention.
First, as shown in Figure 1A, wafer is provided.Described wafer comprises hundreds of to the complete chip (Chip) of several thousand circuit systems or crystal grain (Die) unit.Each crystal grain 100 comprises a pad 101.There is gap between each crystal grain, this gap can be called scribe line (Scribe Lane) 102.Before carrying out successive process to described wafer, WAT and CP test macro has been adopted to test it.
Then, as shown in Figure 1B, after performing backgrind technique, the bond pad 101 of described wafer frontside forms fatty poly-ester carbonate film 103.
Target thickness is ground to wafer back part, adopts prior art to carry out described grinding, do not repeat at this.
Form fatty poly-ester carbonate film 103 in wafer frontside, described fatty poly-ester carbonate thin-film material is preferably poly (propylene carbonate).Described poly (propylene carbonate) (C 4h 6o 3, Polypropylenecarbonate, be called for short PPC), be a kind of novel synthetic material, its synthesis material is mainly carbon dioxide, with carbon dioxide be raw material monomer under catalyst action, the fatty poly-ester carbonate of generation.PPC is solid-state at normal temperatures, in the present embodiment, solid-state PPC is dissolved in methyl phenyl ethers anisole, then, by the mode of spin coating (spin-coating) by lysate uniform fold on the wafer surface, dry evaporation methyl phenyl ethers anisole at a certain temperature afterwards, obtain uniform fold PPC film on the wafer surface.Bake out temperature does not do concrete restriction at this, as long as methyl phenyl ethers anisole can be ensured to evaporate, make PPC film hardening and have no adverse effects to device.The present embodiment, preferred bake out temperature is 100 ~ 120 DEG C.
Then, as shown in Fig. 1 C-1D, described wafer is cut.
Cutting is process wafer being divided into the complete chip of circuit system or crystal grain unit.Described cutting method can adopt physics to cut or laser cutting.PPC film 103 covers the Surface Core panel region of wafer, and the residue produced in cutting process and solution can not directly contact with the welding disking area of chip, thus can not produce any harmful effect to chip.
Then, as referring to figure 1e, described fatty poly-ester carbonate film is removed in thermal decomposition.
Described fatty poly-ester carbonate film is removed in thermal decomposition, because PPC is a kind of Wholly-degradable material, it is under 250 DEG C of Temperature Treatment, can be decomposed into carbon dioxide and water completely, therefore adopt the method for heat resolve can remove described PPC film, and can not have any impact to whole device.The present embodiment, heat decomposition temperature is preferably 240 ~ 260 DEG C, but it is not limited in this temperature, and the temperature of described thermal decomposition, generally under the impregnable prerequisite of guarantee wafer device performance, can suitably improve.
With reference to Fig. 2, illustrated therein is the flow chart of the implementation step successively of method according to an exemplary embodiment of the present invention, for schematically illustrating the flow process of whole manufacturing process.
In step 201, wafer is provided.
In step 202., after performing backgrind technique, the bond pad of wafer frontside forms fatty poly-ester carbonate film.
In step 203, cutting crystal wafer.
In step 204, fatty poly-ester carbonate film is removed in thermal decomposition.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.

Claims (6)

1. protect a method for wafer bond pad, comprising: wafer is provided; The bond pad of described wafer frontside is formed fatty poly-ester carbonate film; Described wafer is split; Described fatty poly-ester carbonate film is removed in thermal decomposition.
2. the method for claim 1, is characterized in that, described fatty poly-ester carbonate thin-film material is poly (propylene carbonate).
3. the method for claim 1, is characterized in that, is dissolved in methyl phenyl ethers anisole by described fatty poly-ester carbonate raw material, by crystal column surface described in the mode uniform fold of spin coating.
4. method as claimed in claim 3, is characterized in that, also comprise the step of oven dry after carrying out described spin coating.
5. method as claimed in claim 4, it is characterized in that, the temperature of described oven dry is 100 ~ 120 DEG C.
6. the method for claim 1, is characterized in that, described heat decomposition temperature is 240 ~ 260 DEG C.
CN201410101125.3A 2014-03-18 2014-03-18 Method for protecting bonding pads of wafer Pending CN104934331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410101125.3A CN104934331A (en) 2014-03-18 2014-03-18 Method for protecting bonding pads of wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410101125.3A CN104934331A (en) 2014-03-18 2014-03-18 Method for protecting bonding pads of wafer

Publications (1)

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CN104934331A true CN104934331A (en) 2015-09-23

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107107259A (en) * 2014-12-26 2017-08-29 国立大学法人群马大学 The joint method of hardware
CN110690121A (en) * 2019-10-11 2020-01-14 武汉新芯集成电路制造有限公司 Method for protecting bonding pad and method for manufacturing semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1553483A (en) * 2003-05-26 2004-12-08 台湾积体电路制造股份有限公司 Method for preventing water from micro particles dropping onto it while cutting
US20100307786A1 (en) * 2004-03-15 2010-12-09 Georgia Tech Research Corporation Packaging For Micro Electro-Mechanical Systems And Methods Of Fabricating Thereof
CN103050480A (en) * 2012-08-14 2013-04-17 上海华虹Nec电子有限公司 Technical method for imaging rear side of silicon wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1553483A (en) * 2003-05-26 2004-12-08 台湾积体电路制造股份有限公司 Method for preventing water from micro particles dropping onto it while cutting
US20100307786A1 (en) * 2004-03-15 2010-12-09 Georgia Tech Research Corporation Packaging For Micro Electro-Mechanical Systems And Methods Of Fabricating Thereof
CN103050480A (en) * 2012-08-14 2013-04-17 上海华虹Nec电子有限公司 Technical method for imaging rear side of silicon wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107107259A (en) * 2014-12-26 2017-08-29 国立大学法人群马大学 The joint method of hardware
CN107107259B (en) * 2014-12-26 2022-04-01 国立大学法人群马大学 Method for joining metal members
CN110690121A (en) * 2019-10-11 2020-01-14 武汉新芯集成电路制造有限公司 Method for protecting bonding pad and method for manufacturing semiconductor device

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Application publication date: 20150923

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