CN104934327A - Method for preparing thin-film transistor based on scandia high-k dielectric layer - Google Patents

Method for preparing thin-film transistor based on scandia high-k dielectric layer Download PDF

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CN104934327A
CN104934327A CN201510260595.9A CN201510260595A CN104934327A CN 104934327 A CN104934327 A CN 104934327A CN 201510260595 A CN201510260595 A CN 201510260595A CN 104934327 A CN104934327 A CN 104934327A
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thin
spin coating
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单福凯
刘奥
刘国侠
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Qingdao University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator

Abstract

The invention belongs to the technical field of semiconductor thin film transistor preparation technology and relates to a method for preparing a thin-film transistor based on a scandia high-k dielectric layer. According to the method, firstly, scandium nitrate is dissolved in de-ionized water and the obtained solution is stirred to form a precursor solution. The precursor solution is applied onto the cleaned surface of a low-resistance silicon substrate through the spin-coating process and the spin-coating thickness is 5-10 nm. After that, a thin film generated through the spin-coating process is baked and annealed to obtain a Sc2O3 film sample. Then, the zinc nitrate and the indium nitrate are respectively dissolved in de-ionized water and stirred to form an IZO aqueous solution. The IZO aqueous solution is applied onto the surface of the Sc2O3 film sample through the spin-coating process. After the spin-coating process, the film sample is cured and annealed at a low temperature to obtain an IZO channel layer. Finally, a metal source and a drain electrode are prepared on the IZO channel layer by means of a stainless steel mask through the vacuum thermal-evaporation process, so that a thin-film transistor can be obtained. According to the overall technical scheme of the invention, the method has the advantages of low cost, simple process, reliable principle, good product performance, environment-friendly preparation and broad application prospect. By utilizing the method, the large-area preparation of high-performance thin-film transistors is realized.

Description

A kind of preparation method based on scandium oxide high k dielectric layer thin-film transistor
Technical field:
The invention belongs to semiconductor thin-film transistor preparing technical field, relate to a kind of preparation method of the thin-film transistor based on environmental-friendly aqueous colloidal sol, with aqueous ultra-thin scandium oxide (Sc 2o 3) prepare the transistor of membrane structure for semiconductor channel layer for high k dielectric layer, water-based indium zinc oxide (InZnO).
Background technology:
At present, thin-film transistor (Thin Film Transistor, TFT) has played important function in driven with active matrix liquid crystal display device (Active Matrix Liquid Crystal Display, AMLCD).From low temperature amorphous silicon TFT to high temperature polysilicon TFT, technology is more and more ripe, and application also not only can drive LCD but also can driving OLED (Organic Light Emitting Display) and Electronic Paper from LCD (Liquid Crystal Display) can only be driven to develop into.Become the core component of flat panel display industry in TFT more than ten years in the past, every platform display is all integrated with millions of even more than one hundred million TFT devices.Along with the development of large scale integrated circuit, the characteristic size as the TFT of si-substrate integrated circuit core devices constantly reduces always, and it reduces rule and follows Moore's Law.The result of this reduction not only can increase device density, reduces unit cost, the more important thing is that the power that its each switching manipulation consumes also reduces (IBM Journal of Research and Development, 43 245,1999) thereupon.When the characteristic size of very lagre scale integrated circuit (VLSIC) is less than 0.1 μm, silicon dioxide (SiO 2) thickness of dielectric layer must be less than 1.5nm, is therefore difficult to control SiO 2the pinhold density of film, thus cause larger leakage current.Research shows SiO 2when thickness reduces to 1.5nm by 3.5nm, grid leakage current is by 10 -12a/cm 2increase to 10A/cm 2(IEEE Electron DeviceLetters, 18 209,1997).Larger leakage current can cause high power consumption and corresponding heat dissipation problem, and this all causes adverse influence for device integration, reliability and life-span.At present, extensively adopt in integrated circuit technology high-k (high k) grid dielectric to increase capacitance density and reduce grid leakage current, high-g value because of its large dielectric constant, with SiO 2when there is same equivalent gate oxide thickness (EOT), its actual Thickness Ratio SiO 2large many, thus solve SiO 2because of the quantum tunneling effect (Journal of Applied Physics, 89 5243,2001) produced close to the physical thickness limit.Therefore prepare novel, high-performance high-g value and substitute SiO 2become the top priority realizing large scale integrated circuit.
Because TFT device is membrane type structure, the dielectric constant of its gate dielectric layer, compactness and the electric property of thickness on transistor have important impact.The high-k dielectric material becoming study hotspot at present comprises ATO (Advanced Materials, 24 2945,2012), Al 2o 3(Nature, 489 128,2012), ZrO 2(Advanced Materials, 23 971,2011), HfO 2(Journal of Materials Chemistry, 22 17415,2012) and Y 2o 3(AppliedPhysics Letters, 98 123503,2011) etc.By consulting Patents, document, also find no at present based on scandium oxide (Sc 2o 3) relevant report of TFT device of high k dielectric layer.Sc 2o 3there is larger dielectric constant (14-16), wider band gap (6.0-6.3eV), the compensation of larger conduction band, the passage barrier height (be greater than 2eV) higher to electronics.Therefore, Sc 2o 3be expected to replace traditional Si O 2grid dielectric material, becomes the strong candidate of TFT height k grid dielectric material of new generation.Up to now, Sc 2o 3the preparation of film all adopts the technology preparing environment based on high vacuum, such as atomic beam extension, chemical vapour deposition (CVD), electron beam evaporation, high pressure spray.This kind of high vacuum preparation method needs rely on expensive equipment and be difficult to realize large area film forming, constrains the production of low cost electronic device.Consider the new direction-printed electronic device of development of electronic devices in the future, utilizing chemical solution technology to prepare film will be a better selection, chemical solution technology is subject to extensive use in the preparation technology of superfines, film coating, fiber and other material, it has the advantage of its uniqueness: its reaction in each component be blended in intermolecular carrying out, thus the particle diameter of product is little, uniformity is high; Course of reaction is easy to control, and can obtain the product that some are difficult to additive method obtain, react in addition and carry out at low temperatures, avoid the appearance of high temperature dephasign, make the purity of product high.
When current employing chemical solution technology prepares film, many employings organic system solution is as presoma, and the method not only increases experimental cost, and its waste liquid destroys natural environment, is unfavorable for aim that is sustainable, Green Development.In previous work, we propose a kind of new approaches utilizing " aqueous sol " method to prepare ultra-thin high k dielectric film, and successfully prepare high performance yittrium oxide height k dielectric film (Advanced Functional Materials, 25 2564,2015).In " aqueous sol " precursor solution, only have metal nitrate and deionized water as reaction source.Adopt deionized water to substitute traditional organic solution (EGME etc.) as solvent, therefore " aqueous sol " technology has the advantages such as nontoxic, environmental protection, cheapness compared to conventional organosol method; In addition owing to being electrostatical binding between metal cation and hydrone in aqueous solution, have more weak in conjunction with energy compared to covalent bonds mode in organic solution, therefore the film of aqueous solution method spin coating is adopted to have lower decomposition temperature, utilize aqueous solution technology to prepare reliability is high, reproducible, the semiconductive thin film of low-temperature decomposition is just becoming industrial quarters and scientific research circle is being furtherd investigate technical field.
At present, indium oxide (In is adopted 2o 3), oxide indium zinc oxygen (IZO) and indium gallium zinc oxygen (IGZO) material have open source literature as the Synthesis and applications technology of thin film transistor channel layer, large quantity research has done in the states such as U.S., Japan and Korea S..IZO relies on its high mobility, amorphous state, high permeability (visible ray >80%) to become the strong candidate of semiconductor channel layer material.We are by Patents, the consulting of document, and " aqueous sol " method of utilization is prepared TFT channel layer and rarely had report, based on water-based Sc 2o 3nobody sets foot in the full water-based TFT device of high k dielectric layer especially.IZO/Sc prepared by above-mentioned technique 2o 3the TFT device of structure not only has higher carrier mobility, and has extremely low operating voltage, and it is as the pixel switch of AMLCD, will greatly improve the aperture opening ratio of active matrix, improves brightness, reduces power consumption simultaneously; Its whole soln preparation technology does not rely on expensive vacuum coating equipment in addition, and cost of manufacture is reduced further, and these advantages make its low power consumption electronic in future show field very wide potential market.
Summary of the invention:
The object of the invention is to the shortcoming overcoming prior art existence, seek design and provide a kind of based on high k scandium oxide (Sc 2o 3) preparation method of dielectric layer thin-film transistor, full water-based thin-film transistor (TFT) is prepared in conjunction with water-based indium zinc oxide (IZO) semiconductor channel layer, select low-resistance silicon as substrate and gate electrode, the mode adopting aqueous sol method and thermal annealing to combine respectively prepares ultra-thin Sc 2o 3(<20nm) the IZO semiconductor channel layer of gate dielectric layer and high permeability, high mobility, prepares the TFT device of high-performance, low energy consumption further.
To achieve these goals, concrete technology of the present invention comprises the following steps:
(1), Sc 2o 3the preparation of precursor solution: first by scandium nitrate Sc (NO 3) 3h 2o is dissolved in deionized water, stirs at 20-90 DEG C of lower magnetic force the Sc that 1-24 hour forms clear 2o 3precursor solution, wherein Sc 2o 3the concentration of precursor solution is 0.01-0.5mol/L;
(2), Sc 2o 3the preparation of film sample: using plasma cleaning method cleaning low-resistance surface of silicon, low-resistance silicon substrate after cleaning adopts the Sc that conventional spin coating technique spin-coating step (1) is prepared 2o 3precursor solution, first even glue 4-8 second under 400-600 rev/min, then under 3000-6000 rev/min even glue 15-30 second, spin coating number of times is 1-3 time, each spin coating thickness 5-10nm; Film after spin coating is put into temperature control 100-200 DEG C on roasting Jiao Tai to cure, obtains cured film sample; Anneal the cured film sample after curing under control temperature is 200-600 DEG C of condition 1-3 hour again, realizes dehydroxylation and metal oxide densification, obtain Sc 2o 3film sample;
(3), the preparation of IZO channel layer: by zinc nitrate Zn (NO 3) 2with indium nitrate In (NO 3) 3be dissolved in respectively in deionization, at room temperature stir the IZO aqueous solution that the concentration forming clear for 1-24 hour is 0.01-0.5mol/L, wherein In in aqueous solution 3+: Zn 2+for 1-9:1; Then in the Sc that step (2) obtains 2o 3film sample surface utilizes spin coating technique spin coating IZO aqueous solution, first even glue 4-8 second under 400-600 rev/min, then under 2000-5000 rev/min even glue 15-30 second, spin coating number of times is 1-3 time, each spin coating thickness 5-10nm; Film sample after spin coating is put into and puts into Muffle furnace again after 120-150 DEG C of roasting Jiao Tai is cured process and carry out 200-300 DEG C of process annealing process 1-5 hour, namely prepare IZO channel layer;
(4), the preparation of source, drain electrode: utilize conventional Vacuum sublimation to utilize stainless steel mask plate to prepare source metal, drain electrode on IZO channel layer, namely obtain based on ultra-thin Sc 2o 3the full water-based IZO thin-film transistor of high k dielectric layer; The electrode raceway groove length-width ratio of prepared thin-film transistor is 1:4-20, and thermal evaporation electric current is 30-50A; Obtained source, leak electricity very metal A l, Ti or Ni electrode, and thickness of electrode is 50-200nm.
The deionization resistivity of water >18M Ω cm related in step of the present invention (1); The plasma clean method related in step (2) adopts oxygen or argon gas as purge gas, and its power is 20-60Watt, and scavenging period is 20-200s, and the intake of working gas is 20-50SCCM.
Compared with prior art, one is adopt aqueous sol method to prepare New type of S c in the present invention 2o 3high k grid dielectric material, for providing new selection based on the electronic devices and components of high-k dielectric material; Two is obtained Sc 2o 3the physical thickness of high k gate dielectric layer is less than 20nm, and its low-leakage current simultaneously had, bulky capacitor density can meet the integrated demand for device size of microelectronics; Sc 2o 3the high permeability (visible light wave range >90%) that film itself has, meets the requirement of transparent electronics to material self; Obtained Sc 2o 3film is amorphous state, can realize film large area, homogeneous preparation; Three is Sc 2o 3film adopts aqueous sol technique to prepare, and using nitric acid scandium salts and deionized water as reaction source, its process is cheap, environmental protection, meets the strategy of sustainable development; Four is IZO semiconductor channel layer in thin-film transistor and Sc 2o 3dielectric layer all utilizes aqueous sol method to prepare, and preparation process does not need high vacuum environment, can carry out in atmosphere, reduces production cost; Simultaneously because deionized water does not have corrosivity, when being spun to Sc 2o 3time on gate dielectric layer, Sc can not be corroded 2o 3surface, is beneficial to formation interface more clearly; Its general embodiment cost is low, and technique is simple, and principle is reliable, good product performance, and preparation environmental friendliness, has a extensive future, large area can prepare high performance thin film transistor.
Accompanying drawing illustrates:
Fig. 1 be the present invention prepare based on high k Sc 2o 3the structural principle schematic diagram of the full water-based thin-film transistor of dielectric layer.
Fig. 2 is the water-based Sc that the present invention relates to 2o 3the leakage current test curve figure of high k dielectric layer.
Fig. 3 is the water-based Sc that the present invention relates to 2o 3the capacity measurement curve chart of high k dielectric layer.
Fig. 4 is full water-based IZO/Sc prepared by the present invention 2o 3the output characteristic curve figure of thin-film transistor, wherein grid bias V gS=1.5V.
Fig. 5 is full water-based IZO/Sc prepared by the present invention 2o 3the transfer characteristic curve figure of thin-film transistor, wherein source-drain voltage V dS=1.5V.
Fig. 6 is full water-based IZO/Sc prepared by the present invention 2o 3the bias stability performance diagram of thin-film transistor, wherein source-drain voltage V dS=1.5V.
Embodiment:
Also the present invention is further illustrated by reference to the accompanying drawings below by specific embodiment.
Embodiment:
The scandium nitrate related in the present embodiment, zinc nitrate and indium nitrate powder are all purchased from Aldrich company, and purity is greater than 98%; Its bottom grating structure is with ultra-thin scandium oxide (Sc 2o 3) for high k dielectric layer with to take indium zinc oxide (IZO) film as the preparation process of full water-based thin-film transistor of channel layer be:
(1) spin coating of aqueous sol method is adopted to prepare ultra-thin Sc 2o 3high k dielectric film:
Step 1: the single-sided polishing low-resistance silicon selecting business to buy is as substrate (resistance value is less than 0.0015 Ω cm) and gate electrode, hydrofluoric acid, acetone, alcohol Ultrasonic Cleaning substrate are used successively each 10 minutes to low-resistance silicon substrate, after repeatedly rinsing with deionized water, high pure nitrogen dries up again;
Step 2: weigh deionized water 10mL, by scandium nitrate according in the water-soluble solution of 0.15M, after mixing, under the effect of magnetic agitation, stirring at room temperature forms clarification, water white Sc in 5.5 hours 2o 3precursor liquid;
Step 3: the low-resistance silicon substrate of cleaning is put into plasma clean chamber, be evacuated to after 0.5Pa until chamber and pass into high-purity (99.99%) oxygen, controlling its power is 30Watt, and scavenging period is 120s, and during work, the intake of oxygen is 30SCCM;
Step 4: preparation Sc 2o 3sample: be spin-coated on cleaned low-resistance silicon substrate by the precursor solution of preparation in step 2, spin coating number of times is 2 times, and during spin coating precursor solution, the optimum configurations of sol evenning machine is: first in 500 revs/min of even glue 5 seconds, then in 5000 revs/min of even glue 20 seconds; After spin coating terminates, sample is put into upper 150 DEG C of roasting Jiao Tai and cures 10min, by the Sc after solidification process 2o 3the process of Muffle furnace process annealing put into by sample, and annealing temperature is 350 DEG C, and annealing time 1 hour, obtains Sc 2o 3film sample;
(2) spin coating of aqueous sol method is utilized to prepare IZO channel layer:
Step 1: indium nitrate and zinc nitrate powder are dissolved in distilled water respectively, In 3+: Zn 2+=7:3, metal cation total concentration is 0.2M; Weigh distilled water 10mL, take indium nitrate respectively, zinc nitrate is 0.42g, 0.18g, after mixing, under the effect of magnetic agitation, stirring at room temperature forms clarification, water white IZO aqueous solution in 5.5 hours;
Step 2: preparation IZO channel layer: the IZO aqueous solution of preparation in step 1 is spin-coated on plasma treated Sc 2o 3on film sample, during spin coating, the optimum configurations of sol evenning machine is: 5000 revs/min of even glue 20 seconds, and after spin coating terminates, film sample is put into the process of Muffle furnace process annealing, annealing temperature is 300 DEG C, after annealing time 2 hours;
(3) Vacuum sublimation is adopted to prepare source, leak metal electrode:
By the mode of thermal evaporation, IZO channel layer prepares the thick metal A l of 100nm as source, drain electrode with the stainless steel mask plate that breadth length ratio is 1000/250 μm, and thermal evaporation electric current is 40A, prepares Al/IZO/Sc 2o 3the thin-film transistor of/Si structure;
(4) to the Al/IZO/Sc made 2o 3the thin-film transistor of/Si structure (Fig. 1) is tested; The water-based Sc obtained 2o 3the leakage current test of dielectric layer and capacity measurement curve are respectively as shown in Figure 2 and Figure 3; Obtained thin-film transistor output characteristic curve as shown in Figure 4; The transfer characteristic curve corresponding to thin-film transistor of preparation as shown in Figure 5; The bias stability characteristic curve of the thin-film transistor of preparation as shown in Figure 6; Fig. 2, Fig. 4, Fig. 5, Fig. 6 curve is tested by Keithley 2634B semiconductor source table and is obtained; Fig. 3 curve is tested by Agilent 4294A and is obtained.

Claims (2)

1., based on a preparation method for scandium oxide high k dielectric layer thin-film transistor, it is characterized in that concrete technology comprises the following steps:
(1), Sc 2o 3the preparation of precursor solution: first by scandium nitrate Sc (NO 3) 3h 2o is dissolved in deionized water, stirs at 20-90 DEG C of lower magnetic force the Sc that 1-24 hour forms clear 2o 3precursor solution, wherein Sc 2o 3the concentration of precursor solution is 0.01-0.5mol/L;
(2), Sc 2o 3the preparation of film sample: using plasma cleaning method cleaning low-resistance surface of silicon, low-resistance silicon substrate after cleaning adopts the Sc that conventional spin coating technique spin-coating step (1) is prepared 2o 3precursor solution, first even glue 4-8 second under 400-600 rev/min, then under 3000-6000 rev/min even glue 15-30 second, spin coating number of times is 1-3 time, each spin coating thickness 5-10nm; Film after spin coating is put into temperature control 100-200 DEG C on roasting Jiao Tai to cure, obtains cured film sample; Anneal the cured film sample after curing under control temperature is 200-600 DEG C of condition 1-3 hour again, realizes dehydroxylation and metal oxide densification, obtain Sc 2o 3film sample;
(3), the preparation of IZO channel layer: by zinc nitrate Zn (NO 3) 2with indium nitrate In (NO 3) 3be dissolved in respectively in deionization, at room temperature stir the IZO aqueous solution that the concentration forming clear for 1-24 hour is 0.01-0.5mol/L, wherein In in aqueous solution 3+: Zn 2+for 1-9:1; Then in the Sc that step (2) obtains 2o 3film sample surface utilizes spin coating technique spin coating IZO aqueous solution, first even glue 4-8 second under 400-600 rev/min, then under 2000-5000 rev/min even glue 15-30 second, spin coating number of times is 1-3 time, each spin coating thickness 5-10nm; Film sample after spin coating is put into and puts into Muffle furnace again after 120-150 DEG C of roasting Jiao Tai is cured process and carry out 200-300 DEG C of process annealing process 1-5 hour, namely prepare IZO channel layer;
(4), the preparation of source, drain electrode: utilize conventional Vacuum sublimation to utilize stainless steel mask plate to prepare source metal, drain electrode on IZO channel layer, namely obtain based on ultra-thin Sc 2o 3the full water-based IZO thin-film transistor of high k dielectric layer; The electrode raceway groove length-width ratio of prepared thin-film transistor is 1:4-20, and thermal evaporation electric current is 30-50A; Obtained source, leak electricity very metal A l, Ti or Ni electrode, and thickness of electrode is 50-200nm.
2. the preparation method based on scandium oxide high k dielectric layer thin-film transistor according to claim 1, is characterized in that the deionization resistivity of water >18M Ω cm related in described step (1); The plasma clean method related in step (2) adopts oxygen or argon gas as purge gas, and its power is 20-60Watt, and scavenging period is 20-200s, and the intake of working gas is 20-50SCCM.
CN201510260595.9A 2015-05-20 2015-05-20 Method for preparing thin-film transistor based on scandia high-k dielectric layer Pending CN104934327A (en)

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CN105428247A (en) * 2016-01-18 2016-03-23 青岛大学 Preparation method of thin film transistor based on water-based ultrathin ZrO2 high k dielectric layer
CN105489486A (en) * 2016-01-18 2016-04-13 青岛大学 Method for preparing thin-film transistor based on ultra-thin magnesium oxide high-k dielectric layer
CN106601803A (en) * 2016-12-13 2017-04-26 青岛大学 Method for preparing indium oxide/aluminium oxide nanofiber filed effect transistor through UV light pretreatment
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CN105428247A (en) * 2016-01-18 2016-03-23 青岛大学 Preparation method of thin film transistor based on water-based ultrathin ZrO2 high k dielectric layer
CN105489486A (en) * 2016-01-18 2016-04-13 青岛大学 Method for preparing thin-film transistor based on ultra-thin magnesium oxide high-k dielectric layer
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CN106601803A (en) * 2016-12-13 2017-04-26 青岛大学 Method for preparing indium oxide/aluminium oxide nanofiber filed effect transistor through UV light pretreatment
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Application publication date: 20150923