CN104916647A - Non-volatile field effect transistor storage device without floating gate - Google Patents
Non-volatile field effect transistor storage device without floating gate Download PDFInfo
- Publication number
- CN104916647A CN104916647A CN201510340030.1A CN201510340030A CN104916647A CN 104916647 A CN104916647 A CN 104916647A CN 201510340030 A CN201510340030 A CN 201510340030A CN 104916647 A CN104916647 A CN 104916647A
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- Prior art keywords
- laalo
- volatile
- film
- srtio
- substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Abstract
The invention relates to the technical field of storage, in particular to non-volatile field effect transistor storage device without a floating gate. The non-volatile field effect transistor storage device comprises a SrTiO3 substrate, a LaAlO3 thin film arranged on the SrTiO3 substrate and two metal electrodes which are arranged on the SrTiO3 substrate and pass through the LaAlO3 thin film respectively, wherein the two metal electrodes serve as a source electrode S and a drain electrode D respectively; a metal electrode as a grid electrode is arranged on the LaAlO3 thin film; and two-dimensional electron gas is formed between the interface of the SrTiO3 substrate and the LaAlO3 thin film. The LaAlO3 thin film has the functions of an insulating layer and a floating gate layer in a flash memory device structure, the floating gate layer for storing electric charges does not need to be used, the structure is simpler, the device preparation technology is simpler, and the erasing speed can be greatly improved.
Description
Technical field
The present invention relates to technical field of memory, particularly, relate to a kind of non-volatile without floating boom crystal field effects pipe memory.
Background technology
Non-volatility memorizer has the advantage still can preserved for a long time for the logical data that seasonable device stores at non-transformer, is one of of paramount importance hardware in digital information technique, enjoys the concern of scholar and enterprise.
At present, on market, the non-volatility memorizer of main flow is the flash memory (Flash memory) based on charge-storage mechanism, and non-volatile flash memory storage principle is by carrying out hot electron injection to floating gate layer and release makes channel layer electron concentration change and carries out non-volatile holographic storage.But this hot electron injects and delivery mode needs to apply high voltage to grid and channel layer, can destroy the insulation degree of insulating barrier.Therefore, the erasable number of times of flash memory is restricted, and erasable speed is slow, and after the certain number of times of erasable arrival, insulating barrier electric leakage becomes serious, and electric charge can not be saved effectively, thus device can not normally be worked again.
Summary of the invention
The present invention, for overcoming at least one defect (deficiency) described in above-mentioned prior art, provides a kind of and can increase substantially the non-volatile without floating boom crystal field effects pipe memory of erasable speed.
For solving the problems of the technologies described above, technical scheme of the present invention is as follows:
A kind of non-volatile without floating boom crystal field effects pipe memory, comprise SrTiO
3substrate, be located at SrTiO
3laAlO on substrate
3film and be located at SrTiO respectively
3also through LaAlO on substrate
3two metal electrodes of film, two metal electrodes respectively as source S and drain D, LaAlO
3film is provided with the metal electrode as grid G, SrTiO
3substrate and LaAlO
3two-dimensional electron gas is formed between the interface of film.
The structure expression of memory of the present invention is: metal electrode/LaAlO
3/ SrTiO
3, its LaAlO that insulate
3insulating barrier in thin film is standby flash memory device structure and the function of floating gate layer, without the need to adopting the floating gate layer of stored charge, structure is simpler, and device preparation technology can more simplify, and can increase substantially erasable speed.
In such scheme, metal electrode is platinum electrode.
In such scheme, LaAlO
3film is monocrystal thin films.
In such scheme, utilize molecular beam epitaxy at SrTiO
3substrate forms LaAlO
3monocrystal thin films.
In such scheme, the generation type of source S and drain D is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the source electrode of two-dimensional electron gas ohmic contact and drain electrode.
In such scheme, described certain size is 100 μm.
In such scheme, source S and drain D lay respectively at the both sides of grid G.
Compared with prior art, the beneficial effect of technical solution of the present invention is:
The present invention is by the LaAlO of voltage to insulation
3in thin layer, the Lacking oxygen of positively charged redistributes, and changes channel layer (LaAlO
3/ SrTiO
3interface two-dimensional electron gas) electron concentration, make the conversion that high low resistance state occurs between source and drain two electrode, thus realize non-volatile holographic storage.And the present invention is insulated LaAlO
3insulating barrier in thin film is standby flash memory device structure and the function of floating gate layer, without the need to adopting the floating gate layer of stored charge, structure is simpler, device preparation technology can more simplify, and due to the two-dimensional electron gas in potential well be in intrinsic semiconductor on one side, and there is not the scattering process at ionized impurity center in this place, the mobility of these two-dimensional electron gas motion will be very high, therefore channel layer adopts high migration two-dimensional electron gas, compared to the method that traditional electron injection mode makes electron concentration change, its efficiency can be higher, thus can increase substantially erasable speed.
In addition, be present in LaAlO Lacking oxygen Absorbable organic halogens
3film surface, when under external voltage effect, Lacking oxygen to can migrate in thin-film body and becomes positive charge constraint center.Due to coulomb interaction, positive charge constraint center can make the electron concentration of channel layer improve, so the interelectrode resistance of source and drain two reduces, achieve the low resistance state of channel layer, namely logic state is opened.In like manner, under in the opposite direction voltage effect, Lacking oxygen moves back film surface, and constraint center is at LaAlO
3/ SrTiO
3the electronics of interfacial polarization tails off, and electron concentration returns to initial condition, thus achieves high-resistance state, and namely logic state is closed.In this process, external voltage just can make Lacking oxygen move without the need to very large change, realizes logic state change, substantially can not damage insulating barrier, therefore can improve its erasable number of times, improve the useful life of device.
Accompanying drawing explanation
Fig. 1 is a kind of non-volatile stereogram without floating boom crystal field effects pipe memory of the present invention.
Fig. 2 is a kind of non-volatile sectional view without floating boom crystal field effects pipe memory of the present invention.
Fig. 3 is that the present invention is a kind of non-volatile without floating boom crystal field effects pipe memory Lacking oxygen view in an initial condition.
Fig. 4 is that the present invention is a kind of non-volatile without floating boom crystal field effects pipe memory Lacking oxygen view under external voltage effect.
Embodiment
Accompanying drawing, only for exemplary illustration, can not be interpreted as the restriction to this patent;
In order to better the present embodiment is described, some parts of accompanying drawing have omission, zoom in or out, and do not represent the size of actual product;
To those skilled in the art, in accompanying drawing, some known features and explanation thereof may be omitted is understandable.
In describing the invention, it is to be appreciated that term " first ", " second " only for describing object, and can not be interpreted as the quantity of instruction or hint relative importance or implicit indicated technical characteristic.Thus, one or more these features can be expressed or impliedly be comprised to the feature of " first ", " second " of restriction.In describing the invention, except as otherwise noted, the implication of " multiple " is two or more.
In describing the invention, it should be noted that, unless otherwise clearly defined and limited, term " installation ", " connection " should be interpreted broadly, and such as, can be fixedly connected with, also can be removably connect, or connect integratedly; Can be mechanical connection, also can be electrical connection; Can be directly be connected, also can be indirectly connected by intermediary, the connection of two element internals can be said.For the ordinary skill in the art, concrete condition above-mentioned term can be understood at concrete meaning of the present invention.
Below in conjunction with drawings and Examples, technical scheme of the present invention is described further.
Embodiment 1
As depicted in figs. 1 and 2, the present invention's one is non-volatile specifically comprises SrTiO without floating boom crystal field effects pipe memory
3substrate 1, be located at SrTiO
3laAlO on substrate 1
3film 2 and be located at SrTiO respectively
3also through LaAlO on substrate 1
3two metal electrodes 3,4 of film 2, two metal electrodes 3,4 respectively as source S and drain D, LaAlO
3film 2 is provided with the metal electrode 5, SrTiO as grid G
3substrate 1 and LaAlO
3two-dimensional electron gas 6 is formed between the interface of film 2.
Wherein, the metal electrode as source S, drain D and grid G is platinum electrode.
The structure expression of the memory that the present invention realizes is: Pt/LaAlO
3/ SrTiO
3, its LaAlO that insulate
3insulating barrier in thin film is standby flash memory device structure and the function of floating gate layer, without the need to adopting the floating gate layer of stored charge, structure is simpler, and device preparation technology can more simplify, and can increase substantially erasable speed.
In specific implementation process, LaAlO
3film is monocrystal thin films.
In specific implementation process, utilize molecular beam epitaxy or laser molecular beam epitaxy at SrTiO
3substrate is formed the LaAlO of different-thickness
3monocrystal thin films.
In specific implementation process, the generation type of source S and drain D is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the source electrode of two-dimensional electron gas ohmic contact and drain electrode.Preferably, channel layer length 100 μm of Hall FET device are prepared by photoetching method and wet etching.
In specific implementation process, source S and drain D lay respectively at the both sides of grid G.
As shown in Figure 3, in an initial condition, there is Lacking oxygen 7 in memory of the present invention, Lacking oxygen 7 is bound in LaAlO to operation principle of the present invention
3film 2 surface, interface electron concentration is fewer, thus achieves high-resistance state, is in the off status of logic state; By applying direct voltage to grid G, make positively charged Lacking oxygen 7 at LaAlO
3redistribution in film 2, as shown in Figure 4, Lacking oxygen 7 moves to LaAlO
3become positive charge constraint center in film 2 body, due to coulomb interaction, positive charge constraint center can make channel layer (LaAlO
3/ SrTiO
3interface two-dimensional electron gas) electron concentration improve, achieve the low resistance state of channel layer, realize the open state of logic state, namely change LaAlO by electric polarization
3/ SrTiO
3interface two-dimensional electron gas, can realize the logic state switch of channel layer, reach non-volatile holographic storage function.In this structure, the LaAlO of insulation
3film 2 has possessed the function of insulating barrier in flash memory device structure and floating gate layer, and without the need to adopting the floating gate layer of stored charge, structure is simpler, and device preparation technology can more simplify, and can increase substantially erasable speed.
The corresponding same or analogous parts of same or analogous label;
Describe in accompanying drawing position relationship for only for exemplary illustration, the restriction to this patent can not be interpreted as;
Obviously, the above embodiment of the present invention is only for example of the present invention is clearly described, and is not the restriction to embodiments of the present invention.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.All any amendments done within the spirit and principles in the present invention, equivalent to replace and improvement etc., within the protection range that all should be included in the claims in the present invention.
Claims (7)
1. non-volatile without a floating boom crystal field effects pipe memory, it is characterized in that, comprise SrTiO
3substrate, be located at SrTiO
3laAlO on substrate
3film and be located at SrTiO respectively
3also through LaAlO on substrate
3two metal electrodes of film, two metal electrodes respectively as source S and drain D, LaAlO
3film is provided with the metal electrode as grid G, SrTiO
3substrate and LaAlO
3two-dimensional electron gas is formed between the interface of film.
2. according to claim 1 non-volatile without floating boom crystal field effects pipe memory, it is characterized in that, metal electrode is platinum electrode.
3. according to claim 1 non-volatile without floating boom crystal field effects pipe memory, it is characterized in that, LaAlO
3film is monocrystal thin films.
4. according to claim 3 non-volatile without floating boom crystal field effects pipe memory, it is characterized in that, utilize molecular beam epitaxy at SrTiO
3substrate forms LaAlO
3monocrystal thin films.
5. according to claim 2 non-volatile without floating boom crystal field effects pipe memory, it is characterized in that, the generation type of source S and drain D is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the source electrode of two-dimensional electron gas ohmic contact and drain electrode.
6. according to claim 5ly non-volatilely to it is characterized in that without floating boom crystal field effects pipe memory, described certain size is 100 μm.
7. non-volatile without floating boom crystal field effects pipe memory according to any one of claim 1-5, it is characterized in that, source S and drain D lay respectively at the both sides of grid G.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510340030.1A CN104916647A (en) | 2015-06-18 | 2015-06-18 | Non-volatile field effect transistor storage device without floating gate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510340030.1A CN104916647A (en) | 2015-06-18 | 2015-06-18 | Non-volatile field effect transistor storage device without floating gate |
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|---|---|
| CN104916647A true CN104916647A (en) | 2015-09-16 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050185474A1 (en) * | 2004-02-24 | 2005-08-25 | Renesas Technology Corp. | Semiconductor integrated circuit |
| CN102201442A (en) * | 2011-04-02 | 2011-09-28 | 中国科学院苏州纳米技术与纳米仿生研究所 | Heterojunction field effect transistor based on channel array structure |
| CN103247331A (en) * | 2012-02-13 | 2013-08-14 | 中国科学院微电子研究所 | Semiconductor memory device and access method thereof |
| CN204732411U (en) * | 2015-06-18 | 2015-10-28 | 中山大学 | A kind of non-volatile without floating boom crystal field effects pipe memory |
-
2015
- 2015-06-18 CN CN201510340030.1A patent/CN104916647A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050185474A1 (en) * | 2004-02-24 | 2005-08-25 | Renesas Technology Corp. | Semiconductor integrated circuit |
| CN102201442A (en) * | 2011-04-02 | 2011-09-28 | 中国科学院苏州纳米技术与纳米仿生研究所 | Heterojunction field effect transistor based on channel array structure |
| CN103247331A (en) * | 2012-02-13 | 2013-08-14 | 中国科学院微电子研究所 | Semiconductor memory device and access method thereof |
| CN204732411U (en) * | 2015-06-18 | 2015-10-28 | 中山大学 | A kind of non-volatile without floating boom crystal field effects pipe memory |
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Application publication date: 20150916 |
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