CN104900267B - The read control circuit of terminate-and-stay-resident - Google Patents
The read control circuit of terminate-and-stay-resident Download PDFInfo
- Publication number
- CN104900267B CN104900267B CN201510334887.2A CN201510334887A CN104900267B CN 104900267 B CN104900267 B CN 104900267B CN 201510334887 A CN201510334887 A CN 201510334887A CN 104900267 B CN104900267 B CN 104900267B
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- voltage
- pressure regulator
- controllable switch
- stay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The output end of the read control circuit of terminate-and-stay-resident, power adapter, terminate-and-stay-resident unit and read/write circuit including exporting DC power supply, power adapter connects read/write circuit；Pressure regulator provides voltage adjustable third DC power supply, the voltage range of third DC power supply be from predetermined minimum value to predetermined maximum, and its predetermined maximum voltage value be equal to power adapter voltage value；Control processing unit, by it is standby switch to working condition when, control third DC power supply voltage rise to predetermined maximum from predetermined minimum value, when switching to standby mode by work, the voltage of third DC power supply drops to predetermined minimum value from predetermined maximum；Control the control terminal of the output end connection pressure regulator of processing unit, the power end of the output end connection terminate-and-stay-resident unit of pressure regulator.Due to being provided with pressure regulator, the supply voltage of terminate-and-stay-resident first can be reduced to lower value when CPU is prepared to enter into dormant state, to reduce the quiescent current consumption of terminate-and-stay-resident.
Description
Technical field
The present invention relates to a kind of read control circuit, especially a kind of read control circuit of terminate-and-stay-resident.
Background technique
In some super low-power consumption systems, such as 4.0 system of bluetooth, needing to be powered with disposable battery is more than the several months.Wherein
Some AP would generally be saved using terminate-and-stay-resident (Retention Memory) (using CPU:Application
) or CPU (central cpu: Central Processing Unit) or MCU (single-chip microcontroller: Micro Control Processor
Unit) running state data.Such as a kind of wearable measuring of human health equipment, need constantly to store human body history health number
According to (such as blood pressure, beats etc.), when every subsystem is waken up measurement health data again, need and last time or historical data
It is compared, in case of unexpected acute variation, may indicate that the omen of major disease, wearable people occurs in human health
Body health monitoring equipment can produce pre-alert notification.
Now be all by DC-to-dc converter (voltage-dropping type) be AP or CPU or MCU, read/write circuit and terminate-and-stay-resident
Power supply, some circuits are equipped with controllable switch between DC-to-dc converter and AP or CPU or MCU.Usual terminate-and-stay-resident needs
When AP or CPU or MCU want suspend mode (referring to that the controllable switch between them disconnects, DC-to-dc converter still works), it is still to tie up
Work is held, some critical information are deposited, when being reawaked so as to CPU, it is known that account of the history.Terminate-and-stay-resident is usual
Quiescent dissipation is had, these power consumptions can reduce the cruise duration of system.Power consumption is reduced, the cruise duration of increase system is facilitated,
The greatly competitiveness of enhancing product.As system is increasingly complicated, the size of terminate-and-stay-resident is but increasing, bigger terminate-and-stay-resident
It can store more information, realize more powerful function.But usual terminate-and-stay-resident is bigger, and the quiescent current of consumption is bigger.Cause
This needs to improve the design of terminate-and-stay-resident to reduce its quiescent current.
In view of this, the present invention is specifically proposed.
Summary of the invention
The technical problem to be solved in the present invention is that overcoming the deficiencies of the prior art and provide a kind of quasi- in control processing unit
For the read control circuit for the terminate-and-stay-resident for entering the quiescent current consumption that can reduce terminate-and-stay-resident when dormant state.
In order to solve the above technical problems, the present invention is using the basic conception of technical solution:
A kind of read control circuit of terminate-and-stay-resident, including for exporting a DC power supply power adapter, it is resident in
Memory cell and for terminate-and-stay-resident unit carry out read/write operation read/write circuit, the power adapter output end connection
The power end of the read/write circuit；Further include:
Pressure regulator provides voltage adjustable third DC power supply, the voltage range of third DC power supply be from it is predetermined most
Small voltage value is to predetermined maximum voltage value, and the predetermined maximum voltage value of the third DC power supply is equal to the power adapter
Voltage value；
Processing unit is controlled, to control the voltage of third DC power supply when switching to working condition by standby mode
Predetermined maximum voltage value is risen to from predetermined minimum amount of voltage that, when switching to standby mode by working condition, control third is straight
The voltage in galvanic electricity source drops to predetermined minimum amount of voltage that from predetermined maximum voltage value；
The output end of the control processing unit connects the control terminal of the pressure regulator, the output end connection of the pressure regulator
The power end of the terminate-and-stay-resident unit.
Further, the control processing unit, to control pressure regulator when switching to working condition by standby mode
The third direct current power source voltage of output divides n grades to gradually rise to predetermined maximum voltage value, by working from predetermined minimum amount of voltage that
When state switches to standby mode, the second source voltage of control pressure regulator output gradually declines from predetermined maximum voltage value n grades
To predetermined minimum amount of voltage that, n >=2, n are integer.
Preferably, the pressure regulator includes the first DC supply input, the second DC supply input, current source, the
One NMOS tube, the second NMOS tube, resistance, A controllable switch, B controllable switch, third NMOS tube and two capacitors；At the control
Reason unit is CPU；
First NMOS tube is connected with the grid of the second NMOS tube, the drain electrode of first NMOS tube and its grid phase
Even, the source electrode of first NMOS tube is connected with substrate, and the grid of the third NMOS tube is connected with drain electrode, the 3rd NMOS
First DC supply input of the source electrode and Substrate ground of pipe, the pressure regulator passes through current source connection described first
The drain electrode of NMOS tube, the first DC supply input of the pressure regulator are also connected with the drain electrode of second NMOS tube, the electricity
Resistance be connected to the source electrode of first NMOS tube, the grid of the tie point of substrate and third NMOS tube and drain electrode tie point it
Between, the power end and the resistor coupled in parallel of the A controllable switch, the output end of the CPU connect the control of the A controllable switch
The control terminal at end and the B controllable switch, the output that the source electrode of second NMOS tube is connected as the pressure regulator with substrate
End, the power end of the B controllable switch is connected between the second DC supply input and the output end of pressure regulator, described in one
Between the grid and ground of first NMOS tube, the source electrode of the second NMOS tube is connected and is grounded with substrate capacitance connection, another
A capacitance connection is between the source electrode and ground of second NMOS tube；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes A controllable
Switch disconnects, then exporting second control signal makes B controllable switch closure make the voltage of pressure regulator output from predetermined minimum amount of voltage that
Rise to predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that A can
Control closes the switch, then exports the 4th control signal and the disconnection of B controllable switch is made to make the voltage of pressure regulator output from predetermined maximum electricity
Pressure value drops to predetermined minimum amount of voltage that.
Preferably, the pressure regulator includes the first DC supply input, the second DC supply input, current source, the
One NMOS tube, the second NMOS tube, at least two resistance, the A controllable switch equal with the resistance quantity, B controllable switch, third
NMOS tube and two capacitors, the control processing unit are CPU；
First NMOS tube is connected with the grid of the second NMOS tube, the drain electrode of first NMOS tube and its grid phase
Even, the source electrode of first NMOS tube is connected with substrate, and the grid of the third NMOS tube is connected with drain electrode, the 3rd NMOS
First DC supply input of the source electrode and Substrate ground of pipe, the pressure regulator passes through current source connection described first
The drain electrode of the drain electrode of NMOS tube, first NMOS tube is connected with its grid, the first DC supply input of the pressure regulator
It is also connected with the drain electrode of second NMOS tube, at least two resistance is connected on the source electrode of first NMOS tube, substrate
Between the tie point of the grid and drain electrode of tie point and third NMOS tube, the power end of each A controllable switch is one in parallel
The resistance, the output end of the CPU are separately connected the control terminal of the A controllable switch and the control terminal of the B controllable switch,
The power end of the output end that the source electrode of second NMOS tube is connected as the pressure regulator with substrate, the B controllable switch connects
It connects between the second DC supply input and the output end of pressure regulator, a capacitance connection is in first NMOS tube
Between grid and ground, the source electrode of the second NMOS tube is connected and is grounded with substrate, another described capacitance connection is described second
Between the source electrode and ground of NMOS tube；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes multiple A
Controllable switch successively disconnects, then exporting second control signal makes B controllable switch closure make the voltage of pressure regulator output gradually from pre-
Determine minimum amount of voltage that and rises to predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that multiple
A controllable switch closure, then export the 4th control signal and B controllable switch is made to disconnect the voltage for exporting pressure regulator gradually from predetermined
Maximum voltage value drops to predetermined minimum amount of voltage that.
Preferably, the resistance value of at least two resistance is incremental or equal by 2 multiple.
Preferably, the pressure regulator includes the first DC supply input, the second DC supply input, current source, the
One NMOS tube, the second NMOS tube, two resistance, A controllable switch, B controllable switch, third NMOS tube and capacitor, at the control
Reason unit is CPU；
First DC supply input is connected by the current mirror with the drain electrode of first NMOS tube, and described
One DC supply input is also connected with the drain electrode of second NMOS tube, the grid phase of first NMOS tube and the second NMOS tube
Even, and described two resistance are connected in series between first NMOS tube and the grid of the second NMOS tube, the first NMOS
The source electrode of pipe is connected with substrate, and connects the drain electrode of the third NMOS tube, the source electrode and Substrate ground of the third NMOS tube,
A capacitor is connected between the grid and ground of second NMOS tube, the source electrode and substrate of second NMOS tube pass through
Another described capacity earth, the power end of the A controllable switch are connected to the direct current transducer input terminal and described two
Between the tie point of resistance, the output end of the CPU connects the control terminal of the A controllable switch, the source of second NMOS tube
Pole and substrate are connected to the output end of the pressure regulator, and the power end of the B controllable switch is connected to second direct current
Between source input terminal and the output end of pressure regulator, the output end of the CPU connects the control terminal of the B controllable switch；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes A controllable
It closes the switch, then exporting second control signal makes B controllable switch closure make the voltage of pressure regulator output from predetermined minimum amount of voltage that
Rise to predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that A can
It controls switch to disconnect, then exports the 4th control signal and the disconnection of B controllable switch is made to make the voltage of pressure regulator output from predetermined maximum electricity
Pressure value drops to predetermined minimum amount of voltage that.
Preferably, the third NMOS tube, which is used, uses same type with the NMOS in terminate-and-stay-resident unit.
Preferably, the first DC supply input of the pressure regulator connects the first DC power supply, and the of the pressure regulator
Two DC supply inputs connect the output end of the power adapter, and first DC power supply connects the power adapter
Input terminal.
Preferably, the power adapter is DC-DC power converter.
Preferably, the A controllable switch and B controllable switch are triode or field-effect tube.
After adopting the above technical scheme, compared with the prior art, the invention has the following beneficial effects: the present invention is due to setting
Pressure regulator has been set, first can be reduced to the supply voltage of terminate-and-stay-resident when controlling processing unit and being prepared to enter into dormant state lower
Value, to reduce the quiescent current consumption of terminate-and-stay-resident.
Detailed description of the invention
Fig. 1 is the functional block diagram of the read control circuit of terminate-and-stay-resident of the present invention；
Fig. 2 is a kind of physical circuit figure of pressure regulator of the present invention；
Fig. 3 is another physical circuit figure of pressure regulator of the present invention；
Fig. 4 is the third physical circuit figure of pressure regulator of the present invention.
Specific embodiment
In the following with reference to the drawings and specific embodiments, the invention will be further described, to help the contents of the present invention are understood.
A kind of read control circuit of terminate-and-stay-resident, power adapter, terminate-and-stay-resident list including exporting a DC power supply
Member and for terminate-and-stay-resident carry out read/write operation read/write circuit, the power adapter output end connection it is described read/
The power end of write circuit, further includes:
Pressure regulator provides voltage adjustable third DC power supply, the voltage range of third DC power supply be from it is predetermined most
Small voltage value is to predetermined maximum voltage value, and the predetermined maximum voltage value of the third DC power supply is equal to the power adapter
Voltage value；
Processing unit is controlled, to control the voltage of third DC power supply when switching to working condition by standby mode
Predetermined maximum voltage value is risen to from predetermined minimum amount of voltage that, when switching to standby mode by working condition, control third is straight
The voltage in galvanic electricity source drops to predetermined minimum amount of voltage that from predetermined maximum voltage value；
The output end of the control processing unit connects the control terminal of the pressure regulator, the output end connection of the pressure regulator
The power end of the terminate-and-stay-resident unit.
Further, the control processing unit, to control pressure regulator when switching to working condition by standby mode
The third direct current power source voltage of output divides n grades to gradually rise to predetermined maximum voltage value, by working from predetermined minimum amount of voltage that
When state switches to standby mode, the second source voltage of control pressure regulator output gradually declines from predetermined maximum voltage value n grades
To predetermined minimum amount of voltage that, n >=2, n are integer.
Refer to Fig. 1, a kind of read control circuit of terminate-and-stay-resident, including the drop for connecting the first DC power supply
Die mould DC-to-dc converter WZ (as power adapter), CPU, terminate-and-stay-resident unit R eMEM and for terminate-and-stay-resident into
The output of the read/write circuit RW, the DC-to-dc converter WZ of row read/write operation be separately connected the CPU power end and
The power end of read/write circuit RW, the read/write circuit RW and terminate-and-stay-resident unit R eMEM communication connection, further include a tune
The power supply output of depressor VT, the DC-to-dc converter WZ connect the second direct current transducer input terminal of the pressure regulator VT,
The pressure regulator VT further includes one for connecting the first DC supply input of the DC power supply, the output end of the CPU
Two Regulation Control ends of the pressure regulator VT are connected, the output of the pressure regulator VT connects the terminate-and-stay-resident unit R eMEM
Power end.
Referring to Fig. 2, as a kind of preferred embodiment, the pressure regulator includes the first DC supply input VIN, second straight
Flow power input VH, current source, the first NMOS tube, the second NMOS tube, resistance R1, A controllable switch, B controllable switch, third
NMOS tube and two capacitors；The control processing unit is CPU；
First DC supply input VIN connection first DC power supply, the second DC supply input VH connection are straight
Stream-direct current transducer WZ, first NMOS tube are connected with the grid of the second NMOS tube, the drain electrode of the first NMOS tube MN1
It is connected with its grid, the source electrode of the first NMOS tube MN1 is connected with substrate, the grid of the third NMOS tube MN3 and drain electrode
It is connected, the source electrode and Substrate ground of the third NMOS tube MN3, the resistance R1 are connected to the source of the first NMOS tube MN1
Between pole, the grid of the tie point of substrate and third NMOS tube MN3 and the tie point of drain electrode, the first direct current of the pressure regulator
Source input terminal VIN connects the drain electrode of first NMOS tube, the drain electrode of first NMOS tube and its grid by the current source
Extremely it is connected, the first DC supply input VIN of the pressure regulator is also connected with the drain electrode of second NMOS tube, and the A is controllable
The power end of switch is in parallel with the resistance R1, the output end of the CPU connect the A controllable switch control terminal and the B
The control terminal of controllable switch, the source electrode of second NMOS tube are connected output end VL, the B as the pressure regulator with substrate
The power end of controllable switch is connected between the second DC supply input VH of adjuster and the output end VL of pressure regulator, and one
Between the grid and ground of first NMOS tube, the source electrode of the second NMOS tube is connected and is grounded with substrate the capacitance connection,
Another described capacitance connection is between the source electrode and ground of second NMOS tube；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes A controllable
Switch disconnects, then exporting second control signal makes B controllable switch closure make the voltage of pressure regulator output from predetermined minimum amount of voltage that
Rise to predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that A can
Control closes the switch, then exports the 4th control signal and the disconnection of B controllable switch is made to make the voltage of pressure regulator output from predetermined maximum electricity
Pressure value drops to predetermined minimum amount of voltage that.
The working principle of the read control circuit of terminate-and-stay-resident of the present invention are as follows: when system enters standby mode, CPU passes through
Setting KSK becomes low level from high level, then by control KS1 from low level become high level (control A controllable switch S1 from
Off-state is switched on state), the output voltage VL of pressure regulator VT is adjusted to minimum, DC-DC is then shut off
Converter WZ (realizes) that DC-to-dc converter WZ itself is also by power consumption at this time by the prior art, while straight with direct current-
The circuit (including read/write circuit RW, CPU etc.) of the output power supply of stream transformer WZ will all no longer power consumptions, only pressure regulator at this time
The power consumption of system can be accomplished extremely low, such as 200 Naans in power consumption by VT and terminate-and-stay-resident unit R eMEM.
When CPU is prepared to enter into dormant state, first passes through CPU control and drop the supply voltage of terminate-and-stay-resident unit R eMEM
Down to lower value, in this way so as to the quiescent current consumption for reducing terminate-and-stay-resident unit R eMEM, then CPU just enters dormant state；
After CPU preparation is restored to working condition from dormant state, first passes through control A controllable switch S1 and become from high level
Low level (i.e. A controllable switch S1 opening) by the output voltage of pressure regulator VT by minimum be turned up to peak, then pass through by
KSK is set as high level and the output of pressure regulator VT is pulled up to output voltage VH equal to DC-to-dc converter WZ, at this time
Read/write circuit RW and terminate-and-stay-resident unit R eMEM work can guarantee the correct reading of data at identical voltage (i.e. VH) in this way
Write operation.Pressure regulator VT is in running order always, is never switched off, and resistance R1 is only allowed to be connected, causes to export
Voltage increases.
Fig. 3 is the physical circuit figure of another pressure regulator VT, and the pressure regulator VT includes the first DC supply input
VIN, the second DC supply input VH, current source I1, the first NMOS tube MN1, the second NMOS tube MN2, three resistance, respectively
R1, R2, R3, one group of A controllable switch, B controllable switch SK, third NMOS tube MN3 and two capacitors C1, C2；
First DC supply input VIN connection first DC power supply, the second DC supply input VH connection are straight
Stream-direct current transducer WZ, the first NMOS tube MN1 and the second NMOS tube MN2 grid is connected, the first NMOS tube MN1
Drain electrode be connected with its grid, the source electrode of the first NMOS tube MN1 is connected with substrate, the grid of the third NMOS tube MN3
It is connected with drain electrode, the source electrode and Substrate ground of the third NMOS tube, described three resistance R1, R2, R3 are connected on described first
Between the source electrode of NMOS tube MN1, the grid of the tie point of substrate and third NMOS tube MN3 and the tie point of drain electrode, the pressure regulation
The first DC supply input VIN of device VT connects the drain electrode of the first NMOS tube MN1, the tune by the current source I1
The first DC supply input VIN of depressor VT is also connected with the drain electrode of the second NMOS tube MN2, the first NMOS tube MN1
Source electrode and substrate be sequentially connected in series described three resistance R1, R2, R3, the first A controllable switch S1 of first resistor R1 parallel connection, the second electricity
The 2nd A controllable switch S2 of R2 parallel connection, 3rd resistor R3 the 3rd A controllable switch S3 of parallel connection are hindered, the output end of the CPU is separately connected
The control terminal of three A controllable switches, concatenated described three resistance R1, R2, R3 connect the drain electrode of the third NMOS tube,
The drain electrode of the source electrode and Substrate ground of the third NMOS tube, the third NMOS tube is connected with its grid, the output of the CPU
End is also connected with the control terminal of the B controllable switch SK, and the source electrode of the second NMOS tube MN2 is connected as the pressure regulation with substrate
The output end VL of device VT, the power end of the B controllable switch SK are connected to the second DC supply input VH and tune of pressure regulator
Between the output end VL of depressor, capacitor C2 is connected between the grid and ground of the first NMOS tube MN1, the second NMOS tube MN2
Source electrode be connected and be grounded with substrate, another described capacitor C1 is connected between the source electrode and ground of the second NMOS tube MN2.
The working principle of the read control circuit of terminate-and-stay-resident of the present invention are as follows: when system enters standby mode, CPU passes through
KSK, which is arranged, from high level becomes low level, then passes sequentially through control KS1, KS2, KS3 and become high level from low level and (control
Make three A controllable switches S1, S2, S3 and be successively switched on state from off-state), by the output voltage VL of pressure regulator VT by
Step section is then shut off DC-to-dc converter WZ (realizing by the prior art), DC-DC is converted at this time to minimum
Device WZ itself also not by power consumption, while with the circuit of the output power supply of DC-to-dc converter WZ (including read/write circuit RW,
CPU etc.) will all no longer power consumptions, only pressure regulator VT and terminate-and-stay-resident unit R eMEM, can be by the power consumption of system in power consumption at this time
Accomplish extremely low, such as 200 Naans.
When CPU is prepared to enter into dormant state, first passes through CPU control and drop the supply voltage of terminate-and-stay-resident unit R eMEM
Down to lower value, in this way so as to the quiescent current consumption for reducing terminate-and-stay-resident unit R eMEM, then CPU just enters dormant state；
When CPU preparation be restored to working condition from dormant state after, first pass through successively control three A controllable switch S1, S2,
S3 from high level become low level (i.e. three A controllable switch S1-S3 are successively opened) by the output voltage of pressure regulator VT gradually by
Minimum is turned up to peak, and then the output of pressure regulator VT is pulled up to equal to direct current-by setting high level for KSK
The output voltage VH of direct current transducer WZ, at this time read/write circuit RW and terminate-and-stay-resident unit R eMEM work identical voltage (i.e.
VH under), it can guarantee the correct read-write operation of data in this way.Pressure regulator VT is in running order always, is never switched off, only
It is that resistance R1, R2, R3 is allowed to be connected, output voltage is caused to increase.
The judgement of CPU working condition (refers to from work to suspend mode and from suspend mode to working condition) that process is by CPU
Software realize.It further include the flash memory for storing software in CPU, wherein storing embedded software.The operation of CPU passes through embedding
Enter formula software to execute to realize, and the technology belongs to the prior art.
Guarantee that the voltage of read/write circuit RW and terminate-and-stay-resident unit R eMEM identical can just guarantee the correct reading of data
Write operation, because are as follows: if voltage is different, such as terminate-and-stay-resident unit R eMEM unit is still with the lower voltage (threshold of a NMOS tube
Threshold voltage) work, then it may cause read/write circuit electric leakage.The reason is as follows that: read/write circuit is generally digital circuit, if from staying
Signal (signal for the being supplied to read/write circuit) high level of internal storage location ReMEM unit is stayed to be lower than the supply voltage of read/write circuit,
Using a phase inverter as the example for realizing input circuit in read/write circuit, then at this point, the input of phase inverter is in phase inverter electricity
Medium voltage before source and ground, the PMOS and NMOS that will lead in phase inverter are simultaneously turned on, and the electric leakage of such phase inverter is very big.
General digital circuit requires the high level of its input signal to be equal to its supply voltage, and when such NMOS is connected, PMOS is broken completely
It opens, thus without electric leakage.
It is stepped up, stays step by step to pass through when the supply voltage of terminate-and-stay-resident unit R eMEM increases in above-described embodiment
It stays the supply voltage of internal storage location ReMEM and is gradually reduced step by step when reducing to pass through, it in this way can be to avoid terminate-and-stay-resident unit
The problem of leading to corrupt data in terminate-and-stay-resident unit R eMEM when the supply voltage of ReMEM jumps rapidly.
Above-mentioned resistance may be greater than any amount equal to two.In some embodiments, can increase resistance and with
The switch control of parallel connection be more stepped up and reduced multi-step regulative mode to realize.The voltage of output end VL should
Equal to the voltage of VN3S node, equal to the sum of the gate source voltage of voltage and third NMOS tube MN3 in series resistance.Work as series electrical
By part with after A controllable switch parallel connection short circuit, voltage drop thereon will reduce for resistance；The part A in parallel with series resistance is controllably opened
After shutdown is opened, voltage drop thereon will increase.To realize the effect for passing through switch-mode regulation VN3S voltage.Third NMOS tube MN3
For the minimum operating voltage of terminate-and-stay-resident unit to be arranged.In a preferred embodiment, third NMOS tube MN3 can be designed
Same type is used using with the NMOS (i.e. for constructing the NMOS of terminate-and-stay-resident unit core cell) in terminate-and-stay-resident unit
Both (i.e. match), in this way between them during fabrication, threshold voltage is than more consistent, i.e. the achievable most low-key of pressure regulator
It presses with the minimum operating voltage of terminate-and-stay-resident unit than more consistent, chip yield when helping to improve lowest power consumption work may be used also
To help to improve the problem of leading to job insecurity with the variation of the factors such as temperature, process deviation.General terminate-and-stay-resident unit
Minimum operating voltage is nearly equal to construct its metal-oxide-semiconductor threshold value.The definition of metal-oxide-semiconductor threshold value is the minimum voltage turned it on.
The resistance value of at least two resistance is incremental or equal by 2 multiple.It can guarantee that transformation amplitude is relatively flat in this way
It is slow, it can more be jumped rapidly to avoid the supply voltage of terminate-and-stay-resident unit.
Fig. 4 is the third physical circuit figure of pressure regulator VT, and the pressure regulator VT includes the first DC supply input
VIN, the second DC supply input VH, current source I2, the first NMOS tube MN4, the second NMOS tube MN5, two resistance R4, R5, A
Controllable switch SK1, B controllable switch SK2, third NMOS tube MN6 and two capacitors C3, C4；
First DC supply input VIN connection first DC power supply, the second DC supply input VH connection are straight
Stream-direct current transducer WZ, the leakage that first DC supply input passes through the current mirror I2 and the first NMOS tube MN4
Extremely it is connected, first DC supply input is also connected with the drain electrode of the second NMOS tube MN5, the first NMOS tube MN4
It is connected with the grid of the second NMOS tube MN5, and described two resistance R4, R5 are connected in series in the first NMOS tube MN4 and
Between the grid of two NMOS tube MN5, the source electrode of the first NMOS tube MN4 is connected with substrate, and connects the third NMOS tube
The drain electrode of MN6, the source electrode and Substrate ground of the third NMOS tube MN6 connect between the grid and ground of the second NMOS tube MN5
The capacitor C2 is met, the source electrode and substrate of the second NMOS tube MN5 passes through another capacitor C1 ground connection, described
The power end of A controllable switch SK1 is connected between the second DC supply input VH and the tie point of described two resistance,
The output end of the CPU connects the control terminal of the A controllable switch, and the source electrode of the second NMOS tube MN5 connects work with substrate
For the output end VL of the pressure regulator VT, the power end of the B controllable switch is connected to the second DC supply input VH
Between the output end VL of pressure regulator VT, the output end of the CPU connects the control terminal of the B controllable switch SK2.
The working principle of this circuit are as follows: when needing to read and write, CPU, which is first passed through, sets high level from low level for KSK1,
The output of pressure regulator VT is gradually pulled up to the output voltage VH close to DC-to-dc converter WZ, then by by KSK2
High level is set as from low level to draw high the output of low-power consumption pressure regulator VT to the output electricity of DC-to-dc converter WZ completely
VH is pressed, read/write circuit RW and terminate-and-stay-resident unit R eMEM work at this time can guarantee number at identical voltage (i.e. VH) in this way
According to correct read-write operation.
When system enters standby mode, first stop read-write operation (realizing by the prior art), then CPU passes through control
KSK2 becomes low level from high level, then controls KSK1 and become low level from high level, by the defeated of the pressure regulator VT of super low-power consumption
Voltage VL is gradually adjusted to minimum out, is then shut off DC-to-dc converter WZ, at this time DC-to-dc converter WZ itself
Also not by power consumption, while will all with the circuit (including read/write circuit RW, CPU etc.) of the output power supply of DC-to-dc converter WZ
No longer power consumption, only pressure regulator VT and terminate-and-stay-resident unit R eMEM is in power consumption at this time, the power consumption of system can be accomplished it is extremely low,
Such as 200 Naan.
In Fig. 4 when KSK1 is high level, A controllable switch Sk1 conducting, NR node is pulled to VH voltage, due to resistance
R5 and capacitor C4 causes the grid voltage GN4 of the second NMOS tube MN5 to rise slower, and MN5 is that source electrode follows structure, thus MN5
Source voltage also rises relatively slowly, plays the role of that VL voltage is allowed to rise slowly.When KSK2 is high level, when B controllable switch
Sk2 conducting, VL node are directly pulled to VH voltage.When KSK1 is low level, when A controllable switch Sk1 is disconnected, capacitor C4
On voltage slowly discharged by resistance R4, R5 and the first NMOS tube MN4, MN6, lead to node GN4 (i.e. electricity on capacitor C4
Pressure) voltage slowly declines, and since MN5 is that source electrode follows structure, slow decline of MN5 grid voltage will lead to its source voltage
(i.e. VL voltage).The resistance value of electric value R5 and the capacitance product of capacitor C4 are bigger, and the speed that VL rises is slower.Resistance R4 and
The sum of resistance value of R5, then it is bigger with the capacitance product of capacitor C4, the speed of VL decline is slower.
The A controllable switch and B controllable switch are triode.
The conversion of DC-DC disclosed in Publication No. CN102983743A can be used in above-mentioned DC-to-dc converter
Device.
The battery supply of system where above-mentioned first DC power supply refers generally to terminate-and-stay-resident unit.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (8)
1. a kind of read control circuit of terminate-and-stay-resident, including power adapter, the terminate-and-stay-resident for exporting a DC power supply
Unit and read/write circuit for carrying out read/write operation to terminate-and-stay-resident unit, the output end of the power adapter connect institute
State the power end of read/write circuit；It is characterized by further comprising:
Pressure regulator provides voltage adjustable third DC power supply, and the voltage range of third DC power supply is from predetermined minimum electricity
For pressure value to predetermined maximum voltage value, the predetermined maximum voltage value of the third DC power supply is equal to the voltage of the power adapter
Value；
Processing unit is controlled, to when switching to working condition by standby mode, controls the voltage of third DC power supply from pre-
Determine minimum amount of voltage that and rise to predetermined maximum voltage value, when switching to standby mode by working condition, controls third direct current
The voltage in source drops to predetermined minimum amount of voltage that from predetermined maximum voltage value；
The output end of the control processing unit connects the control terminal of the pressure regulator, described in the output end connection of the pressure regulator
The power end of terminate-and-stay-resident unit；
The pressure regulator includes the first DC supply input, the second DC supply input, current source, the first NMOS tube, the
Two NMOS tubes, resistance, A controllable switch, B controllable switch, third NMOS tube and two capacitors；The control processing unit is CPU；
First NMOS tube is connected with the grid of the second NMOS tube, and the source electrode of first NMOS tube is connected with substrate, described
The grid of third NMOS tube is connected with drain electrode, the source electrode and Substrate ground of the third NMOS tube, and the first of the pressure regulator is straight
Stream power input connects the drain electrode of first NMOS tube by the current source, and the first DC power supply of the pressure regulator is defeated
Enter the drain electrode that end is also connected with second NMOS tube, the resistance is connected to the connection of the source electrode, substrate of first NMOS tube
Between the tie point of the grid and drain electrode of point and third NMOS tube, the power end and the resistor coupled in parallel of the A controllable switch, institute
The output end for stating CPU connects the control terminal of the A controllable switch and the control terminal of the B controllable switch, second NMOS tube
The output end that is connected with substrate as the pressure regulator of source electrode, the power end of the B controllable switch is connected to the second direct current
Between source input terminal and the output end of pressure regulator, a capacitance connection between the grid and ground of first NMOS tube,
Another described capacitance connection is between the source electrode and ground of second NMOS tube；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes A controllable switch
Disconnect, then export second control signal make B controllable switch closure make pressure regulator export voltage rise from predetermined minimum amount of voltage that
To predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that A is controllably opened
It closes and closes, then export the 4th control signal and the disconnection of B controllable switch is made to make the voltage of pressure regulator output from predetermined maximum voltage value
Drop to predetermined minimum amount of voltage that.
2. a kind of read control circuit of terminate-and-stay-resident, including power adapter, the terminate-and-stay-resident for exporting a DC power supply
Unit and read/write circuit for carrying out read/write operation to terminate-and-stay-resident unit, the output end of the power adapter connect institute
State the power end of read/write circuit；It is characterized by further comprising:
Pressure regulator provides voltage adjustable third DC power supply, and the voltage range of third DC power supply is from predetermined minimum electricity
For pressure value to predetermined maximum voltage value, the predetermined maximum voltage value of the third DC power supply is equal to the voltage of the power adapter
Value；
Processing unit is controlled, to when switching to working condition by standby mode, controls the voltage of third DC power supply from pre-
Determine minimum amount of voltage that and rise to predetermined maximum voltage value, when switching to standby mode by working condition, controls third direct current
The voltage in source drops to predetermined minimum amount of voltage that from predetermined maximum voltage value；
The output end of the control processing unit connects the control terminal of the pressure regulator, described in the output end connection of the pressure regulator
The power end of terminate-and-stay-resident unit；
The control processing unit, to when switching to working condition by standby mode, the third of control pressure regulator output is straight
Flowing supply voltage from predetermined minimum amount of voltage that divides n grades to gradually rise to predetermined maximum voltage value, by working condition switch to
When machine state, the third power supply voltage of control pressure regulator output divides n grades gradually to drop to predetermined minimum from predetermined maximum voltage value
Voltage value, n >=2, n are integer；
The pressure regulator includes the first DC supply input, the second DC supply input, current source, the first NMOS tube, the
Two NMOS tubes, at least two resistance, the A controllable switch equal with the resistance quantity, B controllable switch, third NMOS tube and two
A capacitor, the control processing unit are CPU；
First NMOS tube is connected with the grid of the second NMOS tube, and the drain electrode of first NMOS tube is connected with its grid, institute
The source electrode for stating the first NMOS tube is connected with substrate, and the grid of the third NMOS tube is connected with drain electrode, the third NMOS tube
First DC supply input of source electrode and Substrate ground, the pressure regulator connects first NMOS tube by the current source
Drain electrode, the drain electrode of first NMOS tube is connected with its grid, and the first DC supply input of the pressure regulator is also connected with
The drain electrode of second NMOS tube, at least two resistance are connected on the tie point of the source electrode of first NMOS tube, substrate
And third NMOS tube grid and drain electrode tie point between, the power end of an each A controllable switch electricity in parallel
Resistance, the output end of the CPU are separately connected the control terminal of the A controllable switch and the control terminal of the B controllable switch, and described the
The source electrode of two NMOS tubes is connected the output end as the pressure regulator with substrate, and the power end of the B controllable switch is connected to
Between two DC supply inputs and the output end of pressure regulator, a capacitance connection first NMOS tube grid and
Between ground, another described capacitance connection is between the source electrode and ground of second NMOS tube；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes multiple A controllable
Switch successively disconnects, then export voltage that second control signal makes B controllable switch closure export pressure regulator gradually from it is predetermined most
Small voltage value rises to predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that multiple A can
Control switch is successively closed, then exports the 4th control signal and B controllable switch is made to disconnect the voltage for exporting pressure regulator gradually from pre-
Determine maximum voltage value and drops to predetermined minimum amount of voltage that.
3. the read control circuit of terminate-and-stay-resident according to claim 2, which is characterized in that at least two resistance
Resistance value is incremental or equal by 2 multiple.
4. a kind of read control circuit of terminate-and-stay-resident, including power adapter, the terminate-and-stay-resident for exporting a DC power supply
Unit and read/write circuit for carrying out read/write operation to terminate-and-stay-resident unit, the output end of the power adapter connect institute
State the power end of read/write circuit；It is characterized by further comprising:
Pressure regulator provides voltage adjustable third DC power supply, and the voltage range of third DC power supply is from predetermined minimum electricity
For pressure value to predetermined maximum voltage value, the predetermined maximum voltage value of the third DC power supply is equal to the voltage of the power adapter
Value；
Processing unit is controlled, to when switching to working condition by standby mode, controls the voltage of third DC power supply from pre-
Determine minimum amount of voltage that and rise to predetermined maximum voltage value, when switching to standby mode by working condition, controls third direct current
The voltage in source drops to predetermined minimum amount of voltage that from predetermined maximum voltage value；
The output end of the control processing unit connects the control terminal of the pressure regulator, described in the output end connection of the pressure regulator
The power end of terminate-and-stay-resident unit；
The control processing unit, to when switching to working condition by standby mode, the third of control pressure regulator output is straight
Flowing supply voltage from predetermined minimum amount of voltage that divides n grades to gradually rise to predetermined maximum voltage value, by working condition switch to
When machine state, the third power supply voltage of control pressure regulator output divides n grades gradually to drop to predetermined minimum from predetermined maximum voltage value
Voltage value, n >=2, n are integer；
The pressure regulator includes the first DC supply input, the second DC supply input, current source, the first NMOS tube, the
Two NMOS tubes, two resistance, A controllable switch, B controllable switch, third NMOS tube and two capacitors, the control processing unit are
CPU；
First DC supply input is connected by the current source with the drain electrode of first NMOS tube, and described first is straight
Stream power input is also connected with the drain electrode of second NMOS tube, and described two resistance are connected in series in first NMOS tube
And second NMOS tube grid between, the source electrode of first NMOS tube is connected with substrate, and connects the third NMOS tube
Drain electrode, the source electrode and Substrate ground of the third NMOS tube connect described in one between the grid and ground of second NMOS tube
Capacitor, the source electrode and substrate of second NMOS tube pass through another capacity earth, the power end of the A controllable switch
It is connected between second DC supply input and the tie point of described two resistance, the output end of the CPU connects institute
The control terminal of A controllable switch is stated, the source electrode and substrate of second NMOS tube are connected to the output end of the pressure regulator, described
The power end of B controllable switch is connected between second DC supply input and the output end of pressure regulator, and the CPU's is defeated
Outlet connects the control terminal of the B controllable switch；
When switching to working condition by standby mode, control processing unit first exports first control signal and makes A controllable switch
Closure, then export second control signal make B controllable switch closure make pressure regulator export voltage rise from predetermined minimum amount of voltage that
To predetermined maximum voltage value；
When switching to standby mode by working condition, control processing unit first exports third control signal so that A is controllably opened
Shutdown is opened, then exports the 4th control signal and the disconnection of B controllable switch is made to make the voltage of pressure regulator output from predetermined maximum voltage value
Drop to predetermined minimum amount of voltage that.
5. the read control circuit of terminate-and-stay-resident described in any one of -4 according to claim 1, which is characterized in that the third
NMOS tube matches with the NMOS in terminate-and-stay-resident unit.
6. the read control circuit of terminate-and-stay-resident described in any one of -4 according to claim 1, which is characterized in that the pressure regulation
First DC supply input of device connects the first DC power supply, described in the second DC supply input connection of the pressure regulator
The output end of power adapter, first DC power supply connect the input terminal of the power adapter.
7. the read control circuit of terminate-and-stay-resident according to claim 1 or 2 or 4, which is characterized in that the power supply conversion
Device is DC-DC power converter.
8. the read control circuit of terminate-and-stay-resident according to claim 1,2 or 3, which is characterized in that the A controllable switch
It is triode or field-effect tube with B controllable switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510334887.2A CN104900267B (en) | 2015-06-16 | 2015-06-16 | The read control circuit of terminate-and-stay-resident |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510334887.2A CN104900267B (en) | 2015-06-16 | 2015-06-16 | The read control circuit of terminate-and-stay-resident |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104900267A CN104900267A (en) | 2015-09-09 |
| CN104900267B true CN104900267B (en) | 2019-01-11 |
Family
ID=54032885
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510334887.2A Active CN104900267B (en) | 2015-06-16 | 2015-06-16 | The read control circuit of terminate-and-stay-resident |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104900267B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456404A (en) * | 2010-10-21 | 2012-05-16 | 群联电子股份有限公司 | NVM (nonvolatile memory) storage device, memory controller and data storage method |
| CN103809994A (en) * | 2012-11-13 | 2014-05-21 | 建兴电子科技股份有限公司 | Solid-state storage device and sleep control circuit thereof |
| CN204808886U (en) * | 2015-06-16 | 2015-11-25 | 无锡中星微电子有限公司 | Resident memory read control circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4549711B2 (en) * | 2004-03-29 | 2010-09-22 | ルネサスエレクトロニクス株式会社 | Semiconductor circuit device |
-
2015
- 2015-06-16 CN CN201510334887.2A patent/CN104900267B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456404A (en) * | 2010-10-21 | 2012-05-16 | 群联电子股份有限公司 | NVM (nonvolatile memory) storage device, memory controller and data storage method |
| CN103809994A (en) * | 2012-11-13 | 2014-05-21 | 建兴电子科技股份有限公司 | Solid-state storage device and sleep control circuit thereof |
| CN204808886U (en) * | 2015-06-16 | 2015-11-25 | 无锡中星微电子有限公司 | Resident memory read control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104900267A (en) | 2015-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102111070B (en) | The regulator over-voltage protection circuit that standby current reduces | |
| US8710903B2 (en) | Drive and startup for a switched capacitor divider | |
| TWI493834B (en) | A power supply system and its power supply unit and method | |
| CN105515370B (en) | Charge pump circuit and memory | |
| JP5832440B2 (en) | Power shutdown charge controller | |
| US20160094121A1 (en) | Power supply topologies with capacitance management | |
| CN105281298A (en) | Overcurrent protection device and overcurrent protection method for electronic modules | |
| CN104348359B (en) | DC (Direct Current)-DC adjuster | |
| CN105356742B (en) | A kind of high efficiency charge pump | |
| CN105099184B (en) | A kind of underload switch power supply chip | |
| CN103683889B (en) | It is applied to the soft starting circuit of DC-to-dc converter | |
| CN103529890B (en) | A kind of soft starting device and method | |
| CN109742839A (en) | A kind of charging control circuit and system of bootstrap capacitor | |
| CN109643904A (en) | Method for reusing pulse discharging energy during lithium ion quick charge for better power flow efficiency | |
| WO2018224010A9 (en) | Power supply conversion circuit, charging device, and system | |
| CN107508466B (en) | Boost-voltage regulator with efficient soft starting circuit | |
| CN107924218A (en) | Method and apparatus for multicomputer system | |
| CN108320762B (en) | Charge pump drive circuit | |
| CN204808886U (en) | Resident memory read control circuit | |
| CN104900267B (en) | The read control circuit of terminate-and-stay-resident | |
| CN106911251A (en) | Boost power converter | |
| WO2017157113A1 (en) | Dc-dc regulator and soft-start control method therefor, and controller | |
| CN204668924U (en) | Switching Power Supply and control circuit thereof and open-circuit-protection arrange circuit | |
| CN208001227U (en) | A kind of Switching Power Supply driving power supply circuit and Switching Power Supply | |
| CN107302306B (en) | A kind of Switching Power Supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: A 530 Taihu international science and Technology Park building 214135 Qingyuan Road in Jiangsu province Wuxi City District 10 layer Applicant after: WUXI ZHONGGAN MICROELECTRONIC CO., LTD. Address before: A 530 Taihu international science and Technology Park building 214135 Qingyuan Road in Jiangsu province Wuxi City District 10 layer Applicant before: Wuxi Vimicro Co., Ltd. |
|
| COR | Change of bibliographic data | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |