CN104883157B - A kind of variable subband digital filter - Google Patents
A kind of variable subband digital filter Download PDFInfo
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Abstract
A kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition, its structure can be realized by Direct-type FIR Filter or transposition type FIR filter.Variable sub-filter of the invention efficient, can different path filter in any combination, form 2MThe wave filter of kind passband structure, while effectively realizing variable sub-filter, can reduce the occupancy to hardware resource.
Description
Technical field
The present invention relates to digital filter field, particularly a kind of variable subband digital filter.
Background technology
Moving communicating field available band is generally limited resources, it is necessary to apply or buy that corresponding operation could be obtained
Qualification.In same standard, frequency resource is also allocated to multiple different operators.It is no matter Chinese or external, one
Operator often obtains the operation license of multiple discontinuous frequency bands in a standard.Such as GSM 890~893MHz (3MHz
Bandwidth) and 900~901MHz (1MHz bandwidth), two sub-bands.Country variant has the planning of different radio bands, while one
Individual operator can not obtain the power of management of whole frequency range.Especially abroad, the band bandwidth of different operators is different.In addition,
The bandwidth of multiple discontinuous frequency ranges in one standard is not fixed.So in order to adapt to the fortune of modern mobile radio network
Battalion's feature, communication system such as base station, wireless discharging-directly station, mobile terminal and mobile phone need have more subband frequency-selectings, and bandwidth can be real
When the function that sets, to meet field application requirement.Analogue technique can solve multiple networks fusion and more subbands, but can not realize
" bandwidth can be set in real time ".
Using Digital Signal Processing it is flexible, accurate the characteristics of, the skill of " bandwidth is set in real time " can be efficiently solved
Art problem.In Digital Signal Processing, digital analog converter first by continuous analog signal discrete, quantify and be encoded to numeral
Signal.Then, discrete data signal is reduced to analog signal again after the processing of mathematical algorithm by digital-to-analogue conversion.Number
The algorithm of word signal transacting can by computer or digital signal processor (DSP) and application specific integrated circuit (ASIC),
FPGA etc. is programmatically realized.However, the research and development at present to real-time variable sub-filter are very limited, also without specific aim
Complete design and implementation method.
The content of the invention
It is a primary object of the present invention to propose a kind of efficient variable sub-filter, variable sub-band filter is effectively realized
While device, the occupancy to hardware resource can be reduced.
The present invention adopts the following technical scheme that：
A kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition,
Including filter input and filtering output end, it is characterised in that：Its structure includes Direct-type FIR Filter or transposition type FIR is filtered
Ripple device.
Preferably, the structure that Direct-type FIR Filter is realized is as follows, including filter input, filtering output end, M-1
Unit delay elements, M-1 synthesis accumulator, M variable coefficient multiplier and M multiphase filter；The filter input one
Road connects the 0th phase multiphase filter input, and another way postpones to form M-1 levels delay branch successively through M-1 unit delay elements
Road；The M-1 levels delayed branch connects first to M-1 phase multiphase filter inputs respectively；The output end of M multiphase filter
An input of M variable coefficient multiplier is connected respectively to, and another input of M variable coefficient multiplier connects respectively
Meet M variable coefficient Si, the M-1 of wherein i=0,1,2 ...；0th connects to the output end of the M-2 variable coefficient multiplier respectively
An input of first to the M-1 synthesis accumulator is connect, the M-1 variable coefficient multiplier outputs connection M-1 is closed
Into another input of accumulator, M-2 synthesis accumulators are added to the first synthesis accumulator successively, the first synthesis accumulator
Output end is as filtering output end.
Preferably, the structure that transposition type FIR filter is realized is as follows, including M-1 unit delay elements, M-1 synthesis
Accumulator, M variable coefficient multiplier and M multiphase filters；The filter input is divided into M branch roads, and the M branch roads connect respectively
0 to the M-1 multiphase filter input；The output end of M multiphase filter is connected respectively to M variable coefficient multiplier
One input, and another input of M variable coefficient multiplier is M variable coefficient Si, the M-1 of wherein i=0,1,2 ...；
0th to the M-2 variable coefficient multiplier outputs connect the first to M-1 synthesis accumulator input, the M-1 respectively
Individual variable coefficient multiplier outputs close through M-1 delay cells connection M-1 synthesis another inputs of accumulator, the M-2
Output end into accumulator to the first synthesis accumulator is connected to upper level through M-2 delay cells to the first delay cell respectively
Accumulator input is synthesized, the first synthesis accumulator output end is as filtering output end.
Preferably, the M multiphase filter is Direct-type FIR Filter.
Preferably, the multiphase filter includes sub- filter input, sub- filtering output end, N number of constant coefficient multiplier, N-
1 M delay cell and N-1 adder；The sub- filter input connects first constant coefficient multiplier input all the way, another
Road postpones to form N-1 level delayed branch successively through N-1 M delay cells；The N-1 levels delayed branch connects second to respectively
N number of constant coefficient multiplier input, first to n-th constant coefficient multiplier another input connect filter coefficient respectively
h0To hN-1, this first to the N-1 constant coefficient multiplier output end connect respectively first to N-1 conjunction adder input,
Another input of the output end connection N-1 adders of the n-th constant coefficient multiplier, N-1 adders are added to successively
First adder, the output end of the first adder is as sub- filtering output end.
Preferably, the multiphase filter is transposition type FIR filter.
Preferably, the multiphase filter includes sub- filter input, sub- filtering output end, N number of constant coefficient multiplier, N-
1 M delay cell and N-1 adder；The sub- filter input is divided into N branch roads, and the N branch roads connect first to n-th respectively
One input of constant coefficient multiplier, another input of N number of constant coefficient multiplier connect filter coefficient h respectively0
To hN-1, first to the N-1 constant coefficient multiplier output end connect first to N-1 adder inputs, the N respectively
Individual constant coefficient multiplier output end is connected to another input of N-1 adders through the N-1 M delay cell, the N-2 additions
The output end of device to first adder is connected to the input of upper level adder through N-2 delay cells to the first delay cell respectively
End, the first adder output end is as sub- filtering output end.
Preferably, described synthesis accumulator is to use Carry save array and pipeline organization to prolong to reduce the computing of adder
Late.
Preferably, described unit delay elements, synthesis accumulator, multiphase filter and variable coefficient multiplier are to adopt
The complex operation unit that same phase and orthogonal signalling are synchronously filtered with two passages.
From the above-mentioned description of this invention, compared with prior art, the present invention has the advantages that：
First, the variable sub-filter that structure of the present invention is realized can different path filter in any combination, form 2M
The wave filter of kind passband structure.
2nd, the variable sub-filter that structure of the present invention is realized can not only realize all-pass function, and the ripple in passband
Line characteristic is consistent with lowpass prototype filter, and signal will not produce amplitude distortion after device after filtering
3rd, the present invention realizes variable more sub-band filters using poly phase structure, can effectively reduce required hardware resource.
4th, structure of the present invention and general variable number wave filter realize that technology is compared, it is possible to reduce required change parameter
Number, i.e., the parameter changed needed for general variable filter for digital filter coefficient number (generally more than 30), and
It is that sub-band number is far less than filter coefficient number to change number of parameters needed for the variable sub-filter of the present invention.
5th, the variable sub-filter that structure of the present invention is realized uses FIR filter, has linear phase characteristic,
Group delay i.e. to inband signaling is constant.
Brief description of the drawings
Fig. 1 is the general principle block diagram of existing variable subband digital filter；
Fig. 2 is the Direct-type structure (embodiment one) of the variable subband digital filter of the present invention；
Fig. 3 is the transposition structure (embodiment two) of variable subband digital filter
Fig. 4 is the structure of Direct-type FIR multiphase filters；
Fig. 5 is the structure of transposition type FIR multiphase filters；
Fig. 6 is the shock response waveform (N=79) of the 4th band filter；
Fig. 7 is amplitude-frequency and the phase-frequency response (N=79) of the 4th band filter；
When only gating the 1st subband, i.e., Fig. 8 isWhen, the amplitude-frequency response of variable sub-filter；
When gating the 2nd and the 3rd subband, i.e., Fig. 9 isWhen, the amplitude-frequency of variable sub-filter rings
Should.
Embodiment
Below by way of embodiment, the invention will be further described.
Embodiment one
A kind of variable subband digital filter, the uniform subband realized based on discrete Fourier transform (DFT) wave filter group
Wave filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition.
Reference picture 2, its Direct-type FIR Filter realize structure include filter input x [n], filtering output end y [n],
M-1 unit delay elements z-1, M-1 synthesis accumulator 400, M variable coefficient multiplier 300 and M multiphase filter E0
(zM)…EM-1(zM).Filter input x [n] connects the 0th phase multiphase filter input E all the way0(zM), another way is through M-1
Individual unit delay elements postpone to form M-1 level delayed branch successively；The M-1 levels delayed branch connects first to M-1 phases respectively
Multiphase filter E1(zM)…EM-1(zM) input；M multiphase filter E0(zM)…EM-1(zM) output end connect respectively
To an input of M variable coefficient multiplier 300, and M 300 another input of variable coefficient multiplier connects M respectively
Individual variable coefficient SiThe M-1 of wherein i=0,1,2 ....0th connects to the output end of the M-2 variable coefficient multiplier 300 respectively
First to the M-1 synthesis accumulator 400 input, the M-1 output end of variable coefficient multiplier 300 connection M-1
400 another input of accumulator is synthesized, M-1 synthesis accumulators are added to the first synthesis accumulator successively, and first synthesis is tired
Add the output end of device as filtering output end y [n].
Unit delay elements z-1, synthesis accumulator 400, multiphase filter E0(zM)…EM-1(zM) and variable coefficient multiplier
Variable coefficient SiIt is complex operation unit, i.e., using two passages to synchronously being performed with orthogonal signalling with phase.The unit delay
Unit z-1Realized by multi-bit register, its bit wide is equal to input signal bit wide.Synthesis accumulator 400 is multi input adder, is adopted
With carry save adder by multiple input boil down to carries (Carry) with and be worth (Sum) two bit vectors, and only close to defeated
First synthesis accumulator for going out end is added to obtain output result.The variable system of the M other end of variable coefficient multiplier 300 input
Number Si, M-1 >=i >=0, equal to each subband index of modulation Wik MSum, wherein i by connection multiphase filter sequence number, M-1
>=i >=0, M are sub-band sum, and k is sub-band serial number, and sub-filter contains several passbands, and (passband is frequency of the amplitude without decay
Rate scope), SiJust contain several Wik M, i.e.,：
Multiphase filter E in the embodimenti(zM) it is Direct-type FIR Filter, i=0,1 ... M-1.Reference picture 4, it is wrapped
Enclosed tool filter input, sub- filtering output end, N number of constant coefficient multiplier 220, N-1 M delay cells z-MWith N-1 adder
230.The sub- filter input connects first constant coefficient multiplier input all the way, and another way is through N-1 M delay cells z-MAccording to
Secondary delay forms N-1 level delayed branch.The N-1 levels delayed branch connects second to the one of n-th constant coefficient multiplier respectively
Input, first to n-th constant coefficient multiplier another input connect filter coefficient h respectively0To hN-1, the 0th to
The output end of the N-2 constant coefficient multiplier connects the first to N-1 conjunction adder input, the N-1 constant coefficient respectively
Another input of the output end connection N-1 adders of multiplier, N-1 adders are added to first adder successively, should
The output end of first adder is as sub- filtering output end.
It is described below how obtain the coefficient of each phase filter of variable sub-filter of poly phase structure.
The variable sub-filter prototype lowpass filter of the present invention is M band (or referred to as Nyquist) wave filters.The original
Type low pass filter is an only basic passband, i.e. SiComprise only a wave filter during k=0 subband.Therefore, variable subband
The ptototype filter coefficient of wave filter can be designed to obtain by M band (or referred to as Nyquist) wave filters.M bands (or be referred to as
Nyquist) wave filter can design to obtain by window technique and optimization method.Illustrate design process used here as window technique.
First, according to variable sub-filter stopband (passband) ripple (such as 60dB) and passband angular frequency and stopband angular frequency
Intermediate zone width (scope is 0 to 2 π/M), selection window shape.Because triumphant plucked instrument window can obtain any ripple by changing parameter
Line index, so used here as triumphant plucked instrument window.
Secondly, by being sampled to shock response waveform of the passband width for 2 π/Μ low pass filter, sampling frequency
For M.Obtaining its impulse Response Function by passband angular frequency for the inverse Fourier transform of [- π/Μ, π/Μ] ideal filter is：
Then, M band filters are taken on the N=2MJ- centered on time series n=0 by above shock response sequence
After 1 point (N is FIR filter length), be i.e. MJ-1 >=n >=-MJ+1, move to left (delay) (N-1)/2=MJ-1 and be converted to cause and effect FIR
After wave filter, 2MJ-2 >=n >=0, each coefficient is multiplied by with triumphant plucked instrument window sequence WkBeing obtained after [n], wherein subscript k represents triumphant plucked instrument window,
I.e.：
Wherein
I0For modified Bessel function, the power series on m can be expressed as, m, which takes 25, herein can meet precision
It is required that；α, β are the parameter of control performance of filter, and β is released by α, can change the characteristic of window function by α.α increases, filtering
Device amplitude spectrum main lobe is broadening, and sidelobe magnitudes reduce.For example, α=2.12 when, filter amplitudes spectrum main lobe transition band width is 3 π/N,
Passband ripple 0.27dB, minimum attenuation in stop band 30dB；During α=7.865, transition band width is 10 π/N, passband ripple 2.75e-4dB,
Minimum attenuation in stop band 80dB.Accompanying drawing 6 and 7 gives the shock response waveform and amplitude versus frequency characte and phase-frequency characteristic of the 4th band filter
Spectrogram (a=7.9, J=10).
Length is changed into 2MJ after will finally one 0 being mended before the M band filter coefficients obtained, and can be divided into M groups (or M
Phase) Polyphase filter Ei(z)(ei[n]) coefficient, i.e.,：Or
ei[n] represents EiN coefficient, i is the i-th phase.Coefficient of the band filter of the above the 4th after 4 phase decompositions is as shown in the table.
| E0 | E1 | E2 | E3 |
| 0.00 | -1.53E-05 | -4.58E-05 | -4.58E-05 |
| 0.00 | 1.22E-04 | 2.44E-04 | 2.44E-04 |
| 0.00 | -4.27E-04 | -7.78E-04 | -7.02E-04 |
| 0.00 | 1.10E-03 | 1.91E-03 | 1.65E-03 |
| 0.00 | -2.40E-03 | -4.03E-03 | -3.39E-03 |
| 0.00 | 4.67E-03 | 7.72E-03 | 6.35E-03 |
| 0.00 | -8.51E-03 | -1.39E-02 | -1.14E-02 |
| 0.00 | 1.52E-02 | 2.49E-02 | 2.05E-02 |
| 0.00 | -2.85E-02 | -4.86E-02 | -4.24E-02 |
| 0.00 | 7.34E-02 | 1.58E-01 | 2.25E-01 |
| 0.25 | 2.25E-01 | 1.58E-01 | 7.34E-02 |
| 0.00 | -4.24E-02 | -4.86E-02 | -2.85E-02 |
| 0.00 | 2.05E-02 | 2.49E-02 | 1.52E-02 |
| 0.00 | -1.14E-02 | -1.39E-02 | -8.51E-03 |
| 0.00 | 6.35E-03 | 7.72E-03 | 4.67E-03 |
| 0.00 | -3.39E-03 | -4.03E-03 | -2.40E-03 |
| 0.00 | 1.65E-03 | 1.91E-03 | 1.10E-03 |
| 0.00 | -7.02E-04 | -7.78E-04 | -4.27E-04 |
| 0.00 | 2.44E-04 | 2.44E-04 | 1.22E-04 |
| 0.00 | -4.58E-05 | -4.58E-05 | -1.53E-05 |
The variable sub-filter containing 4 subbands is devised above, and the gating of subband can be by changing SiRealize.Example
Such as, when only gating the 1st subband, i.e., accompanying drawing 8 presentsWhen, the amplitude-frequency response of variable sub-filter；Accompanying drawing 9
Present when gating the 2nd and the 3rd subband, i.e.,When, the amplitude-frequency response of variable sub-filter.
Implement two
A kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition.
It is as follows with the difference of embodiment one：
Reference picture 3, the structure that its transposition type FIR filter is realized includes M-1 unit delay elements, M-1 synthesis is tired out
Add device 400, M variable coefficient multiplier 300 and M multiphase filter R0(zM)…RM-1(zM)；The filter input is divided into M branch
Road, the M branch roads connect the 0th to m-th multiphase filter input R respectively0(zM)…RM-1(zM)；M multiphase filter R0
(zM)…RM-1(zM) output end be connected respectively to an input of M variable coefficient multiplier 300, and M variable coefficient
Another input of multiplier 300 connects M variable coefficient S respectivelyi, the M-1 of wherein i=0,1,2 ....0th to M-2 can
The output end of variable coefficient multiplier 300 connects an input of the first to M-1 synthesis accumulator 400 respectively, and the M-1 variable
Coefficient multiplier output end is cumulative through M-1 delay cells connection M-1 synthesis another inputs of accumulator, M-2 synthesis
It is tired that the output end of device to the first synthesis accumulator is connected to upper level synthesis through M-2 delay cells to the first delay cell respectively
Add device input, the first synthesis accumulator output end is as filtering output end.
Unit delay elements z in the embodiment-1, synthesis accumulator 400, multiphase filter R0(zM)…RM-1(zM) and can
Variable coefficient multiplier SiIt is complex operation unit, i.e., using two passages to synchronously being performed with orthogonal signalling with phase.Transposition type list
Position delay cell register-bit in multiphase filter output end, therefore bit wide by multiphase filter output result the maximum amplitude of oscillation and
The precision set blocked.Synthesis accumulator is multi input adder, is entered multiple input boil down tos using carry save adder
Position (Carry) with and be worth (Sum) two bit vectors, and be only added and exported in first synthesis accumulator close to output end
As a result.The variable coefficient S of M variable coefficient multiplier other end inputi, M-1 >=i >=0, equal to each subband index of modulation
Wik MSum, wherein i by connection multiphase filter sequence number, M-1 >=i >=0, M are sub-band sum, and k is sub-band serial number, subband
Wave filter contains several passbands (passband is frequency range of the amplitude without decay), SiJust contain several Wik M, i.e.,：
Multiphase filter Ri(zM) it is transposition type FIR filter, the M-1 of wherein i=0,1,2 ....Reference picture 5, it includes son and filtered
Ripple input, sub- filtering output end, N number of constant coefficient multiplier 220, N-1 M delay cells z-MWith N-1 adder 230.Should
Sub- filter input is divided into N branch roads, and the N branch roads connect the first order to an input of n-th constant coefficient multiplier respectively, should
Another input of N number of constant coefficient multiplier connects filter coefficient h respectively0To hN-1, first to the N-1 constant coefficient
Multiplier outputs connect first to N-1 adder inputs respectively, and the n-th constant coefficient multiplier output end is through N-1
Individual M delay cells are connected to another input of N-1 adders, the output end difference of the N-2 adders to first adder
Upper level adder input is connected to through N-2 delay cells to the first delay cell, the first adder output end conduct
Sub- filtering output end.
The embodiment of the present invention is above are only, but the design concept of the present invention is not limited thereto, it is all to utilize this
Conceive the change that unsubstantiality is carried out to the present invention, the behavior for invading the scope of the present invention all should be belonged to.
Claims (6)
1. a kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition, wrap
Include filter input and filtering output end, it is characterised in that：Its structure includes Direct-type FIR Filter, Direct-type FIR Filter
The structure of realization is as follows, including filter input, filtering output end, M-1 unit delay elements, M-1 synthesis accumulator, M
Individual variable coefficient multiplier and M multiphase filter；The filter input connects the 0th phase multiphase filter input all the way, separately
Postpone to form M-1 level delayed branch successively through M-1 unit delay elements all the way；The M-1 levels delayed branch connect respectively first to
M-1 phase multiphase filter inputs；The output end of M multiphase filter is connected respectively to one of M variable coefficient multiplier
Input, and another input of M variable coefficient multiplier connects M variable coefficient S respectivelyi,
Wherein i by connection multiphase filter sequence number, the M-1 of i=0,1,2 ...,For each gating subband index of modulation sum, k
To gate the sequence number of subband, 0≤k≤M-1；0th connects first to the output ends of M-2 variable coefficient multipliers respectively
M-1 synthesizes an input of accumulator, and M-1 variable coefficients multiplier outputs connection M-1 synthesis accumulators are another defeated
Enter end, M-1 synthesis accumulators are added to the first synthesis accumulator successively, and the output end of the first synthesis accumulator is as filtering
Output end.
A kind of 2. variable subband digital filter as claimed in claim 1, it is characterised in that：The multiphase filter includes son
Filter input, sub- filtering output end, N number of constant coefficient multiplier, N-1 M delay cells and N-1 adder；The sub- filtering
Input connects first constant coefficient multiplier input all the way, and another way postpones to form N-1 successively through N-1 M delay cells
Level delayed branch；The N-1 levels delayed branch connects second to n-th constant coefficient multiplier input respectively, and first to n-th
Another input of constant coefficient multiplier connects filter coefficient h respectively0To hN-1, first to the N-1 multiplication of constant coefficient
The output end of device connects first to the N-1 adder input respectively, the output end connection of the n-th constant coefficient multiplier the
Another input of N-1 adders, N-1 adders are added to first adder successively, and the output end of the first adder is made
For sub- filtering output end.
3. a kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition, wrap
Include filter input and filtering output end, it is characterised in that：Its structure includes transposition type FIR filter, and the structure that it is realized is such as
Under, including M-1 unit delay elements, M-1 synthesis accumulator, M variable coefficient multiplier and M multiphase filter；Should
Filter input is divided into M branch roads, and the M branch roads connect the 0th to the M-1 multiphase filter input respectively；M multiphase filter
Output end be connected respectively to an input of M variable coefficient multiplier, and another input of M variable coefficient multiplier
Hold as M variable coefficient Si,Wherein i by connection multiphase filter sequence number, i=0,1,2 ...
M-1,For it is each gating subband index of modulation sum, k be gating subband sequence number, 0≤k≤M-1；0th to M-2
Variable coefficient multiplier outputs connect the first to M-1 synthesis accumulator input, the M-1 variable coefficient multipliers respectively
Output end synthesizes accumulator to the first conjunction through M-1 delay cells connection M-1 synthesis another inputs of accumulator, the M-1
Output end into accumulator is connected to upper level synthesis accumulator input through M-2 delay cells to the first delay cell respectively
End, the first synthesis accumulator output end is as filtering output end.
A kind of 4. variable subband digital filter as claimed in claim 3, it is characterised in that：The multiphase filter includes son
Filter input, sub- filtering output end, N number of constant coefficient multiplier, N-1 M delay cells and N-1 adder；The sub- filtering
Input is divided into N branch roads, the N branch roads connect respectively first to n-th constant coefficient multiplier an input, this it is N number of often system
Another input of number multiplier connects filter coefficient h respectively0To hN-1, first to the N-1 constant coefficient multiplier be defeated
Going out end, connection first is single through the N-1 M delay to N-1 adder inputs, the n-th constant coefficient multiplier output end respectively
Member is connected to another input of N-1 adders, and the output end of the N-1 adders to first adder is prolonged through N-2 respectively
Slow unit to the first delay cell is connected to upper level adder input, and the first adder output end exports as son filtering
End.
A kind of 5. variable subband digital filter as claimed in claim 3, it is characterised in that：Described synthesis accumulator is to adopt
With Carry save array and pipeline organization to reduce the operating delay of adder.
A kind of 6. variable subband digital filter as described in claim 1 or 3, it is characterised in that：Described unit delay list
Member, synthesis accumulator, multiphase filter and variable coefficient multiplier are to phase and the same stepping of orthogonal signalling using two passages
The complex operation unit of row filtering.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101227537A (en) * | 2007-01-19 | 2008-07-23 | 中兴通讯股份有限公司 | Broadband acoustics echo eliminating method |
| CN101398480A (en) * | 2008-11-06 | 2009-04-01 | 哈尔滨工程大学 | Flexible sub-band reconstructed broad-band channel device |
Family Cites Families (1)
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|---|---|---|---|---|
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101227537A (en) * | 2007-01-19 | 2008-07-23 | 中兴通讯股份有限公司 | Broadband acoustics echo eliminating method |
| CN101398480A (en) * | 2008-11-06 | 2009-04-01 | 哈尔滨工程大学 | Flexible sub-band reconstructed broad-band channel device |
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