CN104867475B - A kind of display bridge for supporting more display interfaces - Google Patents
A kind of display bridge for supporting more display interfaces Download PDFInfo
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- CN104867475B CN104867475B CN201510236637.5A CN201510236637A CN104867475B CN 104867475 B CN104867475 B CN 104867475B CN 201510236637 A CN201510236637 A CN 201510236637A CN 104867475 B CN104867475 B CN 104867475B
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Abstract
The present invention provides a kind of method and apparatus for the display bridge for supporting more display interfaces, and the display bridge of the novelty includes the pre-driver of an offer data input signal；The shared output driver of data input signal is received, the display that output driver is compatible with driving MIPI DSI, EDP, or LVDS provides output display signal；Voltage-stablizer power supply, coupled to shared output driver, adjust the operating voltage of shared output driver and provide current source for the shared output driver.One shared terminal output unit, coupled to shared output driver, provides terminal resistance for output display signal and provides terminal voltage for the terminal resistance.
Description
Quote
Following claims are melted into the application documents that a topic is temporarily " a kind of display bridge for supporting more display interfaces ",
This application was submitted on October 4th, 2013, and Application No. 61887232, the application is hereby incorporated herein by.
Technical field
Present invention design is a kind of to show bridge, more particularly to a kind of display bridge for supporting multi output display format.
Background technology
The popularization used with flat-panel monitor, a collection of competitive electronic digital signal standard occupy numerical monitor
The leading position of industry.Low-voltage differential signal, or LVDS, be it is a kind of with very high speed on cheap twisted-pair feeder copper cable
The electronic digital signal standard of operation.LVDS is very popular and for as liquid crystal display, automotive meter display, industrial phase
Machine, machine vision product, laptop computer displays and computer the product such as flat-panel monitor in.
Embedded display port (EDP) is another display standard, and the display standard is to include a standard of definition
Display panel interface, the interface can be used for as inside between video card and laptop computer displays panel is (embedded) even
Connect.Compared to LVDS, highest data rate is number between LVDS interface between image procossing IC and a timing controller IC
According to speed, about 1.05Gbit/s, each pair.On the other hand, electronic data processing (EDP) is in speed and data throughout side
Face realizes 2.7Gbit/s data speed or the growth close to three times.
Another digital displaying signal standard is the display serial line interface put into effect by mobile Industry Processor Interface (MIPI)
(DSI) the display serial line interface, is put into effect for the purpose of reducing the cost of mobile device display subsystem.The DSI defines main frame
A universal serial bus and communication protocol between (image data source) and equipment (view data terminal).DSI specifies high-speed-differential
Signaling is point-to-point to universal serial bus.
Because all three digital signal standards are to be directed to liquid crystal display, and with holding using liquid crystal display
Become more and more popular in equipment, it is necessary to possess one can with it is any in the prevailing signal display standard of above three
One single data signal being used together shows bridge device.
The content of the invention
The invention discloses the display bridge method and device for supporting more display interfaces.The new display bridge includes an offer
The pre-driver of data input signal, a shared output driver are arranged to receive data input signal and carry to be compatible with driving
The output display signal of MIPI-DSI, EDP, or LVDS display.One voltage-stablizer power supply is coupled to the shared output driving
Device, to adjust the operating voltage of the shared output driver and provide current source for the shared output driver.One coupling
Shared termination output to the shared output driver is configured to provide terminating resistor for output display signal and is the end
Resistance is held to provide final voltage.
On the other hand, the shared output driver receives data input signal, and provides compatible for driving MIDI-
The output display signal that DSI is shown, and including pre-driver, it is defeated to sharing that the pre-driver is configured to supply differential signal
Go out driver.Voltage-stablizer power supply provides about 400 millivolts of operating voltage for shared output driver.Shared terminal is configured as
In high impedance status.Output driver is configured to receive the differential signal and defeated based on the differential signal driven
Go out to show signal.
At the same time, the shared output driver receives data input signal, and provides compatible for driving EDP to show
Display signal output and including pre-driver, the pre-driver is configured to receive data in differential signal and increased in advance
Data in strong signal and to drive EDP displays to provide positive output signal and negative input signal.Voltage-stablizer power supply is difference
Data in signal provide the first current source, and provide the second current source for the data in pre- enhancing differential signal.This is shared eventually
End output unit is that positive output signal and negative output signal are provided with a final voltage and a terminating resistor.
Brief description of the drawings
Below in conjunction with brief description of the drawings embodiments of the present invention so that the present invention object defined above and other purposes,
Aspect, it will may be better understood from preferably described in detail below, wherein：
Fig. 1 shows the block diagram for the display bridge that multi output display format is supported in one embodiment of invention；
Fig. 2 shows the frame diagram for the display bridge that MIPI-DSI patterns are supported in one embodiment of the invention；
Fig. 3 shows to support the frame of the display bridge of embedded display port (EDP) I/O equipment modes in one embodiment of the invention
Frame figure；
Fig. 4 shows to support embedded display interface (EDP) pattern with core transistor pattern in another embodiment
Display bridge；
Fig. 5 shows the frame diagram for the display bridge that LVDS is supported in one embodiment of the invention.
Embodiment
The invention provides a kind of display bridge for supporting more display interfaces.The display bridge supports three universal standards, including
Embedded display port (EDP), the display serial line interface (DSI) that mobile Industry Processor Interface (MIPI) is put into effect, and low-voltage
Differential signal (LVDS).The more display interfaces of the support show that the advantage of bridge includes：Chip is smaller, reduces bank contact, for
The speed for the single bridge that more display interfaces are supported and flexibility.Each display interface has specific physical layer equipment (PHY), with
Support specific display standard.This in particular cases, it is necessary to 3 kinds of physical layer equipments are to support LVDS, MIDI-DSI and
EDP.Correspondingly, display bridge of the invention at least supports three kinds of different physical layer equipments (PHY).For example, LVDS typically has
Have just, the negative output amplitude of oscillation is +/- 300mv 1.25v common-mode voltage.On the other hand, MIPI-DSI have output voltage swing for+/
One 200mv about 200mv common-mode voltage.The reduction of common-mode voltage substantially reduces electromagnetic interference (EMI).And in EDP,
Common membrane voltage is not used, and voltage swing can be from 500mv to 1.0v.
Fig. 1 shows the block diagram for the display bridge that multi output display format is supported in one embodiment of invention.Pre-driver
12 offer data-signals are inputted to shared output driver 18.Pre-driver 12 includes a level shifter with based on specific
Output display form moves to data input signal as needed.Equally, voltage-stablizer power supply 14 is shared output driver
18 provide voltage adjustment and current source.Shared output driver 18 is that positive output signal Pout17 and negative output signal Nout19 is carried
Supply out to drive display device according to a specific display format PHY.By specific output display form, as needed,
One shared terminal output 16 provides Signal Terminal for differential output signal.It should be understood readily by those skilled in this art, the present invention has
Various ways and method, and Fig. 1 is a representative but non-limiting ways and means.
Fig. 2 shows to support the frame diagram of the display bridge of MIPI-DSI patterns.Grid and crystalline substance of the pre-driver 12 in transistor 1
The one high positive signal of differential pair voltage (VHP) and the low positive signal of voltage (VLP) are provided respectively on the grid of body pipe 2.Pre-driver 12
Also provide a pair of high negative signals of differential pair voltage (VHN) respectively on the grid of transistor 3 and the grid of transistor 4 and voltage is low
Negative signal (VLN).In an embodiment of the present invention, the VHP signals on the grid of transistor 1 are set as greatly by pre-driver 12
VLP signals on grids of the 200mv higher than transistor 2, unlike, the Vgs of transistor 1 is approximately equal to the Vgs of transistor 2
Add 200mv.Similarly, because VHN signals and VLN signals are the negative compositions of difference VHP signals and difference VLP signals, predrive
Device 12 also provides the high negative signal of differential pair voltage (VHN) respectively on the grid of transistor 3 and the grid of transistor 4 and voltage is low
Negative signal (VLN).The node A that voltage-stablizer power supply 14 provides output about 400mv voltage thinks that driver 18 carries
For working voltage.Because differential signal VHP, VHN and VLP that pre-driver 12 provides, and VLN are shared at least into composition
It is at least one in the transistor 1 of output driver 18, transistor 2, transistor 3 and transistor 4, positive output signal Pout17 and
Negative output signal Nout19 drives the monitor resistance 24 as external detection, such as LCD.Because MIPI-DSI patterns provide
One differential signal, the output of pre-driver 12, which is alternatively switched on transistor 1 and transistor 3, makes it form a transistor pair, simultaneously
Connecting transistor 2 and transistor 4 makes it form a transistor pair.In addition, when transistor 1 and the transistor pair of the composition of transistor 3
During conducting, the transistor that transistor 2 and transistor 4 form is to disconnecting, it is generally the case that display monitor includes monitor electricity
Resistance 24, the monitoring resistance is about arranged to 100ohms.Therefore, pre-driver 12 is alternately turned on 3 groups of transistor 1 and transistor
Into the transistor pair that forms of transistor pair and transistor 2 and transistor 4, and pass through DSI and switch 26 and DSI switches 28 and complete
The ground connection of the signal path.In an embodiment of the present invention, it is core that DSI, which switchs 26 and DSI switches 28 relative to I/O transistors,
Heart transistor.The impedance of core apparatus when it is switched on of the advantages of core transistor is relatively low.In embodiments of the invention
In, DSI switchs each have by oneself of 26 and DSI switches 28 and is less than 3 ohm of conduction impedances.In DSI patterns, T1 transistor isolations 21 and T2 are brilliant
Body pipe isolation 22 is ended.When T1 transistor isolations 21 and T2 transistor isolations 22 are ended, pass through isolation 21 without current sink
With isolation 22.Therefore, electronic data processing (EDP) pattern enabled 29 is to close.And EDP patterns enabled 29 are an electric currents
Source, when display bridge is in EDP patterns, it is activated.
In order to provide MIPI-DSI compatibility and reduce differential signal Pout17 and Nout 19 signal reflex, electrode
17 and electrode 19 by characteristic be that 50 ohmages are realized.In order to realize impedance operator, transistor 1 and transistor 2 are turned on
The resistance of voltage is set as about 50 ohm.Because when (Ron) resistance is approximately equal to L/UnCoxW (Vgs-Vt) or RON=
L/UnCoxW (Vgs-Vt), wherein Un are electron mobilities, and Cox is oxide capacitance, and L is length, and W is width, and Vt is threshold value electricity
Pressure.
Based on sieve grace equation, set L, W and the Vt of all transistors of substantially equal, while Vgs's is substantially phase
Same value, Ron will change in the range of 50 ohm.This shows, the Vt ignored bulk effect, the grid of transistor 1 and transistor 3
About 200mv is more than the grid voltage of transistor 2 and transistor 4 by pole tension, to be approximately equal to Vgs.Pre-driver 12 is to electricity
It is pressed into line level displacement and thinks that transistor 1 obtains a conducting Vgs and with the Ron of 50 ohm of an approximation.Equally, predrive
Device 12 carries out level shift to voltage and thinks that transistor 2 obtains a conducting Vgs and with the Ron of 50 ohm of an approximation.By
In when the isolation 22 that transistor T1 isolates 21 and transistor T2 disconnects, DSI switches 26 and 28 have one can lead under DSI patterns
The conducting voltage of logical 5 Ohmic resistances, compared with 50 ohm of transistor 2 of Ron, DSI switchs 5 ohm of 26 and 28 big susceptible
It can be neglected under condition.
Therefore the equivalent circuit of the display bridge of MIPI-DSI patterns is supported to be modeled as 400mv 50 ohm of power sources in series
100 Ohmic resistances of resistance (transistor 1) series connection (typical case shows monitor resistance) 50 ohm of series connection (transistors 2) series connection, one 5 Europe
Nurse (DSI interchangers 26,28).Based on the equivalent circuit, the output bag of the display monitor resistance 24 in MIDI-DSI patterns
The common-mode voltage of 200mv containing one about+/ 200mv burdens.Further, since about 50 Europe are set in transistor 1 and transistor 2
The characteristic impedance of nurse, the shared termination output 16 in MIDI-DSI patterns are not used and are arranged to high impedance.It is shared to terminate
Output 16 is not shown in fig. 2, in order to avoid too obscure explanation is carried out to DSI patterns.It should be noted that because EDP patterns
Enabled 29 are used as a current sinks, and enabled 29 in EDP patterns in Fig. 2 are described as the Imain32 in Fig. 3.In EDP patterns
In, enabled 29 and Image32 disconnects.Under EDP patterns, enable 29 and connect, as shown in Figure 3-4.It should be pointed out that MIPI-
DSI patterns may include low-power signal terminal driver, and it connects differential output nodes Pout17 and Nout19 with order to additional
Flexibility.
Fig. 3 shows to be used for the display bridge for supporting embedded display port (EDP) I/O equipment modes in one embodiment of the invention
Frame diagram.Pre-driver 12 provides the transistor 4 for being applied to shared output driving 18 and the difference of transistor 2 shows signal
Din31.Difference shows that signal preemphasis Dprem 32 is applied to the transistor 1 and transistor 3 of shared output driver 18, should
Shared output driver 18 is made up of transistor 1, transistor 2, transistor 3 and transistor 3.The exacerbation signal Dprem 32
From in display signal Din and be that display input signal Din31 postpones clock cycle and reverse.Preemphasized signal
Dprem32 adjustment Din31 signals are simultaneously accompanied by distortion, thus the signal output of eye diagram will in eyes expectation visual field,
It is exactly so-called preemphasis effect.Generally, the radio-frequency component in preemphasis amplified signal, and the low-frequency component in signal is still located
Under its reset condition.Preemphasis is grasped by strengthening high-frequency energy caused by any time in data conversion, to improve noise
Than.
In an embodiment of the present invention, the signal of preemphasis can make it to current flow by reducing electric current IPREM34
20%, 30% or 50% of Imain32 in IPREM34 adjusts.The shared configuration one of termination output 16 has 50 ohm properties
The resistance 36 of impedance.Therefore, positive output Pout 17 is coupled to resistance 36, and negative output Nout 19 is coupled to another
Resistance 36.Shared termination output 16 can be that EDP be arranged to about 1.8v.In EDP I/O equipment modes, DSI switchs 26 Hes
DSI switches 28 are disconnected.T1 isolation T121 and isolation T2 isolation 22 are switched on to ensure that Imain32 has electric current inflow.Remove
Pin Imain 32 is the EDP patterns enabled 29 in Fig. 2.Activation is to there is electric current inflow under EDP patterns for EDP patterns enabled 29, such as
Shown in Imain 32 in shown in Fig. 3.Under EDP I/O equipment modes, what I/O differential devices transistor 1 and transistor 3 formed
Transistor is opened serving as master serving as preemphasis switching device, the transistor that I/O differential devices transistor 2 and transistor 4 form
Close device, it is different from tie point of the operation at core P and core N under DSI patterns, in EDP I/O patterns not by
Activate and inapplicable.
Fig. 4 shows to support the display bridge of the embedded display interface (EDP) comprising core transistor in another embodiment.
EDP patterns include the offer data being provided with data-signal Din31 core transistor and EDP patterns and aggravate letter
Number Dprem32 share output electrode 17 and electrode 19, this is similar to the EDP patterns under I/O equipment modes in Fig. 3.It is digital brilliant
Body pipe 1 (DT1) and digital transistor 2 (DT2) are main driver switch equipment.IDin44 provides current to master driver and opened
Equipment DT1 and DT2 are closed, and limits a principal current value, dependent on signal swing, the current value can be 12 milliamperes of scopes
It is interior, and controlled by system design preference.Core transistor T1 and core transistor T2 is pre-emphasis driver switchgear.
IDin Prem 46 provide electric current and according to the need of system to preemphasis switching device core transistor T1 and core transistor T2
Define the 20% preemphasis electric current that a virtual value is about IDin 44.In the present embodiment, main driving current is 10 milliamperes
To 15 milliamperes.The driving transistor DT1 and DT2 of pre-driver 41 and core transistor T1 and T2.It is brilliant in EDP patterns collaboration core
In the operating process of the pattern of body pipe, core tie point P and core tie point N are activated and used.T1 isolation 21 and T2's
Isolation 22 is disconnected, and equally, DSI switchs 26 and DSI switches 28 and is disconnected.Pre-driver 12 disconnects transistor 1 and transistor 3.
Transistor 2 and transistor 4 are not as switchgear under EDP I/O equipment modes, but are used as xegregating unit.Pre-driver
12 provide about 1.5 volts of constant bias voltage to transistor 4 and transistor 2.According under the Vgs of transistor 4 and transistor 2
Drop, core node N and core node P prevent transistor DT2, DT1, and core transistor T1 and T2 enter stress situation, based on crystalline substance
Body pipe DT1, DT2, core transistor T1 and T2 are nucleus equipments.The offer terminal resistances of shared terminal output 16 to be tuned and
Adjustment.In the embodiment of EDP patterns collaboration core transistor pattern, nucleus equipment transistor DT1, DT2, core transistor
T1 and T2, which is added into I/O transistors, includes transistor 1, transistor 2, the shared output driver 18 of transistor 3 and transistor 4
In.Core devices transistor be 0.9 volt of transistor and I/O transistors be 1.8V transistor.The transistor of nucleus equipment is cut
It is more faster than I/O transistor to change speed.I/O equipment generally has 270 nanometers of length, and nucleus equipment has about 30nm's
Length.Voltage-stablizer power supply 14 provides the node A of about 0.9 volt of a voltage.Pre-driver 12 turns off transistor 1 and transistor 3,
, should and the core node P for the core node N and transistor 2 for configuring transistor 4 is about 1.5v to accommodate nucleus equipment transistor
Nucleus equipment transistor serves as source follower, to mitigate the pressure of nucleus equipment.DT1 and DT2 is coupled to pre-driver 41.Core
The heart transistor T1 and T2 are also coupled to pre-driver 41.Accordingly, DT1, DT2, core transistor T1 and T2 are 0.9v crystalline substances
Body pipe.Current source IDin 44 is coupled to DT1 and DT2.In operation, DT1 and DT2 need not from 0v to 0.9v track to track
Swing.Similarly, current source IDin Prem 44 are connected to core transistor T1 and T2.In operation, core transistor
T1 and T2 is swung without the track to track from 0v to 0.9v.This shows, 0.4v be enough to disconnect even cutting speed degree faster DT1, DT2 with
And core transistor T1 and T2.Typically, core transistor does not need any voltage more than 0.9v to drive, to prevent the pressure of degree
It may result in the too early failure of equipment.DT1 and core transistor T1 is coupled to electrode P, and DT2 and core transistor T2 is coupled
To electrode N, this is similar to the embodiment of the non-core transistor in embodiment illustrated in fig. 3, and terminating resistor 36 is coupled to shared whole
Hold the positive output Pout17 and negative output Nout19 of output unit 16.
The embodiment of core transistor reduces the voltage request under being run under EDP patterns.Because core transistor switchs
More faster than I/O transistor, core transistor embodiment can provide switch switching faster and lower noise, because running electricity
The operating voltage in I/O transistor embodiments shown in pressure ratio Fig. 3 is low.Nucleus equipment transistor embodiment is in smaller chip
Effect is preferable in terms of size, lower power consumption.
Fig. 5 shows the frame diagram for the display bridge that LVDS signals are supported in one embodiment of the invention.Except LVDS is relatively slow and work
Make outside a relatively low frequency LVDS, LVDS is similar to EDP.Pre-driver 12 provides and is applied to shared output driver 18
Transistor 4 and the difference of transistor 2 show signal Din 51.Similar, pre-driver 12 provides one and is applied to shared output
The transistor 1 of driver 18 and the difference of transistor 3 show preemphasized signal Dprem52.Similar to EDP patterns, preemphasis
Signal Dprem52 comes from display signal Din51, and is that display signal DIN 51 postpones clock cycle and reverse.In advance
Aggravating signal makes the signal adaptations of Din 51 in distortion, to compensate the output signal, so as to cause eye diagram it is expected
In range of views, this is known as aggravating effect.
It is 50 Ohmic resistances 56 that common terminal output unit 16, which is configured with characteristic impedance,.Correspondingly, the quilts of positive output Pout 7
It is coupled to a resistance 56, and negative output Nout 19 is coupled to another resistance 56.In embodiments of the present invention, share
Terminating terminal unit 16 can change applied to the final voltage on resistance 56.Because LVDS is operated in the frequency low compared with EDP patterns
Under rate, thus it is relatively slow, in order to prevent that it is so important in EDP patterns that the definite terminal impedance of signal reflex from not having.Impedance and
The terminal voltage of resistance 56 is applied to by shared terminal output unit 16 can change and maximize to reach efficiency and reduce power consumption
Purpose.In embodiments of the present invention, the combination for different terminal voltage and the resistance values of resistance 56 can be answered
With to maximize the gross efficiency for showing bridge.For example, apply 50 ohm of characteristic impedance to resistance 56, compared to bigger characteristic
Current drain is added for resistance.However, noise and signal reflex are substantially reduced due to 50 ohm of impedance.Reduction comes from
In shared terminal output unit 16 terminal voltage and increase resistance 56 impedance to 75 ohm, increase simultaneously it reduce power consumption
Gross efficiency, but the what comes into a driver's that noise and reflection will reduce in view.Terminal voltage is adjusted to such as 1.8v and by resistance 56
Impedance, which increases to 100 ohm, can reduce power consumption to a greater extent.As long as the view of output signal is enough for signal integrity
, the final voltage of resistance 56 and impedance can be set for maximal efficiency.Therefore, LVDS moulds can include can be according to LVDS
The demand of mode voltage and the final voltage changed.
Although the present invention is described according to reference to some preferred embodiments or method, it is to be understood that, this
Invention is not limited to this specific embodiment or method.But the argument that it is the present inventor is that the present invention should root
It is understood according to claims below and is explained in wider scope.Therefore, these claims are not considered only as
Described preferable method is incorporated herein, and the further change based on the claim is to those skilled in the art
Obviously.
Claims (18)
- A kind of 1. display bridge for supporting more display interfaces, it is characterised in that including：One provides the pre-driver of data input signal；One shared output driver, the data input signal is received, and provide and be compatible with driving MIDI-DSI, EDP, or LVDS The output display signal of display；One voltage-stablizer power supply, it is coupled to shared output driver, adjusts the operating voltage of shared output driver and shared for this Output driver provides current source；AndOne shared terminal exports, and is coupled to shared output driver, and shared terminal output provides terminal for output display signal Resistance simultaneously provides terminal voltage for the terminal resistance；Also include a display serial line interface to switch, display serial line interface switch is coupled to the output driver to carry For the signalling channel of a ground connection.
- 2. display bridge as claimed in claim 1, it is characterised in that shared output driver receives data input signal and provided The output display signal that one MIPI-DSI of driving is shown is compatible with, in addition to：Pre-driver is configured to provide differential signal for shared output driver；The voltage-stablizer power supply provides about 400mv operating voltage for the shared output driver；The shared terminal is in high impedance status；AndThe shared output driver receives the differential signal and drives output display signal according to the differential signal.
- 3. display bridge as claimed in claim 2, it is characterised in that the shared output driver includes driving positive output and shown The first transistor and driving negative output of signal show the second transistor of signal.
- 4. the display bridge described in claim 3, it is characterised in that the pre-driver is that the first transistor and second transistor are set The level movement of certain operational range is equipped with, to obtain one 50 ohm of conduction impedance.
- 5. display bridge as claimed in claim 1, it is characterised in that the display serial line interface switch is a coreTransistor, the core transistor have low conduction impedance.
- 6. display bridge as claimed in claim 1, it is characterised in that the shared output driver receives data input signal simultaneously There is provided and be compatible with the output display signal that one EDP of driving is shown, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receive differential signal and the preemphasized signal and shown for driving EDP provide positive output signal with Negative output signal；Voltage-stablizer power configuration provides first current source for the data of the differential signal, is carried for the data of preemphasized signal For second current source；AndShared terminal output provides terminal voltage and terminal resistance for positive output signal and negative output signal.
- 7. display bridge as claimed in claim 6, it is characterised in that the second current source for the data offer of preemphasized signal carries For the electric current of the first current source less than the data offer for differential signal.
- 8. display bridge as claimed in claim 1, it is characterised in that the shared output driver receives data input signal simultaneously There is provided and be compatible with the output display signal that one LVDS of driving is shown, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receives the data of the differential signal and the data of the preemphasized signal, and is one LVDS of driving Display provides positive output signal and negative output signal；Voltage-stablizer power supply provides first current source for the data of the differential signal, is carried for the data of the preemphasized signal It is provided with second current source；AndShared terminal output sets terminal voltage and terminal resistance for positive output signal and negative output signal.
- 9. display bridge as claimed in claim 8, it is characterised in that the shared terminal output is adjustable, to change just The terminal voltage of output signal.
- 10. display bridge as claimed in claim 8, it is characterised in that the shared terminal output is adjustable, is born with changing The terminal voltage of output signal.
- A kind of 11. display bridge for supporting more display interfaces, it is characterised in that including：The pre-driver of data input signal is provided；Shared output driver, the data input signal is received, and provide and be compatible with driving MIDI-DSI, EDP, or LVDS The output display signal of display；Voltage-stablizer power supply, is coupled to the shared output driver, and regulation shares the operating voltage of output driver and is described Shared output driver provides a current source；AndShared terminal is exported, and is coupled to the shared output driver, and terminal resistance is provided and described in being for output display signal Terminal resistance provides terminal voltage；Wherein, when driving MIPI-DSI displays, the shared output driver receives data input signal and provided and is compatible with The output display signal that driving MIPI-DSI is shown, in addition to：Pre-driver provides differential signal for the shared output driver；Voltage-stablizer power supply provides the operating voltage of an about 400mv for shared output driver；Shared terminal is arranged at high impedance status；The output driver receives the differential signal and drives output display signal according to the differential signal；AndDisplay serial line interface switch is coupled to the output driver, to provide the signalling channel of ground connection,Wherein, output driver includes driving positive output and shows that the first transistor of signal and driving negative output show the of signal Two-transistor, andPre-driver is that the first transistor and second transistor are provided with the level shift of a running amplitude to obtain 50 Europe The conduction impedance of nurse.
- 12. display bridge as claimed in claim 11, it is characterised in that the display serial line interface switch includes low conducting for one The core transistor of impedance.
- 13. display bridge as claimed in claim 11, it is characterised in that the shared output driver receives data input signal The output display signal for driving an EDP to show is compatible with offer, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receives the data of the differential signal and the data of the preemphasized signal, and shows for driving EDP Show and positive output signal and negative output signal are provided；Voltage-stablizer power supply provides the first current source for the data of the differential signal, and is provided for the data of the preemphasized signal Two current sources；AndShared terminal output is provided with terminal voltage and terminal resistance for the positive output signal and the negative output signal.
- 14. display bridge as claimed in claim 13, it is characterised in that the second electricity that the data for preemphasized signal provide Stream source provides the electric current for being less than the first current source that the data for differential signal provide.
- 15. display bridge as claimed in claim 11, it is characterised in that the shared output driver receives data input signal And provide and be compatible with the output display signal that one LVDS of driving is shown, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receives the data of the differential signal and the data of the preemphasized signal, and shows for driving LVDS Show and positive output signal and negative output signal are provided；Voltage-stablizer power supply provides the first current source for the data of differential signal, and the second electricity is provided for the data of the preemphasized signal Stream source；AndShared terminal output sets terminal voltage and terminal resistance for positive output signal and negative output signal.
- 16. as claimed in claim 15 display bridge, it is characterised in that shared terminal output be it is adjustable, with change it is just defeated Go out the terminal voltage of signal.
- 17. display bridge as claimed in claim 15, it is characterised in that shared terminal output make it is adjustable, it is negative defeated to change Go out the terminal resistance of signal.
- A kind of 18. display bridge for supporting more display interfaces, it is characterised in that including：Pre-driver, there is provided data input signal；One shared output driver, receives the data input signal and offer is compatible with driving MIPI-DSI, EDP, or The output display that LVDS is shown；One voltage-stablizer power supply is coupled to the shared output driver, adjusts the operating voltage of shared output driver and is total to for this Enjoy output driver and current source is provided；AndOne shared terminal exports, coupled to the shared output driver, to provide terminal resistance for output display signal and be The terminal resistance provides terminal voltage,Wherein, when driving MIPI-DSI displays, the shared output driver receives data input signal and provided and is compatible with Drive the output display signal that a MIPI-DSI is shown, and including：The pre-driver provides differential signal for the shared output driver；Voltage-stablizer power supply provides about 400mv operating voltage for shared output driver；Shared terminal equipment is arranged to high impedance status；Output driver receives differential signal and drives the output display signal according to the differential signal；AndOne display serial line interface switch is coupled to output driver, to provide the signalling channel of ground connection, wherein, output driver bag Include the second transistor that driving positive output shows the first transistor of signal and driving negative output shows signal；Wherein, predrive Device is that the first transistor and second transistor are provided with the level shift of certain operational range to obtain one 50 ohm of conducting Impedance；Wherein, it is the core transistor with low conduction impedance to show serial line interface switch；Wherein, when driving EDP displays, the shared output driver receives data input signal and shown for driving EDP and carried For output display signal, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receives the data of differential signal and the data of preemphasized signal, and shows and provided just for driving EDP Output signal and negative output signal；Voltage-stablizer power supply provides the first current source for the data of differential signal, and the second electric current is provided for the data of preemphasized signal Source；AndShared terminal output sets terminal voltage and terminal resistance for positive output signal and negative output signal, wherein, it is preemphasis The electric current that the second current source that the data of signal provide provides is less than the electricity of the first current source provided for the data of differential signal Stream,When driving LVDS displays, share output driver and receive data input signal, and provide and be compatible with the aobvious of driving LVDS The output display letter shown, in addition to：Pre-driver provides the data of differential signal and the data of preemphasized signal；Shared output driver receives the data of differential signal and the data of preemphasized signal, and to drive LVDS display to provide Positive output signal and negative output signal；Voltage-stablizer power supply provides the first current source for the data of differential signal, and the second electric current is provided for the data of preemphasized signal Source；AndWherein, shared terminal output is adjustable, to change the terminal voltage of positive output signal, andWherein, shared terminal output is adjustable, to change the terminal resistance of negative output signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/273,930 | 2014-05-09 | ||
| US14/273,930 US9620051B2 (en) | 2013-10-04 | 2014-05-09 | Display bridge with support for multiple display interfaces |
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| CN104867475A CN104867475A (en) | 2015-08-26 |
| CN104867475B true CN104867475B (en) | 2018-04-03 |
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| US9917589B2 (en) * | 2016-02-02 | 2018-03-13 | Samsung Electronics Co., Ltd. | Transmitter circuit and receiver circuit for operating under low voltage |
| CN108259706B (en) * | 2018-04-12 | 2020-10-30 | 京东方科技集团股份有限公司 | Video signal adjusting device and adjusting method |
| CN109683836B (en) * | 2018-12-04 | 2022-04-19 | 珠海妙存科技有限公司 | Driving device compatible with hardware interfaces of various display protocols |
| CN116208142B (en) * | 2023-05-05 | 2023-08-29 | 核芯互联科技(青岛)有限公司 | Differential signal driving circuit and method for selecting differential signal driving circuit |
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| US7138989B2 (en) * | 2000-09-15 | 2006-11-21 | Silicon Graphics, Inc. | Display capable of displaying images in response to signals of a plurality of signal formats |
| CN101656476B (en) * | 2009-09-10 | 2012-01-04 | 东南大学 | Precharge and predischarge LVDS driver |
| JP5581913B2 (en) * | 2010-09-06 | 2014-09-03 | ソニー株式会社 | Driver amplifier circuit and communication system |
| EP2713266B1 (en) * | 2012-09-26 | 2017-02-01 | Nxp B.V. | Driver circuit |
| CN103618536A (en) * | 2013-11-27 | 2014-03-05 | 苏州贝克微电子有限公司 | Mixed-mode multi-protocol serial interface driver |
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