CN104821553A - High-voltage pulse power supply integrated protection machine case - Google Patents
High-voltage pulse power supply integrated protection machine case Download PDFInfo
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- CN104821553A CN104821553A CN201510211944.8A CN201510211944A CN104821553A CN 104821553 A CN104821553 A CN 104821553A CN 201510211944 A CN201510211944 A CN 201510211944A CN 104821553 A CN104821553 A CN 104821553A
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Abstract
The invention discloses a high-voltage pulse power supply integrated protection machine case comprising a machine case bottom plate, an optical transmitting plate, a fault signal receiving plate and a manual reset plate. Five plug connectors JP1, JP2, JP3, JP4 and JP5 are loaded on the machine case bottom plate. A plug connector JP11 and an optical transmitting circuit are loaded on the optical transmitting plate. A plug connector JP 35, four identical receiving latch circuits and a reset circuit are loaded on the fault signal receiving plate. The manual reset circuit comprises a resistor R41, a resistor R42, a light-emitting diode DB41 and a reset switch Key1. A control panel can be simplified, reliability and anti-electromagnetic interference performance of the control panel can also be increased, high electromagnetic interference is overcome, reliable operation of a high-voltage pulse power supply is realized, 80kV/70A output is realized, and an EAST device experiment is successfully participated.
Description
Technical field
The present invention relates to controller technology field, particularly relate to a kind of high-voltage pulse power source integrated protection cabinet.
Background technology
80Kv/70A high-voltage pulse power source is the important component part of national big science engineering EAST neutral beam injection system.The soul of this power supply of integrated protection cabinet determines that can this power supply the key of reliability service.At present, domestic also do not have similar powerful high-voltage pulse power source, and the low power pulse power all adopts Microprocessor S3C44B0X.But microprocessor job stability under high electromagnetism strong jamming is low, therefore, this high-voltage pulse power source is needed to develop special integrated protection and control cabinet.
Summary of the invention
The object of the invention is exactly the defect in order to make up prior art, provides a kind of high-voltage pulse power source integrated protection cabinet.
The present invention is achieved by the following technical solutions:
A kind of high-voltage pulse power source integrated protection cabinet, include chassis backplane, light transmission board, fault-signal dash receiver and hand-reset plate, described chassis backplane is mounted with five connector JP1, JP2, JP3, JP4 and JP5, one end of the SEND1 pin contact resistance R1 of connector JP1, the other end of resistance R1 connects the NEXT1 pin of connector JP1, the NEXT1 pin of connector JP1 also connects 1 pin of crosspointer wire jumper JP6, 2 pin of crosspointer wire jumper JP6 connect the SEND2 pin of plug connector JP2, one end of the SEND2 pin contact resistance R2 of connector JP2, the other end of resistance R2 connects the NEXT2 pin of connector JP2, the NEXT2 pin of connector JP2 also connects 1 pin of crosspointer wire jumper JP7, 2 pin of crosspointer wire jumper JP7 connect the SEND3 pin of plug connector JP3, one end of the SEND3 pin contact resistance R3 of connector JP3, the other end of resistance R3 connects the NEXT3 pin of connector JP3, the NEXT3 pin of connector JP3 also connects 1 pin of crosspointer wire jumper JP8, 2 pin of crosspointer wire jumper JP8 connect the SEND4 pin of plug connector JP4, described light transmission board is mounted with plug connector JP11 and optical transmission circuit, plug connector JP11 inserts connector JP1, JP2, JP3, in JP4 in any one plug connector, described optical transmission circuit includes NOT gate chip U11A, NOT gate chip U11B, four optical drive chip U11, U12, U13, U14 and four corresponding with four optical drive chips respectively light send chip G11, G12, G13, G14, the input pin of described NOT gate chip U11A is connected with the SEND0 pin of plug connector JP11 by resistance R11, the input pin of the output pin NAND gate chip U11B of NOT gate chip U11A connects, the output pin of NOT gate chip U11B respectively with optical drive chip U11, U12, U13, No. 2 of U14 and No. 7 pins are connected, for controlling No. 3, output pin and No. 5 pins of optical drive chip, No. 3 pins of optical drive chip U11 and light send 2 of chip G11, 6, No. 7 pins are connected, No. 5 pins of optical drive chip U11 are connected with the anode of light-emitting diode DB11, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U12 send chip G12 are connected, and No. 5 pins of optical drive chip U12 are connected with the anode of light-emitting diode DB12, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U13 send chip G13 are connected, and No. 5 pins of optical drive chip U13 are connected with the anode of light-emitting diode DB13, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U14 send chip G14 are connected, and light sends No. 3 pin ground connection of chip G11, G12, G13, G14, No. 5 pins of optical drive chip U14 are connected with the anode of light-emitting diode DB14, the minus earth of light-emitting diode DB11, DB12, DB13, DB14, No. 8 pins of optical drive chip U11, U12, U13, U14 are connected with+the 5V of power supply, No. 4 pins are connected with the ground of power supply, No. 1 of optical drive chip U11 and No. 6 pins are connected with+the 5V of power supply through resistance R12, No. 1 of optical drive chip U12 and No. 6 pins are connected with+the 5V of power supply through resistance R13, No. 1 of optical drive chip U13 and No. 6 pins are connected with+the 5V of power supply through resistance R14, and No. 1 of optical drive chip U14 and No. 6 pins are connected with+the 5V of power supply through resistance R15, No. 3 of optical drive chip U11 and No. 5 pins connect the+5V end of power supply respectively by resistance R16 and resistance R17, No. 3 of optical drive chip U12 and No. 5 pins connect the+5V end of power supply respectively by resistance R18 and resistance R19, No. 3 of optical drive chip U13 and No. 5 pins connect the+5V end of power supply respectively by resistance R110 and resistance R111 ,+the 5V that No. 3 of optical drive chip U14 and No. 5 pins connect power supply respectively by resistance R112 and resistance R113 holds, described fault-signal dash receiver is mounted with plug connector JP35, four identical reception latch cicuits and a reset circuit, described plug connector JP35 inserts plug connector JP1, JP2, JP3, in JP4 in any one plug connector, first receives latch cicuit and includes light-receiving chip G31, NOT gate chip U31A, wire jumper JP31, NOT gate chip U31B, NOT gate chip U31C and d type flip flop U35, light-receiving chip G31 accepting state signal, and convert light signal to the signal of telecommunication, after NOT gate chip U31A is reverse, the input pin of NAND gate chip U31B and No. 3 contact pins of wire jumper JP31 are connected, the output pin of NOT gate chip U31B is connected with No. 1 contact pin of wire jumper JP31, the input pin of No. 2 contact pin NAND gate chip U31C of wire jumper JP31 is connected, by the selection of JP31 wire jumper end, light-receiving chip G31 can be set for there being the normal or unglazed normal condition of light, the output pin of NOT gate chip U31C is connected with No. 3 pins of d type flip flop U35, latch signal is sent immediately when receiving fault-signal, No. 6 pin redirects making U35 are high level state.The anode of voltage stabilizing didoe DB31 is connected with No. 6 pins of d type flip flop U35, described reset circuit includes voltage stabilizing didoe D31, electric capacity C39, resistance R40 and NOT gate chip U35A, the FW pin of plug connector JP35 by resistance R39 respectively with the negative electrode of voltage stabilizing didoe D31, electric capacity C39, the input pin of resistance R40 and NOT gate chip U35A is connected, the anode of voltage stabilizing didoe D31, the other end of electric capacity C39 and the other end of resistance R39 are directly connected to the ground, the output pin of NOT gate chip U35A receives the d type flip flop U35 in latch cicuit simultaneously with four, U36, U37, No. 1 pin of U38 is connected, as the reset signal of d type flip flop, the NEXT pin of plug connector JP35 connects four d type flip flop U35 received in latch cicuit respectively, U36, U37, No. 6 pins of U38, described hand-reset plate is mounted with manual reset circuit and plug connector JP41, in plug connector JP5 described in described plug connector JP41 inserts, manual reset circuit includes resistance R41, resistance R42, , light-emitting diode DB41 and reset switch Key1, resistance R41 one end is connected with+5V, the other end of resistance R41 connect simultaneously with 1 end of reset switch Key1, 2 ends of reset switch Key1 are connected with No. 1 contact pin of plug connector JP41 with one end of resistance R42 simultaneously, and the other end of resistance R42 is connected with the negative electrode of ground with light-emitting diode DB41 respectively, the anode of light-emitting diode DB41 is connected with No. 28 contact pins of connector JP41.It is the resultant fault latch signal of a road signal as this dash receiver that the negative electrode of diode DB31, DB32, DB33, DB34 connects, and finally this signal is connected with No. 10 contact pins of JP35.Diode DB31, DB32, DB33, DB34 as or door function use, when the anode of any one diode is high level, then export as high level state.
The model of the light-receiving chip in described four identical reception latch cicuits is HFBR2412; The model that described light sends chip G11, G12, G13, G14 is HFBR1414; The model of described d type flip flop U35, U36, U37, U38 is 74LS74; The model of the NOT gate chip on described light transmission board and fault-signal dash receiver is 74HC14M; The model of described optical drive chip U11, U12, U13, U14 is SN75451BD.
JP1, JP2, JP3 and JP4, for being connected light transmission board and fault-signal dash receiver, provide power supply and signal to them, and four connector stitch definition are identical; JP5, for connecting hand-reset plate, is provided power supply to restoring board and receives hand-reset signal, and being shown by LED.JP6, JP7, JP8 are crosspointer wire jumper, realize connecting or port by jumper cap.The multiple combination pattern of light receiving plate and light transmission board can be realized by JP6, JP7, JP8 tri-wire jumpers.If JP6 wire jumper is connection status, JP7 off-state, JP8 is connection status, then can realize JP1, and JP2 realizes one group block protection combination for receiving transmission group, and JP3, JP4 realize one group blocks protection combination; If JP6, JP7, JP8 are connection status, then can realize the combination of 3 pieces of light receiving plates and 1 piece of light transmission board, or the combination of 2 pieces of light receiving plates or 2 pieces of light transmission boards, or the combination of 1 piece of light receiving plate and 3 pieces of light transmission boards.R1, R2, R3 resistance is the transition resistance of wire jumper 2 end, in order to avoid failed shorted appears in 2 ends.
The model of described plug connector JP1-JP5 is 9001-36321; The model of described plug connector JP11, JP35, JP41 is 9001-35321; The model of described plug connector JP6-JP8 is KF128-2P.
Operation principle of the present invention is: after fault-signal dash receiver receives fault-signal, through logical operation, then sends locking signal to subsystems by light transmission board, and keeps this blockade light signal.When each For Solutions of Systems is except fault and when can again power on, manually restoring board is lifted a blockade signal.
Advantage of the present invention is: the present invention's invention not only simplifies control board; too increase reliability and the electromagnetism interference performance of control board simultaneously; for the high-voltage pulse electric origin system run continuously; his control structure is complicated, and relay protective scheme is more, can realize complicated virtual protection control by combination control board; overcome strong electromagnetic; achieve the reliability service of high-voltage pulse power source, realized 80kV/70A and exported, and the experiment of participating success EAST device.
Accompanying drawing explanation
Fig. 1 is chassis backplane structure chart of the present invention.
Fig. 2 is light transmission board circuit diagram of the present invention.
Fig. 3 is fault-signal dash receiver circuit diagram.
Fig. 4 is hand-reset plate circuit diagram of the present invention.
Embodiment
As Fig. 1, 2, 3, shown in 4, a kind of high-voltage pulse power source integrated protection cabinet, include chassis backplane, light transmission board, fault-signal dash receiver and hand-reset plate, described chassis backplane is mounted with five connector JP1, JP2, JP3, JP4 and JP5, one end of the SEND1 pin contact resistance R1 of connector JP1, the other end of resistance R1 connects the NEXT1 pin of connector JP1, the NEXT1 pin of connector JP1 also connects 1 pin of crosspointer wire jumper JP6, 2 pin of crosspointer wire jumper JP6 connect the SEND2 pin of plug connector JP2, one end of the SEND2 pin contact resistance R2 of connector JP2, the other end of resistance R2 connects the NEXT2 pin of connector JP2, the NEXT2 pin of connector JP2 also connects 1 pin of crosspointer wire jumper JP7, 2 pin of crosspointer wire jumper JP7 connect the SEND3 pin of plug connector JP3, one end of the SEND3 pin contact resistance R3 of connector JP3, the other end of resistance R3 connects the NEXT3 pin of connector JP3, the NEXT3 pin of connector JP3 also connects 1 pin of crosspointer wire jumper JP8, 2 pin of crosspointer wire jumper JP8 connect the SEND4 pin of plug connector JP4, described light transmission board is mounted with plug connector JP11 and optical transmission circuit, plug connector JP11 inserts connector JP1, JP2, JP3, in JP4 in any one plug connector, described optical transmission circuit includes NOT gate chip U11A, NOT gate chip U11B, four optical drive chip U11, U12, U13, U14 and four corresponding with four optical drive chips respectively light send chip G11, G12, G13, G14, the input pin of described NOT gate chip U11A is connected with the SEND0 pin of plug connector JP11 by resistance R11, the input pin of the output pin NAND gate chip U11B of NOT gate chip U11A connects, the output pin of NOT gate chip U11B respectively with optical drive chip U11, U12, U13, No. 2 of U14 and No. 7 pins are connected, for controlling No. 3, output pin and No. 5 pins of optical drive chip, No. 3 pins of optical drive chip U11 and light send 2 of chip G11, 6, No. 7 pins are connected, No. 5 pins of optical drive chip U11 are connected with the anode of light-emitting diode DB11, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U12 send chip G12 are connected, and No. 5 pins of optical drive chip U12 are connected with the anode of light-emitting diode DB12, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U13 send chip G13 are connected, and No. 5 pins of optical drive chip U13 are connected with the anode of light-emitting diode DB13, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U14 send chip G14 are connected, and light sends No. 3 pin ground connection of chip G11, G12, G13, G14, No. 5 pins of optical drive chip U14 are connected with the anode of light-emitting diode DB14, the minus earth of light-emitting diode DB11, DB12, DB13, DB14, No. 8 pins of optical drive chip U11, U12, U13, U14 are connected with+the 5V of power supply, No. 4 pins are connected with the ground of power supply, No. 1 of optical drive chip U11 and No. 6 pins are connected with+the 5V of power supply through resistance R12, No. 1 of optical drive chip U12 and No. 6 pins are connected with+the 5V of power supply through resistance R13, No. 1 of optical drive chip U13 and No. 6 pins are connected with+the 5V of power supply through resistance R14, and No. 1 of optical drive chip U14 and No. 6 pins are connected with+the 5V of power supply through resistance R15, No. 3 of optical drive chip U11 and No. 5 pins connect the+5V end of power supply respectively by resistance R16 and resistance R17, No. 3 of optical drive chip U12 and No. 5 pins connect the+5V end of power supply respectively by resistance R18 and resistance R19, No. 3 of optical drive chip U13 and No. 5 pins connect the+5V end of power supply respectively by resistance R110 and resistance R111 ,+the 5V that No. 3 of optical drive chip U14 and No. 5 pins connect power supply respectively by resistance R112 and resistance R113 holds, described fault-signal dash receiver is mounted with plug connector JP35, four identical reception latch cicuits and a reset circuit, described plug connector JP35 inserts plug connector JP1, JP2, JP3, in JP4 in any one plug connector, first receives latch cicuit and includes light-receiving chip G31, NOT gate chip U31A, wire jumper JP31, NOT gate chip U31B, NOT gate chip U31C and d type flip flop U35, light-receiving chip G31 accepting state signal, and convert light signal to the signal of telecommunication, after NOT gate chip U31A is reverse, the input pin of NAND gate chip U31B and No. 3 contact pins of wire jumper JP31 are connected, the output pin of NOT gate chip U31B is connected with No. 1 contact pin of wire jumper JP31, the input pin of No. 2 contact pin NAND gate chip U31C of wire jumper JP31 is connected, by the selection of JP31 wire jumper end, light-receiving chip G31 can be set for there being the normal or unglazed normal condition of light, the output pin of NOT gate chip U31C is connected with No. 3 pins of d type flip flop U35, latch signal is sent immediately when receiving fault-signal, No. 6 pin redirects making U35 are high level state.The anode of voltage stabilizing didoe DB31 is connected with No. 6 pins of d type flip flop U35, described reset circuit includes voltage stabilizing didoe D31, electric capacity C39, resistance R40 and NOT gate chip U35A, the FW pin of plug connector JP35 by resistance R39 respectively with the negative electrode of voltage stabilizing didoe D31, electric capacity C39, the input pin of resistance R40 and NOT gate chip U35A is connected, the anode of voltage stabilizing didoe D31, the other end of electric capacity C39 and the other end of resistance R39 are directly connected to the ground, the output pin of NOT gate chip U35A receives the d type flip flop U35 in latch cicuit simultaneously with four, U36, U37, No. 1 pin of U38 is connected, as the reset signal of d type flip flop, the NEXT pin of plug connector JP35 connects four d type flip flop U35 received in latch cicuit respectively, U36, U37, No. 6 pins of U38, described hand-reset plate is mounted with manual reset circuit and plug connector JP41, in plug connector JP5 described in described plug connector JP41 inserts, manual reset circuit includes resistance R41, resistance R42, , light-emitting diode DB41 and reset switch Key1, resistance R41 one end is connected with+5V, the other end of resistance R41 connect simultaneously with 1 end of reset switch Key1, 2 ends of reset switch Key1 are connected with No. 1 contact pin of plug connector JP41 with one end of resistance R42 simultaneously, and the other end of resistance R42 is connected with the negative electrode of ground with light-emitting diode DB41 respectively, the anode of light-emitting diode DB41 is connected with No. 28 contact pins of connector JP41.It is the resultant fault latch signal of a road signal as this dash receiver that the negative electrode of diode DB31, DB32, DB33, DB34 connects, and finally this signal is connected with No. 10 contact pins of JP35.Diode DB31, DB32, DB33, DB34 as or door function use, when the anode of any one diode is high level, then export as high level state.
The model of the light-receiving chip in described four identical reception latch cicuits is HFBR2412; The model that described light sends chip G11, G12, G13, G14 is HFBR1414; The model of described d type flip flop U35, U36, U37, U38 is 74LS74; The model of the NOT gate chip on described light transmission board and fault-signal dash receiver is 74HC14M; The model of described optical drive chip U11, U12, U13, U14 is SN75451BD.
The model of described plug connector JP1-JP5 is 9001-36321; The model of described plug connector JP11, JP35, JP41 is 9001-35321; The model of described plug connector JP6-JP8 is KF128-2P.
Claims (3)
1. a high-voltage pulse power source integrated protection cabinet, it is characterized in that: include chassis backplane, light transmission board, fault-signal dash receiver and hand-reset plate, described chassis backplane is mounted with five connector JP1, JP2, JP3, JP4 and JP5, one end of the SEND1 pin contact resistance R1 of connector JP1, the other end of resistance R1 connects the NEXT1 pin of connector JP1, the NEXT1 pin of connector JP1 also connects 1 pin of crosspointer wire jumper JP6, 2 pin of crosspointer wire jumper JP6 connect the SEND2 pin of plug connector JP2, one end of the SEND2 pin contact resistance R2 of connector JP2, the other end of resistance R2 connects the NEXT2 pin of connector JP2, the NEXT2 pin of connector JP2 also connects 1 pin of crosspointer wire jumper JP7, 2 pin of crosspointer wire jumper JP7 connect the SEND3 pin of plug connector JP3, one end of the SEND3 pin contact resistance R3 of connector JP3, the other end of resistance R3 connects the NEXT3 pin of connector JP3, the NEXT3 pin of connector JP3 also connects 1 pin of crosspointer wire jumper JP8, 2 pin of crosspointer wire jumper JP8 connect the SEND4 pin of plug connector JP4, described light transmission board is mounted with plug connector JP11 and optical transmission circuit, plug connector JP11 inserts connector JP1, JP2, JP3, in JP4 in any one plug connector, described optical transmission circuit includes NOT gate chip U11A, NOT gate chip U11B, four optical drive chip U11, U12, U13, U14 and four corresponding with four optical drive chips respectively light send chip G11, G12, G13, G14, the input pin of described NOT gate chip U11A is connected with the SEND0 pin of plug connector JP11 by resistance R11, the input pin of the output pin NAND gate chip U11B of NOT gate chip U11A connects, the output pin of NOT gate chip U11B respectively with optical drive chip U11, U12, U13, No. 2 of U14 and No. 7 pins are connected, No. 3 pins of optical drive chip U11 and light send 2 of chip G11, 6, No. 7 pins are connected, No. 5 pins of optical drive chip U11 are connected with the anode of light-emitting diode DB11, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U12 send chip G12 are connected, and No. 5 pins of optical drive chip U12 are connected with the anode of light-emitting diode DB12, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U13 send chip G13 are connected, and No. 5 pins of optical drive chip U13 are connected with the anode of light-emitting diode DB13, 2,6, No. 7 pins that No. 3 pins and the light of optical drive chip U14 send chip G14 are connected, and light sends No. 3 pin ground connection of chip G11, G12, G13, G14, No. 5 pins of optical drive chip U14 are connected with the anode of light-emitting diode DB14, the minus earth of light-emitting diode DB11, DB12, DB13, DB14, No. 8 pins of optical drive chip U11, U12, U13, U14 are connected with+the 5V of power supply, No. 4 pins are connected with the ground of power supply, No. 1 of optical drive chip U11 and No. 6 pins are connected with+the 5V of power supply through resistance R12, No. 1 of optical drive chip U12 and No. 6 pins are connected with+the 5V of power supply through resistance R13, No. 1 of optical drive chip U13 and No. 6 pins are connected with+the 5V of power supply through resistance R14, and No. 1 of optical drive chip U14 and No. 6 pins are connected with+the 5V of power supply through resistance R15, No. 3 of optical drive chip U11 and No. 5 pins connect the+5V end of power supply respectively by resistance R16 and resistance R17, No. 3 of optical drive chip U12 and No. 5 pins connect the+5V end of power supply respectively by resistance R18 and resistance R19, No. 3 of optical drive chip U13 and No. 5 pins connect the+5V end of power supply respectively by resistance R110 and resistance R111 ,+the 5V that No. 3 of optical drive chip U14 and No. 5 pins connect power supply respectively by resistance R112 and resistance R113 holds, described fault-signal dash receiver is mounted with plug connector JP35, four identical reception latch cicuits and a reset circuit, described plug connector JP35 inserts plug connector JP1, JP2, JP3, in JP4 in any one plug connector, first receives latch cicuit and includes light-receiving chip G31, NOT gate chip U31A, wire jumper JP31, NOT gate chip U31B, NOT gate chip U31C and d type flip flop U35, light-receiving chip G31 accepting state signal, and convert light signal to the signal of telecommunication, after NOT gate chip U31A is reverse, the input pin of NAND gate chip U31B and No. 3 contact pins of wire jumper JP31 are connected, the output pin of NOT gate chip U31B is connected with No. 1 contact pin of wire jumper JP31, the input pin of No. 2 contact pin NAND gate chip U31C of wire jumper JP31 is connected, the output pin of NOT gate chip U31C is connected with No. 3 pins of d type flip flop U35, the anode of voltage stabilizing didoe DB31 is connected with No. 6 pins of d type flip flop U35, and described reset circuit includes voltage stabilizing didoe D31, electric capacity C39, the FW pin of resistance R40 and NOT gate chip U35A, plug connector JP35 by resistance R39 respectively with the negative electrode of voltage stabilizing didoe D31, electric capacity C39, the input pin of resistance R40 and NOT gate chip U35A is connected, the anode of voltage stabilizing didoe D31, the other end of electric capacity C39 and the other end of resistance R39 are directly connected to the ground, and the output pin of NOT gate chip U35A receives the d type flip flop U35 in latch cicuit simultaneously with four, U36, U37, No. 1 pin of U38 is connected, and as the reset signal of d type flip flop, the NEXT pin of plug connector JP35 connects four d type flip flop U35 received in latch cicuit respectively, U36, U37, No. 6 pins of U38, described hand-reset plate is mounted with manual reset circuit and plug connector JP41, in plug connector JP5 described in described plug connector JP41 inserts, manual reset circuit includes resistance R41, resistance R42, , light-emitting diode DB41 and reset switch Key1, resistance R41 one end is connected with+5V, the other end of resistance R41 connect simultaneously with 1 end of reset switch Key1, 2 ends of reset switch Key1 are connected with No. 1 contact pin of plug connector JP41 with one end of resistance R42 simultaneously, and the other end of resistance R42 is connected with the negative electrode of ground with light-emitting diode DB41 respectively, the anode of light-emitting diode DB41 is connected with No. 28 contact pins of connector JP41.
2. a kind of high-voltage pulse power source integrated protection cabinet according to claim 1, is characterized in that: the model of the light-receiving chip in described four identical reception latch cicuits is HFBR2412; The model that described light sends chip G11, G12, G13, G14 is HFBR1414; The model of described d type flip flop U35, U36, U37, U38 is 74LS74; The model of the NOT gate chip on described light transmission board and fault-signal dash receiver is 74HC14M; The model of described optical drive chip U11, U12, U13, U14 is SN75451BD.
3. a kind of high-voltage pulse power source integrated protection cabinet according to claim 1, is characterized in that: the model of described plug connector JP1-JP5 is 9001-36321; The model of described plug connector JP11, JP35, JP41 is 9001-35321; The model of described plug connector JP6-JP8 is KF128-2P.
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| CN107528285A (en) * | 2017-07-17 | 2017-12-29 | 中国科学院合肥物质科学研究院 | A kind of overcurrent protective device for possessing pulse function of hiding |
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| CN203590010U (en) * | 2013-11-05 | 2014-05-07 | 中国科学院等离子体物理研究所 | EAST-NBI high-voltage power supply undervoltage protection device |
| CN104297698A (en) * | 2013-11-29 | 2015-01-21 | 中国航空工业集团公司洛阳电光设备研究所 | Detection device for power supply assembly |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107528285A (en) * | 2017-07-17 | 2017-12-29 | 中国科学院合肥物质科学研究院 | A kind of overcurrent protective device for possessing pulse function of hiding |
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