CN104811185B - The programmable logic device of a variety of primary, voltage source voltages is provided - Google Patents
The programmable logic device of a variety of primary, voltage source voltages is provided Download PDFInfo
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- CN104811185B CN104811185B CN201510155204.7A CN201510155204A CN104811185B CN 104811185 B CN104811185 B CN 104811185B CN 201510155204 A CN201510155204 A CN 201510155204A CN 104811185 B CN104811185 B CN 104811185B
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- voltage
- stablizer
- programmable logic
- acp chip
- power pin
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Abstract
The present invention discloses a kind of programmable logic device providing a variety of primary, voltage source voltages, includes at least acp chip and the voltage-stablizer on acp chip；Acp chip is packaged, encapsulation includes at least I/O pin and power pin, and wherein power pin includes I O power supply pin and core power pin；The core power pin connects the input terminal of acp chip or voltage-stablizer.The present invention saves mask expense, reduces production cost only with a kind of chip；In encapsulated phase, according to user demand, which kind of power supply chip decision is packaged into so that stock control, production management is more flexible, can effectively reduce inventory, saves production cost, can save at least half of time, and management is simpler.
Description
Technical field
The present invention relates to integrated circuit fields, and the programmable of a variety of primary, voltage source voltages is provided more particularly, to a kind of
Logical device.
Background technology
Integrated circuit can be divided into memory according to function（Memory）, microprocessor (CPU), custom circuit（ASICs）With
Programmable logic device, wherein programmable logic device are divided into simple programmable logical device（SPLD）, complex programmable logic
Device（CPLD）And field programmable gate array（FPGA）.FPGA chips not instead of permanent circuit, one kind optionally change
The chip of function can input required control formula after the power-up, its function changes with input data, and FPGA has become
Mainstream.
FPGA wafer is mainly made of core circuit and imput output circuit, is accounted for most core circuit and is typically only capable to adopt
With the transistor of high speed, low-voltage, a kind of power supply, the imput output circuit for only accounting for chip very small part can only be used then to can be used
Relative low speeds, high voltage（Such as 1.2V to 3.3V）Transistor, do not interfere with entire wafer property, therefore FPGA wafer is inputting
There is prodigious flexibility, many FPGA products to provide abundant interface and support in terms of output interface, almost support all 3.3V
To the digital IO standard of 1.2V.
In real system, user wishes to reduce the number of system power supply to the greatest extent, especially for low-cost system.It is common
Solution is to use multicore chip technology：The chip of one family uses 1.2V voltages, the chip of another family to use 1.0V
Voltage, or 1.8V, 2.5V or 3.3V voltage are used by voltage-stablizer.Although multicore chip technology can provide multiple voltage, have
Two major defects：
First, production cost height.Higher and higher with the integrated level of integrated circuit, production technology becomes increasingly complex, and is produced into
This rising, especially mask costs rise, and the advanced mask expense that technique is made may be up to 2,000,000 dollars.Multicore chip technology needs
To cover mask, cost is very high more；
Second is that management cost is high.Silicon chip is from design（It places an order to fab）, later stage packaging and testing to storage transport week
Phase usually requires 6 months, that is to say, that shifting to an earlier date planning in 6 months, quite production and inventory, difficult management are unfavorable for market supply.
Invention content
In order to overcome the above-mentioned deficiencies of the prior art, the present invention proposes a kind of may be programmed for a variety of primary, voltage source voltages of offer
Logical device can provide more functions to the user, improve the performance of device, reduce the cost of device.
To achieve the goals above, the technical scheme is that：
A kind of programmable logic device providing a variety of primary, voltage source voltages includes at least acp chip and is located at core core
The voltage-stablizer of on piece；Acp chip is packaged according to user demand, encapsulation includes at least I/O pin and power pin, wherein
Power pin includes at least I O power supply pin and core power pin；The core power pin connects acp chip or voltage-stablizer
Input terminal；
When the input terminal of the voltage-stablizer on the acp chip is when no-voltage input, control voltage-stablizer automatically into
Sleep state.
Since the voltage domain of core circuit typically operates in a low-voltage, when core power pin directly connects acp chip
When, can directly voltage be required using user.When core power pin connects the input terminal of voltage-stablizer, can be incited somebody to action by voltage-stablizer
High voltage is converted to the low-voltage needed for core circuit so that acp chip works normally.That is programmable logic device of the invention
The technology that part is combined using on piece voltage-stablizer with encapsulation design, it is a variety of to realize that a kind of chip can be supported in programming device
Core circuit power supply, such as 1.2V or 1.8V, 2.5V, 3.3V.
Compared with prior art, beneficial effects of the present invention are：Only with a kind of chip, mask expense can be saved,
Reduce production cost；It, can be according to user demand in encapsulated phase（The different voltage requirements of user）, determine which kind of is packaged into
Power supply chip so that stock control, production management is more flexible, can effectively reduce inventory, saves production cost, can save at least
The time of half, management are simpler.
Description of the drawings
Fig. 1 is the schematic diagram using bonding wire connection 1.
Fig. 2 is the schematic diagram using bonding wire connection 2.
Fig. 3 is schematic diagram when the normal work of voltage-stablizer is done.
Fig. 4 is the voltage-stablizer schematic diagram of an energy automatic " sleep ".
Specific implementation mode
The present invention will be further described below in conjunction with the accompanying drawings, but embodiments of the present invention are not limited to this.
The present invention is the programmable logic device in integrated circuit fields, it is therefore an objective to provide the more functions of user, improve
Device performance reduces device cost.
Professional term is explained：
PLD：Programmable logic device（Programmable Logic Device）.It is divided into SPLD（Simple PLD）, CPLD,
（Complicated PLD）With FPGA three classes.
FPGA chips：Field programmable gate array（Field Programmable Gate Array）Ic core
Piece.
Integrated antenna package：It referred to as encapsulates, is the final stage of semiconductor devices manufacture, it later will be into line integrated circuit
It can test.The core crystal grain of device is encapsulated within a supporter, this encapsulation can prevent physical damage（As collision and
It scratches）And chemical attack, and the pin of external connection is provided, thus it is convenient for chip being mounted in circuit system.
Bonding wire（Bonding Wire）：In order to enable the wiring point of integrated circuit to be connected with the pin of package casing,
The technique for generally using routing to engage, is connect the conductive connection point on the pin and semiconductor crystal wafer of package casing with lametta
Altogether.Pin on package casing may generally be welded in printed circuit board（PCB）On, or go out in sheet metal form
Now for fixing on the objects such as such as radiator to protect component.
Voltage-stablizer（English：Voltage stabilizer or voltage regulator）Refer in electronic engineering from
The dynamic device for maintaining constant voltage.One voltage-stablizer may be simple " feedforward " design or may be returned comprising negative feedback control
Road.Voltage-stablizer can be divided into DC voltage-stabilizing and AC voltage-stabilizing, and discussed here is DC voltage-stabilizing.
A kind of programmable logic device providing a variety of primary, voltage source voltages includes at least acp chip and is located at core core
The voltage-stablizer of on piece；Acp chip is packaged according to user demand, encapsulation includes at least I/O pin and power pin, wherein
Power pin includes at least I O power supply pin and core power pin；The core power pin connects acp chip or voltage-stablizer
Input terminal；
When the input terminal of the voltage-stablizer on the acp chip is when no-voltage input, control voltage-stablizer automatically into
Sleep state.
Since the voltage domain of core circuit typically operates in a low-voltage, when core power pin directly connects acp chip
When, can directly voltage be required using user.When core power pin connects the input terminal of voltage-stablizer, can be incited somebody to action by voltage-stablizer
High voltage is converted to the low-voltage needed for core circuit so that acp chip works normally.That is programmable logic device of the invention
The technology that part is combined using on piece voltage-stablizer with encapsulation design, it is a variety of to realize that a kind of chip can be supported in programming device
Core circuit power supply, such as 1.2V or 1.8V, 2.5V, 3.3V.
Embodiment 1
Fig. 1 and Fig. 2 illustrates the situation in a chip is encapsulated at one.Here encapsulation is using plastics square flat
Flat package（QFP）Make example, such as BGA package, but the present invention is not limited thereto encapsulation, it is also possible at present on IC market
Various other encapsulation.To the encapsulation without bonding wire such as brilliant encapsulation（Flip Chip）, change RDL layer coiling and also can reach equally
Purpose；Specific implementation needs to make the mask of two kinds of RDL, and a kind of mask realizes the bind mode of such as Fig. 1.Another mask is realized such as
The bind mode of Fig. 2；Two kinds of masks cannot use simultaneously.It according to market needs, is mapped out in production link, therefore step is
Section, relatively good control are tied to encapsulation.One is illustrated in Fig. 1,2 encapsulates the input and output usually having（IO）Pin and power supply
Pin.Here power pin includes I O power supply pin and core power pin.
Core circuitry voltage domain typically operates in a low-voltage, such as 1.2 volts.In the bonding wire connection of Fig. 1, core electricity
Source capsule foot access voltage is defined as 1.2 volts.Here it meets and is required using 1.2 volts of user.In the bonding wire connection of Fig. 2
In, since 1.8 volts to 3.3 volts of voltage can be converted into 1.2 volts by piece voltage-stablizer so that the normal work of core circuit
It does.To which core power pin access voltage is defined as 1. 8 volts to 3.3 volts.Here it meets and is arrived using 1. 8 volts
3.3 volts of user requires.To sum up, it realizes with a chip, the requirement of encapsulation two kinds of core power supply voltage of offer.
In the case of figure 2, the input of voltage-stablizer is core power pin voltage, is exported as voltage needed for 1.2 volts, this
It is the standard working method of voltage-stablizer.In the case of figure 1, although not needing voltage-stablizer work, how voltage-stablizer to be avoided to exist
When not having input voltage, negative interaction is not generated, is problem to be solved.
Fig. 3 illustrates the voltage-stablizer that a normal work is done.This is also the bonding wire scheme relative to Fig. 2.In this figure, voltage stabilizing
Device terminates input voltage with A, and output voltage is terminated with B.The output voltage values at the ends O are determined by comparing these voltages.According to N
The device property of transistor npn npn, can be by controlling its gate pole（G）Voltage obtains correct output voltage, to reaching voltage stabilizing
Effect.
And in real process, it may appear that two kinds of situations that voltage-stablizer is used and is not used.Typically such as
Fruit does not need voltage-stablizer and voltage-stablizer is not just had to be placed in chip.And in this application, voltage-stablizer is fixed on acp chip.
Therefore for the solution that voltage-stablizer is automatically closed in no input voltage, as shown in figure 4, its bonding wire connecting mode and Fig. 1
It is consistent.A special designing is increased on voltage-stablizer, this special designing is mainly that the input terminal to detect voltage-stablizer is that have
Power supply status, again without connecing power supply（High impedance）State.There are many mode of the special designing：One simple method is with one
The current source of a very little is voltage-stablizer input end grounding.Then the voltage of voltage-stablizer input terminal is surveyed.If it is high-impedance state, measure
Voltage can be 0；If it is power supply status is connect, it is supply voltage to measure voltage.
This special designing can also be the case where voltage detection module can monitor the ends A automatically.Once it was found that the ends A are in not
Power supply status is connect, entire voltage-stablizer will be made to enter extremely low power dissipation state, and makes G extremely " 0 " volts of NMOS, Jiang Qiguan
It closes.In this way, entire voltage-stablizer interlock circuit is in " sleep " state, other will not partly be brought " side effect " to chip.
First, the technology that the present invention is combined using on piece voltage-stablizer with encapsulation design, realizes one in programming device
Kind chip supports a variety of core circuit power supplys, such as 1.2V or 1.8V, 2.5V, 3.3V.I.e. the present invention is saved only with a kind of chip
Mask expense, reduces production cost；In encapsulated phase, according to user demand, which kind of power supply chip decision is packaged into so that
Stock control, production management is more flexible, can effectively reduce inventory, saves production cost, can save at least half of time, manages
Reason is simpler.It secondly, the case where different encapsulation capable of being fully taken into account using the design of on piece voltage-stablizer, when not needed, can
Automatically into sleep state to save power consumption.
The present invention proposes that a kind of editable providing a variety of primary, voltage source voltages is patrolled under the premise of not increasing device cost
Volume device, including acp chip, voltage-stablizer, core power pin, I O power supply pin and I/O pin, with the same chip and same
A encapsulation provides the requirement of two kinds of core power supply voltages, can both meet the user demand using 1.2 volts, can also be by voltage stabilizing
1.8 volts to 3.3 volts of voltage is converted to 1.2 volts by device, can be met and be wanted using 1.8 volts to 3.3 volts of user
It asks.The present invention also increases an automatic voltage detection module in the input terminal of voltage-stablizer so that when there is no control source, voltage-stablizer
Into extremely low power dissipation state, interlock circuit is in " sleep " state, other will not partly be brought " side effect " to chip.
Compared with multicore chip technology, the present invention can provide a variety of principal voltages, but without changing chip design, save mask
Expense reduces production cost, and can determine encapsulated type in encapsulated phase according to user demand so that stock control,
Production management is more flexible, can effectively reduce inventory, saves production cost.
The embodiment of invention described above, is not intended to limit the scope of the present invention..It is any in this hair
Made modifications, equivalent substitutions and improvements etc. within bright spiritual principles should be included in the claim protection of the present invention
Within the scope of.
Claims (6)
1. a kind of programmable logic device providing a variety of primary, voltage source voltages, which is characterized in that include at least acp chip and
Voltage-stablizer on acp chip；Acp chip is packaged according to user demand, encapsulation includes at least I/O pin and electricity
Source capsule foot, wherein power pin include at least I O power supply pin and core power pin；The core power pin connects core core
The input terminal of piece or voltage-stablizer；
When core power pin directly connects acp chip, directly voltage is required using user；
When core power pin connects the input terminal of voltage-stablizer, high voltage is converted to needed for the acp chip by voltage-stablizer
Low-voltage so that acp chip normal work；
When the voltage-stablizer on the acp chip input terminal no-voltage input and by core power pin directly to
When acp chip is powered, control voltage-stablizer is automatically into sleep state.
2. programmable logic device according to claim 1, which is characterized in that described to be encapsulated as plastics quad-flat-pack
Or brilliant encapsulation.
3. programmable logic device according to claim 2, which is characterized in that described to be encapsulated as plastics quad-flat-pack
When, using bonding wire to core power pin bonding wire.
4. programmable logic device according to claim 2, which is characterized in that it is described when being encapsulated as down brilliant encapsulation, it provides
Change the connection that core power pin is realized in RDL layer coiling.
5. programmable logic device according to any one of claims 1 to 4, which is characterized in that be equipped in the voltage-stablizer
Whether the input terminal for detecting voltage-stablizer is the detecting module for having power supply status.
6. programmable logic device according to claim 5, which is characterized in that the detecting module is current source, voltage stabilizing
The input terminal of device is grounded by current source.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510155204.7A CN104811185B (en) | 2015-04-02 | 2015-04-02 | The programmable logic device of a variety of primary, voltage source voltages is provided |
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| CN201510155204.7A CN104811185B (en) | 2015-04-02 | 2015-04-02 | The programmable logic device of a variety of primary, voltage source voltages is provided |
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| CN104811185A CN104811185A (en) | 2015-07-29 |
| CN104811185B true CN104811185B (en) | 2018-11-13 |
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| US11496135B2 (en) * | 2020-06-01 | 2022-11-08 | Gowin Semiconductor Corporation | Method and apparatus for providing multiple power domains a programmable semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7026840B1 (en) * | 2004-03-02 | 2006-04-11 | Altera Corporation | Programmable logic device |
| CN101488748A (en) * | 2009-02-13 | 2009-07-22 | 电子科技大学 | Field programmable gate array |
| US8612789B2 (en) * | 2011-01-13 | 2013-12-17 | Xilinx, Inc. | Power management within an integrated circuit |
| CN103346779B (en) * | 2013-06-26 | 2016-01-06 | 成都鸿芯纪元科技有限公司 | A kind of FPGA on-chip low power consumption |
| CN203984240U (en) * | 2014-07-09 | 2014-12-03 | 沈阳机床(集团)设计研究院有限公司上海分公司 | A kind of power supply circuits of field programmable gate array |
| CN204794966U (en) * | 2015-04-02 | 2015-11-18 | 广东高云半导体科技股份有限公司 | A programmable logic device of multiple principal voltage source voltage is provided |
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Address after: 528303 room 1001, science Avenue, Whampoa District, Guangzhou, Guangdong, 1001 Applicant after: GOWIN SEMICONDUCTOR Corp.,Ltd. Address before: 528303 13 building, Dongying business building, 16 Rong Qi Avenue, Shunde, Foshan, Guangdong. Applicant before: GOWIN SEMICONDUCTOR Corp.,Ltd. |
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Denomination of invention: Programmable logic device providing various main voltage source voltages Effective date of registration: 20191202 Granted publication date: 20181113 Pledgee: Ronggui sub branch of Guangdong Shunde Rural Commercial Bank Co.,Ltd. Pledgor: GOWIN SEMICONDUCTOR Corp.,Ltd. Registration number: Y2019440000243 |
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Date of cancellation: 20230509 Granted publication date: 20181113 Pledgee: Ronggui sub branch of Guangdong Shunde Rural Commercial Bank Co.,Ltd. Pledgor: GOWIN SEMICONDUCTOR Corp.,Ltd. Registration number: Y2019440000243 |