CN104810153A - Multi-layer ceramic electronic assembly and board provided thereon with multi-layer ceramic electronic assembly - Google Patents

Multi-layer ceramic electronic assembly and board provided thereon with multi-layer ceramic electronic assembly Download PDF

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Publication number
CN104810153A
CN104810153A CN201410185853.7A CN201410185853A CN104810153A CN 104810153 A CN104810153 A CN 104810153A CN 201410185853 A CN201410185853 A CN 201410185853A CN 104810153 A CN104810153 A CN 104810153A
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CN
China
Prior art keywords
electrode
ceramic
external
splicing ear
multilayer ceramic
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Granted
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CN201410185853.7A
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Chinese (zh)
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CN104810153B (en
Inventor
朴祥秀
朴珉哲
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Priority to KR1020140009719A priority Critical patent/KR101539884B1/en
Priority to KR10-2014-0009719 priority
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of CN104810153A publication Critical patent/CN104810153A/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor

Abstract

The present invention relates to a multi-layer ceramic electronic assembly and a board provided thereon with the multi-layer ceramic electronic assembly. The multi-layer ceramic electronic assembly comprises a multi-layer ceramic capacitor composed of a first ceramic body, a plurality of first inner electrodes, a plurality of second inner electrodes, a plurality of first outer electrodes and a plurality of second outer electrodes; and a ceramic chip composed of a first ceramic body, a third inner electrode, a fourth inner electrode, a first connecting terminal, a second connecting terminal, a first outer terminal and a second outer terminal. The second ceramic body is formed through stacking up a plurality of ceramic layers on the mounting surface of a multi-layer ceramic capacitor. The first and second connecting terminals are respectively extending to some parts of the upper surface of the ceramic body from the lateral surface of the second ceramic body respectively, and are respectively connected to the first and second outer electrodes of the multi-layer ceramic capacitor. The first and second outer terminals are respectively arranged on the end of the ceramic body, and are respectively connected to the exposed portions of the third and fourth inner electrodes respectively.

Description

Multilayer ceramic electronic component and its on the plate of multilayer ceramic electronic component is installed
This application claims and be submitted to the rights and interests of the 10-2014-0009719 korean patent application of Korean Intellectual Property Office on January 27th, 2014, the open of this korean application is contained in this by reference.
Technical field
The disclosure relates to a kind of multilayer ceramic electronic component and a kind of plate it being provided with multilayer ceramic electronic component.
Background technology
Multilayer ceramic capacitor (multilayer sheet type electronic building brick) is mounted in such as that display unit is (such as, liquid crystal display (LCD), plasma display (PDP) etc.), chip capacitor on the circuit board of the multiple electronic product of computer, personal digital assistant (PDA), cell phone etc., for charge or discharge.
Multilayer ceramic capacitor (MLCC) is because such as size is little, electric capacity is high and easy-to-install advantage and can be used as the assembly of various electronic installation.
Multilayer ceramic capacitor can comprise multiple dielectric layer and to be alternately stacked between dielectric layer and to have the interior electrode of different polarity.
Because dielectric layer has piezoelectric property and electroluminescent shrinkage character, so when direct current (DC) or interchange (AC) voltage are applied to multilayer ceramic capacitor, there is the phenomenon of piezoelectricity between interior electrode, thus may vibration be produced.
These vibrations are transferred to by the external electrode of multilayer ceramic capacitor the circuit board it being provided with multilayer ceramic capacitor, make whole circuit board play the effect on acoustic radiating surface, thus produce rattle (noise).
Rattle can correspond to the frequency of hearing in the scope of 20Hz to 20,000Hz, thus causes hearer uncomfortable.The rattle of hearer's discomfort is caused to be called as acoustic noise.
Particularly, when electronic installation (such as smart phone etc.) has voice communication function, need urgently to reduce this acoustic noise.
Summary of the invention
Embodiments more of the present disclosure can provide a kind of multilayer ceramic capacitor that can reduce the appearance of acoustic noise.
According to one side of the present disclosure, a kind of multilayer ceramic electronic component can comprise: multilayer ceramic capacitor, comprise the first ceramic main body, electrode and the second inner electrode and the first external electrode and the second external electrode in multiple first, stacking in first ceramic main body have multiple dielectric layer, in multiple first, electrode and the second inner electrode are alternately exposed by the side surface of the first ceramic main body, each dielectric layer is made to be arranged in first between electrode and the second inner electrode, the first external electrode and the second external electrode extend to the part of the mounting surface of the first ceramic main body respectively from the side surface of the first ceramic main body, and be connected respectively to electrode and the second inner electrode in first, and ceramic chip, comprise the second ceramic main body, electrode in electrode and the 4th in 3rd, first splicing ear and the second splicing ear and the first external terminal and the second external terminal, second ceramic main body is formed by stacking multiple ceramic layer and is arranged at the mounting surface of multilayer ceramic capacitor, in 3rd, in electrode and the 4th, electrode is arranged in the second ceramic main body, with respectively by a side surface of the second ceramic main body and an end surfaces and opposite side surface and the exposure of other end surface, and make each ceramic layer be arranged in the 3rd in electrode and the 4th between electrode, first splicing ear and the second splicing ear extend to the part of the upper surface of ceramic main body respectively from the side surface of the second ceramic main body, and be connected respectively to the first external electrode and the second external electrode of multilayer ceramic capacitor, first external terminal and the second external terminal are separately positioned on the end of ceramic main body, and be connected respectively to the part of the exposure of electrode in electrode and the 4th in the 3rd.
First splicing ear of the first external electrode of multilayer ceramic capacitor and the second external electrode and ceramic chip and the second splicing ear can have and be separately positioned on the first conductive adhesive on the first splicing ear and the second splicing ear and the second conductive adhesive.
The first external electrode of multilayer ceramic capacitor and the second external electrode can extend to the part of the upper surface of the first ceramic main body respectively from two of a first ceramic main body side surface.
The first external electrode of multilayer ceramic capacitor and the second external electrode can be separately positioned on the core of two side surfaces of the first ceramic main body.
Multilayer ceramic capacitor can comprise be separately positioned on the first ceramic main body upper surface and lower surface on upper caldding layer and lower caldding layer.
First external terminal of ceramic chip and the second external terminal can cover the two ends of the second ceramic main body respectively completely.
First splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal can have the double-decker comprising inner conductive resin bed and outside coating layer respectively.
The first external electrode of multilayer ceramic capacitor and the second external electrode can be formed by electroconductive paste, and the coating layer of the first splicing ear and the second splicing ear and the first external terminal and the second external terminal can have the double-decker of interior nickel (Ni) coating layer and outside gold (Au) coating layer respectively.
The first external electrode of multilayer ceramic capacitor and the second external electrode can comprise interior nickel (Ni) coating layer and outside tin (Sn) coating layer respectively, and the first splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal can have the double-decker comprising interior nickel (Ni) coating layer and outside tin (Sn) coating layer respectively.
According to embodiments more of the present disclosure, a kind of plate it being provided with multilayer ceramic electronic component can comprise: substrate, has and is arranged on the first electrode pad on substrate and the second electrode pad, and multilayer ceramic electronic component, be arranged on substrate, wherein, multilayer ceramic electronic component comprises multilayer ceramic capacitor and ceramic chip, multilayer ceramic capacitor comprises the first ceramic main body, electrode and the second inner electrode and the first external electrode and the second external electrode in multiple first, stacking in first ceramic main body have multiple dielectric layer, in multiple first, electrode and the second inner electrode are alternately exposed by the side surface of the first ceramic main body, each dielectric layer is made to be arranged in first between electrode and the second inner electrode, the first external electrode and the second external electrode extend to the part of the mounting surface of the first ceramic main body respectively from the side surface of the first ceramic main body, and be connected respectively to electrode and the second inner electrode in first, ceramic chip comprises the second ceramic main body, electrode in electrode and the 4th in 3rd, first splicing ear and the second splicing ear and the first external terminal and the second external terminal, second ceramic main body is formed by stacking multiple ceramic layer and is arranged at the mounting surface of multilayer ceramic capacitor, in 3rd, in electrode and the 4th, electrode is arranged in the second ceramic main body, to expose respectively by a side surface of the second ceramic main body and an end surfaces and other side surface and other end surfaces, and make each ceramic layer be arranged in the 3rd in electrode and the 4th between electrode, first splicing ear and the second splicing ear extend to the part of the upper surface of ceramic main body respectively from the side surface of the second ceramic main body, and be connected respectively to the first external electrode and the second external electrode of multilayer ceramic capacitor, first external terminal and the second external terminal are separately positioned on the end of ceramic main body, and be connected respectively to the part of the exposure of electrode in electrode and the 4th in the 3rd, first external terminal and the second external terminal are arranged on the first electrode pad and the second electrode pad respectively.
Accompanying drawing explanation
By the detailed description of carrying out below in conjunction with accompanying drawing, above-mentioned and other side, other advantage of characteristic sum of the present disclosure will be more clearly understood, in the accompanying drawings:
Fig. 1 is the perspective view of the multilayer ceramic electronic component illustrated according to exemplary embodiment of the present disclosure;
Fig. 2 is the decomposition diagram of the multilayer ceramic electronic component of Fig. 1, is wherein depicted as by multilayer ceramic electronic component and is divided into multilayer ceramic capacitor and ceramic chip;
Fig. 3 is the dielectric layer of the multilayer ceramic capacitor illustrated in the multilayer ceramic electronic component of Fig. 1 and the decomposition diagram of interior electrode;
Fig. 4 is the ceramic layer of the ceramic chip illustrated in the multilayer ceramic electronic component of Fig. 1 and the decomposition diagram of interior electrode;
Fig. 5 A to Fig. 5 C is the perspective view of the technique of the manufacture multilayer ceramic electronic component illustrated according to exemplary embodiment of the present disclosure;
Fig. 6 A and Fig. 6 B is the perspective view of the technique of the manufacture multilayer ceramic electronic component illustrated according to another exemplary embodiment of the present disclosure;
Fig. 7 A and Fig. 7 B is the perspective view of the technique of the manufacture multilayer ceramic electronic component illustrated according to another exemplary embodiment of the present disclosure;
Fig. 8 is the form cutaway view that the multilayer ceramic electronic component of the Fig. 1 intercepted along its length is mounted onboard.
Embodiment
Now, exemplary embodiment of the present disclosure is described with reference to the accompanying drawings in detail.
But the disclosure can illustrate in many different forms, and should not be construed as limited to the specific embodiment of setting forth here.On the contrary, provide these embodiments, make the disclosure to be thoroughly with complete, and fully will pass on the scope of the present disclosure to those skilled in the art.
In the accompanying drawings, for the sake of clarity, can exaggerate the shape and size of element, identical label will be used to indicate same or analogous element all the time.
In order to clearly describe exemplary embodiment of the present disclosure, hexahedral direction will be defined.Width represents the direction that external electrode is formed along it, and length direction represents the direction intersected with Width, and thickness direction represents dielectric layer stack direction (such as, stacking direction).
In addition, in an exemplary embodiment of the disclosure, for the ease of explaining, the upper surface of ceramic main body and lower surface represent ceramic main body along its thickness direction surfaces opposite to each other, two side surfaces of ceramic main body represent the Width surfaces opposite to each other along ceramic main body, wherein, lower surface is set to mounting surface.
multilayer ceramic electronic component
Fig. 1 is the perspective view of the multilayer ceramic electronic component illustrated according to exemplary embodiment of the present disclosure; Fig. 2 is the decomposition diagram of the multilayer ceramic electronic component of Fig. 1, is wherein depicted as by multilayer ceramic electronic component and is divided into multilayer ceramic capacitor and ceramic chip; Fig. 3 is the dielectric layer of the multilayer ceramic capacitor illustrated in the multilayer ceramic electronic component of Fig. 1 and the decomposition diagram of interior electrode; Fig. 4 is the ceramic layer of the ceramic chip illustrated in the multilayer ceramic electronic component of Fig. 1 and the decomposition diagram of interior electrode.
Referring to figs. 1 through Fig. 4, multilayer ceramic capacitor 100 and ceramic chip 200 can be comprised according to the multilayer ceramic electronic component of exemplary embodiment of the present disclosure.
Here, first splicing ear 233 of the ceramic chip 200 that will be described below and the second splicing ear 234 can have the first conductive adhesive 241 and the second conductive adhesive 242 be separately positioned on its upper surface, to contact respectively and to be attached to the first external electrode 131 of multilayer ceramic capacitor 100 and the mounting surface of the second external electrode 132.
Therefore, mechanically adhere to each other under the state that multilayer ceramic capacitor 100 and ceramic chip 200 can be electrically connected to each other at them by the first conductive adhesive 241 and the second conductive adhesive 242.
multilayer ceramic capacitor
Multilayer ceramic capacitor 100 can comprise the first ceramic main body 110, have there is active layer and extends to the first external electrode 131 and the second external electrode 132 of the some parts of the mounting surface of the first ceramic main body 110 from two side surfaces of the first ceramic main body 110 respectively of electrode 121 and the second inner electrode 122 in multiple first.
In an exemplary embodiment of the disclosure, the first external electrode 131 and the second external electrode 132 can only be respectively formed on two side surfaces of the first ceramic main body 110 and the some parts of mounting surface, thus when multilayer ceramic capacitor is installed onboard, the area of the solder of contact external electrode significantly reduces, thus significantly reduces the height of solder.
First ceramic main body 110 can be formed by being overlie one another then to sinter it by multiple dielectric layer 111.The shape and size of the first ceramic main body 110 and the quantity of stacking dielectric layer 111 are not limited to the shape of the example shown in Fig. 1 to Fig. 4, size and quantity.
In addition, the multiple dielectric layers 111 forming the first ceramic main body 110 can be in sintering state and be integrated with each other, thus easily can not distinguish the border between adjacent dielectric layer 111 when not using scanning electron microscopy (SEM).
First ceramic main body 110 can comprise contribute to formed capacitor electric capacity and comprise there is active layer and is formed upper caldding layer and the lower caldding layer of upper rim and lower limb part respectively on the upper surface having active layer and lower surface of interior electrode.
Active layer is had to be formed by the following method, namely, repeatedly electrode 121 and the second inner electrode 122 in stacking multiple first, to make its two side surfaces alternately passing through the first ceramic main body 110 expose, and makes dielectric layer 111 in first between electrode 121 and the second inner electrode 122.
Here, the thickness of dielectric layer 111 at random can change according to the capacitor design of multilayer ceramic capacitor 100.Such as, dielectric layer 111 can have the thickness of 0.5 μm to 5.00 μm after sintering.But the disclosure is not limited thereto.
In addition, dielectric layer 111 can comprise the ceramic powders with high k, such as, and barium titanate (BaTiO 3) class powder or strontium titanates (SrTiO 3) class powder.But the disclosure is not limited thereto.
Upper caldding layer can be formed by the material identical with the material of dielectric layer 111 with lower caldding layer, and can have the structure identical with the structure of dielectric layer 111 except they do not comprise interior electrode.
Upper caldding layer and lower caldding layer can by through-thickness respectively on the upper surface having active layer and lower surface stacking single dielectric layer or two or more dielectric layers formed, and can substantially make electrode 121 and the second inner electrode 122 in first damage due to physics or chemical stress for preventing.
In first, electrode 121 and the second inner electrode 122 (having the electrode of opposed polarity) can by being formed the electroconductive paste printing comprising conducting metal to predetermined thickness on dielectric layer 111, alternately can be exposed by two side surfaces of the first ceramic main body along the direction that dielectric layer 111 is stacking, and can be electrically insulated from each other by the dielectric layer 111 arranged between which.
In addition, extension 121b and 122b that in first, electrode 121 and the second inner electrode 122 can be comprised capacitive part 121a and 122a respectively and alternately be exposed from capacitive part 121a and 122a by two side surfaces of the first ceramic main body 110, and can be electrically connected to respectively by extension 121b and 122b and be formed in the first external electrode 131 on two side surfaces of the first ceramic main body 110 and the second external electrode 132.
Therefore, when voltage is applied to the first external electrode 131 and the second external electrode 132, electric charge can be assembled between electrode 121 and the second inner electrode 122 in facing with each other first.In this case, the electric capacity of multilayer ceramic capacitor 100 can with proportional at the area in the region having electrode 121 and the second inner electrode 122 in first in active layer stacked on top of each other.
In first, the thickness of electrode 121 and the second inner electrode 122 can making for determining based on them.Such as, consider the size of the first ceramic main body 110, in first, the thickness of electrode 121 and the second inner electrode 122 can be defined as in the scope of 0.2 μm to 1.0 μm.But the disclosure is not limited thereto.
In addition, the conducting metal be included in the electroconductive paste of electrode 121 and the second inner electrode 122 in formation first can be nickel (Ni), copper (Cu), palladium (Pd) or their alloy.But the disclosure is not limited thereto.
In addition, for the method for printing electroconductive paste, silk screen print method or woodburytype etc. can be used.But the disclosure is not limited thereto.
The first external electrode 131 and the second external electrode 132 can be formed by the electroconductive paste comprising conducting metal.Here, conducting metal can be nickel (Ni), copper (Cu), palladium (Pd), gold (Au) or their alloy.But the disclosure is not limited thereto.
In addition, the first external electrode 131 and the second external electrode 132 can be respectively formed on the core of two side surfaces of the first ceramic main body 110.
Here, the first external electrode 131 and the second external electrode 132 by the conducting paste that comprises glass is sintered electroconductive paste to be formed to the first ceramic main body 110, and can not have coating layer.
In addition, the first external electrode 131 and the second external electrode 132 can extend to the some parts of the upper surface of the first ceramic main body 110 respectively from two side surfaces of the first ceramic main body 110.Therefore, multilayer ceramic capacitor 100 can have vertical symmetrical structure, thus when being installed onboard by multilayer ceramic capacitor 100, can eliminate vertical directivity.
The first external electrode 131 and the second external electrode 132 may be used for absorbing exterior mechanical stress etc., and prevent the damage occurring such as crackle etc. in the first ceramic main body 110 and first in electrode 121 and the second inner electrode 122.
ceramic chip
With reference to Fig. 4 and Fig. 5 A to Fig. 5 C, the ceramic chip 200 according to exemplary embodiment of the present disclosure can comprise: the second ceramic main body 210, is formed by stacking multiple ceramic layer 211; Electrode 222 in electrode 221 and the 4th in 3rd, be formed in the second ceramic main body 210, to expose respectively by a side surface of the second ceramic main body 210 and an end surfaces and other side surface and other end surfaces, each ceramic layer 211 to be arranged in the 3rd in electrode 221 and the 4th between electrode 222; First splicing ear 233 and the second splicing ear 234, extend to the some parts of the upper surface of the second ceramic main body 210 respectively from two side surfaces of the second ceramic main body 210, and be connected respectively to multilayer ceramic capacitor 100 first in electrode 131 and the second inner electrode 132; First external terminal 231 and the second external terminal 232, is respectively formed on the two ends of the second ceramic main body 210, and is connected respectively to the part of the exposure of electrode 222 in electrode 221 and the 4th in the 3rd.
In addition, in 3rd, in electrode 221 and the 4th, electrode 222 can comprise the capacitive part 221a and 222a that are alternately exposed by two end surfaces of the second ceramic main body 210 and extension 221b and 222b alternately exposed from capacitive part 221a and 222a respectively by the side surface of the second ceramic main body 210, in 3rd, in electrode 221 and the 4th, electrode 222 can be electrically connected to the first external terminal 231 and the second external terminal 232 respectively by the part of the exposure of capacitive part 221a and 222a, and can be electrically connected to respectively by extension 221b and 222b the first splicing ear 233 and the second splicing ear 234 be formed on two side surfaces of the second ceramic main body 210.
In addition, the first external terminal 231 and the second external terminal 232 can cover the two ends of the second ceramic main body 210 respectively completely.
When the ceramic chip 200 with this structure mounted onboard time, be attached to the state that surface that the multilayer ceramic capacitor 100 on the upper surface of ceramic chip 200 can be in the first external electrode 131 and the second external electrode 132 is not plated.Therefore, when ceramic chip 200 is installed onboard, even if when the amount of solder is thereon relatively many, also the first external electrode 131 of solder along multilayer ceramic capacitor 100 and the phenomenon of the second external electrode 132 rising can be prevented, to stop piezoelectric stress to be directly transferred to plate from multilayer ceramic capacitor 100 by the first external electrode 131 and the second external electrode 132, thus acoustic noise reduction effect can be improved further.
modified example
Fig. 5 A to Fig. 5 C is the perspective view of the manufacturing process of the multilayer ceramic electronic component illustrated according to exemplary embodiment of the present disclosure.
The first external electrode 131 of multilayer ceramic capacitor 100 and the second external electrode 132 can have coating layer 133 and 134 respectively.
In addition, the first splicing ear 233 of ceramic chip 200 and the second splicing ear 234 and the first external terminal 231 and the second external terminal 232 can have the double-decker comprising inner conductive resin bed and outside coating layer respectively.
Here, the coating layer of multilayer ceramic capacitor 100 and ceramic chip 200 can have the double-decker comprising interior nickel (Ni) coating layer and outside tin (Sn) coating layer respectively.
With reference to Fig. 5 A, first multilayer ceramic capacitor 100 can be arranged on ceramic chip 200.Here, the first splicing ear 233 of ceramic chip 200 and the second splicing ear 234 and the first external terminal 231 and the second external terminal 232 can be in the state that conductive resin layer is not plated.
Here, first splicing ear 233 of ceramic chip 200 and the second splicing ear 234 can have the first conductive adhesive 241 and the second conductive adhesive 242 on surface disposed thereon respectively, thus contact respectively and be attached to the first external electrode 131 of multilayer ceramic capacitor 100 and the mounting surface of the second external electrode 132.
Then, with reference to Fig. 5 C, nickel plating and tin plating can be performed to the surface of the exposure of the first external electrode 131 of multilayer ceramic capacitor 100 and the surface of the exposure of the second external electrode 132, the first splicing ear 233 of ceramic chip 200 and the surface of exposure of the second splicing ear 234 and the conductive resin layer of the first external terminal 231 of ceramic chip 200 and the second external terminal 232 subsequently.
Therefore, on the first external electrode that the coating layer 133 and 134 with interior nickel coating layer and outside tin coating layer can be respectively formed at multilayer ceramic capacitor 100 and the second external electrode, and the coating layer 251 and 254 with interior nickel coating layer and outside tin coating layer can be respectively formed on the first splicing ear 233 second splicing ear 234 of ceramic chip 200 and the first external terminal 231 and the second external terminal 232.
Fig. 6 A and Fig. 6 B is the perspective view of the manufacturing process of the multilayer ceramic electronic component illustrated according to another exemplary embodiment of the present disclosure.
With reference to Fig. 6 A and Fig. 6 B, there are the multiple ceramic layers 211 being alternately formed in electrode 222 in electrode 221 and the 4th in the 3rd in one surface and can be stacked, extrude and be cut into and there is predetermined size, to prepare the second ceramic main body 210.
Then, electroconductive resin muddle can be layed onto two side surfaces and the two ends of the second ceramic main body 210, to form the first splicing ear 233 and the second splicing ear 234 and the first external terminal 231 and the second external terminal 232 formed by conductive resin layer.Electroconductive resin is stuck with paste can comprise conducting metal, heat reactive resin etc.
Then, nickel (Ni) plating and gold (Au) plating can be performed, to complete the ceramic chip 200 with coating layer 261 to 264 to the first conductive resin layer 231a and the second conductive resin layer 232a.
Then, the conductive adhesive 241 and 242 on the upper surface being separately positioned on the first splicing ear 233 and the second splicing ear 234 can be utilized to be arranged on ceramic chip 200 by multilayer ceramic capacitor 100.
Here, the first external electrode 131 of multilayer ceramic capacitor 100 and the second external electrode 132 can be in the state that they are not plated.
Fig. 7 A and Fig. 7 B is the perspective view of the manufacturing process of the multilayer ceramic electronic component illustrated according to another exemplary embodiment of the present disclosure.
With reference to Fig. 7 A, the first external electrode of multilayer ceramic capacitor 100 and the second external electrode can have nickel to form nickel coating layer 135 and 136 respectively by plating.In addition, the first splicing ear of ceramic chip 200, the second splicing ear, the first external terminal and the second external terminal can have nickel to form nickel coating layer 271 to 274 by plating.
Here, first splicing ear of ceramic chip 200 and the nickel coating layer 273 and 274 of the second splicing ear can have the first conductive adhesive 241 and the second conductive adhesive 242 be separately positioned on its upper surface, thus contact respectively and be attached to the mounting surface of the first external electrode of multilayer ceramic capacitor 100 and the coating layer 135 and 136 of the second external electrode.
Then, with reference to Fig. 7 B, multilayer ceramic capacitor 100 can utilize the first conductive adhesive 241 and the second conductive adhesive 242 to be arranged on ceramic chip 200.
Then, the surface of the surface of exposure of the first external electrode of multilayer ceramic capacitor 100 and the nickel coating layer 135 and 136 of the second external electrode and the exposure of the nickel coating layer 271 to 274 of ceramic chip 200 platedly can be covered with tin, to form tin coating layer 133 and 134 respectively on the first external electrode and the second external electrode of multilayer ceramic capacitor 100, and on the first splicing ear of ceramic chip 200, the second splicing ear, the first external terminal and the second external terminal, form tin coating layer 251 to 254 respectively.
it is provided with the plate of multilayer ceramic electronic component
Fig. 8 illustrates that the multilayer ceramic electronic component of the Fig. 1 intercepted along its length is mounted the cutaway view of form onboard.
With reference to Fig. 8, according to exemplary embodiment of the present disclosure its on multilayer ceramic electronic component is installed plate can comprise: substrate 310, has multilayer ceramic electronic component flatly mounted thereto; First electrode pad 211 and the second electrode pad 312, is formed on substrate 310 with separated from one another.
Here, multilayer ceramic electronic component can be arranged on the bottom of multilayer ceramic electronic component at its ceramic chip 200 and the first external terminal 231 and the second external terminal 232 lay respectively at the first electrode pad 211 with on the second electrode pad 312 with the state contacted with the second electrode pad 312 with the first electrode pad 311 respectively under adhere to and be electrically connected to plate 310.
When voltage being applied to multilayer ceramic electronic component be arranged on the state on plate 310 at multilayer ceramic electronic component under, acoustic noise may be produced.
Here, the size of the first electrode pad 311 and the second electrode pad 312 can be the index for determining the amount respectively the first external terminal 231 and the second external terminal 232 being connected to the solder of the first electrode pad 311 and the second electrode pad 312, and can control the size of acoustic noise based on the amount of solder.
According to exemplary embodiment of the present disclosure, the stress or vibration that the piezoelectric property due to multilayer ceramic capacitor causes can be alleviated, to reduce the size of the acoustic noise produced in the circuit board by hard ceramic chip.
Although illustrate and describe exemplary embodiment above, will be apparent that for those skilled in the art, when do not depart from as defined by the appended claims spirit and scope of the present disclosure, can modify and change.

Claims (18)

1. a multilayer ceramic electronic component, described multilayer ceramic electronic component comprises:
Multilayer ceramic capacitor, comprise the first ceramic main body, electrode and the second inner electrode and the first external electrode and the second external electrode in multiple first, stacking in first ceramic main body have multiple dielectric layer, in multiple first, electrode and the second inner electrode are alternately exposed by the side surface of the first ceramic main body, each dielectric layer is made to be arranged in first between electrode and the second inner electrode, the first external electrode and the second external electrode extend to the some parts of the mounting surface of the first ceramic main body respectively from the side surface of the first ceramic main body, and be connected respectively to electrode and the second inner electrode in first, and
Ceramic chip, comprise the second ceramic main body, electrode in electrode and the 4th in 3rd, first splicing ear and the second splicing ear and the first external terminal and the second external terminal, second ceramic main body is formed by stacking multiple ceramic layer and is arranged at the mounting surface of multilayer ceramic capacitor, in 3rd, in electrode and the 4th, electrode is arranged in the second ceramic main body, to expose respectively by a side surface of the second ceramic main body and an end surfaces and other side surface and other end surfaces, and make each ceramic layer be arranged in the 3rd in electrode and the 4th between electrode, first splicing ear and the second splicing ear extend to the some parts of the upper surface of ceramic main body respectively from the side surface of the second ceramic main body, and be connected respectively to the first external electrode and the second external electrode of multilayer ceramic capacitor, first external terminal and the second external terminal are separately positioned on the end of ceramic main body, and be connected respectively to the part of the exposure of electrode in electrode and the 4th in the 3rd.
2. multilayer ceramic electronic component as claimed in claim 1, wherein, the first external electrode of multilayer ceramic capacitor and the first splicing ear of the second external electrode and ceramic chip and the second splicing ear have and are separately positioned on the first conductive adhesive on the first splicing ear and the second splicing ear and the second conductive adhesive.
3. multilayer ceramic electronic component as claimed in claim 1, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode extend to the some parts of the upper surface of the first ceramic main body respectively from two side surfaces of the first ceramic main body.
4. multilayer ceramic electronic component as claimed in claim 1, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode are separately positioned on the core of two side surfaces of the first ceramic main body.
5. multilayer ceramic electronic component as claimed in claim 1, wherein, multilayer ceramic capacitor comprise be separately positioned on the first ceramic main body upper surface and lower surface on upper caldding layer and lower caldding layer.
6. multilayer ceramic electronic component as claimed in claim 1, wherein, the first external terminal of ceramic chip and the second external terminal cover the two ends of the second ceramic main body respectively completely.
7. multilayer ceramic electronic component as claimed in claim 1, wherein, the first splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal have the double-decker comprising inner conductive resin bed and outside coating layer respectively.
8. multilayer ceramic electronic component as claimed in claim 7, wherein, the first external electrode and the second external electrode of multilayer ceramic capacitor are formed by electroconductive paste,
The coating layer of the first splicing ear and the second splicing ear and the first external terminal and the second external terminal has the double-decker of interior nickel coating layer and outside gold coating layer respectively.
9. multilayer ceramic electronic component as claimed in claim 7, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode comprise interior nickel coating layer and outside tin coating layer respectively,
First splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal have the double-decker comprising interior nickel coating layer and outside tin coating layer respectively.
10. it is provided with a plate for multilayer ceramic electronic component, described plate comprises:
Substrate, has and is arranged on the first electrode pad on substrate and the second electrode pad; And
Multilayer ceramic electronic component, is arranged on substrate,
Wherein, multilayer ceramic electronic component comprises multilayer ceramic capacitor and ceramic chip,
Multilayer ceramic capacitor comprises the first ceramic main body, electrode and the second inner electrode and the first external electrode and the second external electrode in multiple first, stacking in first ceramic main body have multiple dielectric layer, in multiple first, electrode and the second inner electrode are alternately exposed by the side surface of the first ceramic main body, each dielectric layer is made to be arranged in first between electrode and the second inner electrode, the first external electrode and the second external electrode extend to the some parts of the mounting surface of the first ceramic main body respectively from the side surface of the first ceramic main body, and be connected respectively to electrode and the second inner electrode in first,
Ceramic chip comprises the second ceramic main body, electrode in electrode and the 4th in 3rd, first splicing ear and the second splicing ear and the first external terminal and the second external terminal, second ceramic main body is formed by stacking multiple ceramic layer and is arranged at the mounting surface of multilayer ceramic capacitor, in 3rd, in electrode and the 4th, electrode is arranged in the second ceramic main body, to expose respectively by a side surface of the second ceramic main body and an end surfaces and other side surface and other end surfaces, and make each ceramic layer be arranged in the 3rd in electrode and the 4th between electrode, first splicing ear and the second splicing ear extend to the some parts of the upper surface of ceramic main body respectively from the side surface of the second ceramic main body, and be connected respectively to the first external electrode and the second external electrode of multilayer ceramic capacitor, first external terminal and the second external terminal are separately positioned on the end of ceramic main body, and be connected respectively to the part of the exposure of electrode in electrode and the 4th in the 3rd,
First external terminal and the second external terminal are arranged on the first electrode pad and the second electrode pad respectively.
11. plates as claimed in claim 10, wherein, the first external electrode of multilayer ceramic capacitor and the first splicing ear of the second external electrode and ceramic chip and the second splicing ear have and are separately positioned on the first conductive adhesive on the first splicing ear and the second splicing ear and the second conductive adhesive.
12. plates as claimed in claim 10, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode extend to the some parts of the upper surface of the first ceramic main body respectively from two side surfaces of the first ceramic main body.
13. plates as claimed in claim 10, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode are separately positioned on the core of two side surfaces of the first ceramic main body.
14. plates as claimed in claim 10, wherein, multilayer ceramic capacitor comprise be separately positioned on the first ceramic main body upper surface and lower surface on upper caldding layer and lower caldding layer.
15. plates as claimed in claim 10, wherein, the first external terminal of ceramic chip and the second external terminal cover the two ends of the second ceramic main body respectively completely.
16. plates as claimed in claim 10, wherein, the first splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal have the double-decker comprising inner conductive resin bed and outside coating layer respectively.
17. plates as claimed in claim 16, wherein, the first external electrode and the second external electrode of multilayer ceramic capacitor are formed by electroconductive paste,
The coating layer of the first splicing ear and the second splicing ear and the first external terminal and the second external terminal has the double-decker of interior nickel coating layer and outside gold coating layer respectively.
18. plates as claimed in claim 16, wherein, the first external electrode of multilayer ceramic capacitor and the second external electrode comprise interior nickel coating layer and outside tin coating layer respectively,
First splicing ear of ceramic chip and the second splicing ear and the first external terminal and the second external terminal have the double-decker comprising interior nickel coating layer and outside tin coating layer respectively.
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