CN104796047A - FPGA (field programmable gate array)-based brushless direct-current motor commutation control method - Google Patents
FPGA (field programmable gate array)-based brushless direct-current motor commutation control method Download PDFInfo
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- CN104796047A CN104796047A CN201510170118.3A CN201510170118A CN104796047A CN 104796047 A CN104796047 A CN 104796047A CN 201510170118 A CN201510170118 A CN 201510170118A CN 104796047 A CN104796047 A CN 104796047A
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- switching tube
- fpga
- commutation
- motor
- phase windings
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/14—Electronic commutators
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- Control Of Motors That Do Not Use Commutators (AREA)
Abstract
The invention provides an FPGA (field programmable gate array)-based brushless direct-current motor commutation control method aiming at the technical problem of high resource occupancy in control of a brushless direct-current motor on the basis of FPGA finite-state machine commutation in the prior art. A main operating principle includes that commutation signals (including Hall signals with Hall and commutation signals acquired through a hardware circuit without Hall sensors) of a motor are detected and directly subjected to commutation logic conversion through FPGA to control on and off of a full-bridge circuit, adopting an initial state transfer process of an existing finite-state machine to realize driving of rotation of the motor is avoided, and the problem of high resource occupancy in commutation of FPGA control based brushless direct-current motors is solved.
Description
Technical field
The present invention relates to Electric Drive technical field, particularly relate to a kind of control method for brushless direct current motor.
Background technology
Brshless DC motor had both had the advantages such as ac motor structure is simple, reliable, easy to maintenance, had again the speed adjusting performance that direct current machine is good, simultaneously due to the use of novel permanent magnetic material, its power density is high, under same power, volume is less, so be widely used.
Shown in accompanying drawing 1 is brushless DC motor control system based on FPGA, comprises FPGA, drive circuit and Hall element, wherein, FPGA is as master control, it receives the control signal from upper generation on the one hand, performs the control strategy of oneself on the other hand, controls the running of brushless electric machine.
At present, it is of the prior art that to control brshless DC motor commutation logic based on FPGA be design based on the logic hardware of finite state machine, as shown in Figure 2, when its operation principle is system electrification, it is operated in initial condition, then according to detected Hall commutation logic, corresponding commutation states is jumped to.Carry out output and control drive circuit, and then control inverter circuit, thus reach the object controlling motor.But the mode that this employing finite state machine realizes, the resource shared by commutation logic is high.
Summary of the invention
In order to solve the problems of the prior art, a kind of brshless DC motor reverse control method based on FPGA of the present invention, can solve the problem that when brshless DC motor controlled based on FPGA changes, the resource that takies is too high.
The present invention is achieved through the following technical solutions:
Based on a brshless DC motor reverse control method of FPGA, described method is applied to the brshless DC motor reversing control system based on FPGA, and described system comprises FPGA and drive circuit, described brshless DC motor adopts the UVW three-phase windings excitation structure of Y-connection, described drive circuit is six switching tube H_1, H_2, H_3, L_1, L_2, the full-bridge topologies that L_3 is formed, switching tube H_1, H_2, the emitter of H_3 and switching tube L_1, L_2, the collector electrode of L_3 connects, switching tube H_1, H_2, the collector electrode of H_3 is connected to the positive pole of a power supply, switching tube L_1, L_2, the emitter of L_3 is connected to the negative pole of described power supply, lead on the U phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_1 of switching tube H_1, lead on the V phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_2 of switching tube H_2, lead on the W phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_3 of switching tube H_3, described drive circuit switches the electric current by three-phase windings according to the described brshless DC motor commutation signal detected, it is characterized in that, described method performs in described FPGA, when commutation signal being detected, commutation logic as shown in the table is exported according to described commutation signal, then the pwm signal phase commutation logic of correspondence and FPGA produced with, produce and export the break-make controlling the described electric current by three-phase windings accordingly,
Wherein, commutation signal A, B, C 0 represent proximity Hall switch detection rotor s pole away from, 1 to represent proximity Hall switch detection rotor s extremely close; The operating state 0 of each switching tube represents and turns off, and 1 represents conducting; Each phase "on" position 0 represents corresponding outflow mutually, and 1 represents the mutually inflow of electric current from correspondence, and X represents this does not have electric current to flow through mutually.
As a further improvement on the present invention, described commutation signal is the Hall element signal on three-phase windings.
As a further improvement on the present invention, described commutation signal is the commutation signal that hardware circuit obtains.
The invention has the beneficial effects as follows: the brshless DC motor reverse control method based on FPGA that the present invention proposes, its main operational principle is the commutation signal detecting motor, comprise the hall signal of band Hall, not with the commutation signal that Hall element is obtained by hardware circuit, the switch of commutation logic conversion and control full-bridge circuit is directly carried out through FPGA, and reach the object of drive motors rotation without initial condition, the problem that the resource taken when solving the brshless DC motor commutation controlled based on FPGA is too high.
Accompanying drawing explanation
Fig. 1 is the brushless DC motor control system schematic diagram based on FPGA;
Fig. 2 is the finite state machine logical schematic that prior art adopts;
Fig. 3 is the driving circuit principle figure of the brushless DC motor control system based on FPGA;
Fig. 4 is brshless DC motor three-phase windings schematic diagram;
Fig. 5 is the comprehensive rtl circuit figure of the commutation logic that method of the present invention adopts.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Brshless DC motor reverse control method based on FPGA of the present invention, is applied to the brshless DC motor reversing control system based on FPGA, and as shown in Figure 1, described system comprises FPGA and drive circuit.FPGA is by accepting host computer instruction, by the control method of oneself, produce corresponding PMW signal, by the hall signal of Hall_A, Hall_B, Hall_C feedback, PMW signal is outputted to drive circuit, is finally driven the UVW three-phase of brushless electric machine by drive circuit.Drive circuit is the driving inverter circuit be made up of six switch mosfet pipes shown in accompanying drawing 3.Shown in accompanying drawing 4 is the three-phase windings of brshless DC motor.
Brshless DC motor adopts the UVW three-phase windings excitation structure of Y-connection, and brshless DC motor switches the electric current by ABC three-phase windings by the drive circuit of the full bridge structure be made up of six switching tubes (H_1, H_2, H_3, L_1, L_2, L_3).As shown in Figure 3, in described drive circuit, switching tube H_1, H_2, the emitter of H_3 and switching tube L_1, L_2, the collector electrode of L_3 connects, switching tube H_1, H_2, the collector electrode of H_3 is connected to the positive pole of a power supply, switching tube L_1, L_2, the emitter of L_3 is connected to the negative pole of described power supply, lead on the U phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_1 of switching tube H_1, lead on the V phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_2 of switching tube H_2, lead on the W phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_3 of switching tube H_3.
As long as commutation signal (the band Hall element of motor to be detected at any time, commutation signal is hall signal, then commutation signal is obtained by hardware circuit not with Hall element, as: back electromotive force method, third harmonic component method, fly-wheel diode detection method, inductance detection method, Kalman filtering method, eddy current effect method, these methods are utilized to obtain the value of commutation signal ABC in brushless electric machine commutation logic table as shown in table 1), FPGA just exports commutation logic as shown in the table, then the pwm signal phase commutation logic of correspondence and FPGA produced with, produce corresponding control signal to export, to control the described break-make by the electric current of three-phase windings.
Accompanying drawing 5 is the comprehensive rtl circuit figure of the commutation logic (the brushless electric machine commutation logic namely shown in table 1) that method of the present invention adopts.
Table 1 brushless electric machine commutation logic table
Wherein, commutation signal A, B, C 0 represent proximity Hall switch detection rotor s pole away from, 1 to represent proximity Hall switch detection rotor s extremely close; The operating state 0 of each switching tube represents and turns off, and 1 represents conducting; Each phase "on" position 0 represents corresponding outflow mutually, and 1 represents the mutually inflow of electric current from correspondence, and X represents this does not have electric current to flow through mutually.
Adopt finite state machine to realize the mode of brshless DC motor commutation control in prior art, take total logical block 12, for the resource 12 of combinational logic, for register money 6; And brshless DC motor reverse control method of the present invention, take total logical block 9, for the resource 9 of combinational logic, for register money 6.Obviously, the resource shared by brshless DC motor reverse control method of the present invention is few.
The brshless DC motor reverse control method based on FPGA that the present invention proposes, its main operational principle is the commutation signal detecting motor, comprise the hall signal of band Hall, not with the commutation signal that Hall element is obtained by hardware circuit, the switch of commutation logic conversion and control full-bridge circuit is directly carried out through FPGA, and reach the object of drive motors rotation without initial condition, the problem that the resource taken when solving the brshless DC motor commutation controlled based on FPGA is too high.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, some simple deduction or replace can also be made, all should be considered as belonging to protection scope of the present invention.
Claims (3)
1., based on a brshless DC motor reverse control method of FPGA, described method is applied to the brshless DC motor reversing control system based on FPGA, and described system comprises FPGA and drive circuit, described brshless DC motor adopts the UVW three-phase windings excitation structure of Y-connection, described drive circuit is six switching tube H_1, H_2, H_3, L_1, L_2, the full-bridge topologies that L_3 is formed, switching tube H_1, H_2, the emitter of H_3 and switching tube L_1, L_2, the collector electrode of L_3 connects, switching tube H_1, H_2, the collector electrode of H_3 is connected to the positive pole of a power supply, switching tube L_1, L_2, the emitter of L_3 is connected to the negative pole of described power supply, lead on the U phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_1 of switching tube H_1, lead on the V phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_2 of switching tube H_2, lead on the W phase winding that wire is connected in three-phase windings from node between the emitter and the collector electrode of switching tube L_3 of switching tube H_3, described drive circuit switches the electric current by three-phase windings according to the described brshless DC motor commutation signal detected, it is characterized in that, described method performs in described FPGA, when commutation signal being detected, commutation logic as shown in the table is exported according to described commutation signal, then the pwm signal phase commutation logic of correspondence and FPGA produced with, produce and export the break-make controlling the described electric current by three-phase windings accordingly,
Wherein, commutation signal A, B, C 0 represent proximity Hall switch detection rotor s pole away from, 1 to represent proximity Hall switch detection rotor s extremely close; The operating state 0 of each switching tube represents and turns off, and 1 represents conducting; Each phase "on" position 0 represents corresponding outflow mutually, and 1 represents the mutually inflow of electric current from correspondence, and X represents this does not have electric current to flow through mutually.
2. reverse control method according to claim 1, is characterized in that, described commutation signal is the Hall element signal on three-phase windings.
3. reverse control method according to claim 1, is characterized in that, described commutation signal is the commutation signal that hardware circuit obtains.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510170118.3A CN104796047A (en) | 2015-04-10 | 2015-04-10 | FPGA (field programmable gate array)-based brushless direct-current motor commutation control method |
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| CN201510170118.3A CN104796047A (en) | 2015-04-10 | 2015-04-10 | FPGA (field programmable gate array)-based brushless direct-current motor commutation control method |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090309526A1 (en) * | 2008-06-13 | 2009-12-17 | System General Corporation | Control circuit with dual programmable feedback loops for bldc motors |
| CN103078574A (en) * | 2011-10-25 | 2013-05-01 | 深圳万讯自控股份有限公司 | Active brake control method and system of direct-current brushless motor |
| CN104242749A (en) * | 2014-07-30 | 2014-12-24 | 合肥工业大学 | Sensorless brushless direct-current motor reversing control method |
| CN104410340A (en) * | 2014-11-27 | 2015-03-11 | 江苏科技大学 | High-speed torque ripple restraining device based on direct current bus voltage adjustment and restraining method thereof |
-
2015
- 2015-04-10 CN CN201510170118.3A patent/CN104796047A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090309526A1 (en) * | 2008-06-13 | 2009-12-17 | System General Corporation | Control circuit with dual programmable feedback loops for bldc motors |
| CN103078574A (en) * | 2011-10-25 | 2013-05-01 | 深圳万讯自控股份有限公司 | Active brake control method and system of direct-current brushless motor |
| CN104242749A (en) * | 2014-07-30 | 2014-12-24 | 合肥工业大学 | Sensorless brushless direct-current motor reversing control method |
| CN104410340A (en) * | 2014-11-27 | 2015-03-11 | 江苏科技大学 | High-speed torque ripple restraining device based on direct current bus voltage adjustment and restraining method thereof |
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