CN104793674B - Hysteresis control device with fixed frequency and control method - Google Patents
Hysteresis control device with fixed frequency and control method Download PDFInfo
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- CN104793674B CN104793674B CN201410029842.XA CN201410029842A CN104793674B CN 104793674 B CN104793674 B CN 104793674B CN 201410029842 A CN201410029842 A CN 201410029842A CN 104793674 B CN104793674 B CN 104793674B
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Abstract
The invention discloses a hysteresis control device with the fixed frequency and a control method. The hysteresis control device comprises an oscillating circuit, a charge pump circuit, a hysteresis window generating circuit and a hysteresis control circuit. The output end of the oscillating circuit is connected with the input end of the charge pump circuit. The input end of the charge pump circuit is connected with the output end of the hysteresis control circuit. The output end of the charge pump circuit is connected with the input end of the hysteresis window generating circuit. The output end of the hysteresis window generating circuit is connected with the input end of the hysteresis control circuit. According to the hysteresis control device with the fixed frequency and the control method, the implementation circuits are simple, the standard CMOS technology can be conveniently used for implementation, meanwhile, true fixed-frequency control is achieved, and insensitivity to parameter changes of peripheral system elements is achieved in the frequency control process.
Description
Technical field
The invention belongs to sluggish control technology field, the sluggish control device of more particularly, to a kind of fixed frequency and controlling party
Method.
Background technology
In the circuit such as Switching Power Supply and led driving, sluggish control is a kind of common control technology, has control circuit
Simply, the advantages of fast response time.But traditional sluggish control is VFC, frequency can with input voltage, output voltage,
The ambient parameters such as inductance and change.This in some application scenarios higher to EMC Requirements (such as automotive electronics) is
One shortcoming.
Disclose in the patent of invention of Application No. 201110115574.x and a kind of there is self adaptation Hysteresis control circuit
Led driver and its control method, are capable of the control to fixed frequency.Its implementation is to adopt feed-forward, needs same
When sampling input voltage and output voltage, retarding window is produced by the computing of (vin-vo) * vo/vin, but this computing is used
The cmos circuit of standard is difficult to, it usually needs bipolarity triode come to realize multiplication operation.Additionally, this control method is only
It is one kind certainly frequency control mode, its frequency is related to inductance and output current parameter.
Content of the invention
It is an object of the invention to provide a kind of sluggish control device of fixed frequency and control method, to solve existing skill
The complicated problem of circuit is adopted in art.
The embodiment of the present invention provide a kind of fixed frequency sluggish control device, comprising: oscillating circuit, charge pump circuit,
Retarding window generative circuit and hysteresis control circuit；
The output end of described oscillating circuit connects the input of described charge pump circuit, and described oscillating circuit is used for described
Charge pump circuit output reference frequency；
The input of described charge pump circuit connects the output end of described hysteresis control circuit, and output end connects described sluggishness
The input of window generative circuit, described charge pump circuit receives the operating frequency of described hysteresis control circuit output, described electricity
Lotus pump circuit according to the described operating frequency receiving and described reference frequency generate error voltage signal and be sent to described late
Stagnant window generative circuit；
The output end of described retarding window generative circuit connects the input of described hysteresis control circuit, described retarding window
Described error voltage signal is converted into retarding window voltage and is sent to described hysteresis control circuit by generative circuit；
The size of described hysteresis control circuit operating frequency according to described retarding window voltage-regulation.
Described sluggishness control device also includes voltage collection circuit and the first gate-controlled switch；
The input of described voltage collection circuit connects input voltage source, and the output end of described voltage collection circuit connects institute
State the input of hysteresis control circuit and the input of described first gate-controlled switch, described voltage collection circuit is to described voltage ratio
There is provided the first reference voltage compared with device；
The output end of described hysteresis control circuit connects the control end of described first gate-controlled switch, described first gate-controlled switch
Output head grounding, described hysteresis control circuit pass through control described first gate-controlled switch closed and disconnected adjust described voltage
First reference voltage of Acquisition Circuit output, and described first reference voltage and described retarding window voltage-regulation are compared
To adjust the size of described operating frequency.
Described retarding window generative circuit includes voltage and halves circuit, amplifier adder and amplifier subtracter, described electricity
The input that pressure halves circuit is the input of described retarding window generative circuit, and the output end that described voltage halves circuit connects
The first input end of described amplifier adder and the first input end of described amplifier subtracter, the second of described amplifier adder is defeated
Enter end and the second input of described amplifier subtracter connects the second reference voltage, the output end of described amplifier adder constitutes institute
State the first output end of retarding window generative circuit, the output end of described amplifier subtracter constitutes described retarding window generative circuit
The second output end.
Described hysteresis control circuit includes voltage comparator, the second gate-controlled switch, the 3rd gate-controlled switch and phase inverter, institute
The input stating the second gate-controlled switch connects the first output end of described retarding window generative circuit, described second gate-controlled switch
Output end connects the in-phase input end of described voltage comparator, and the control end of described second gate-controlled switch connects described phase inverter
Output end, the input of described phase inverter connects the output end of described voltage comparator, the input of described 3rd gate-controlled switch
Connect the second output end of described retarding window generative circuit, the output end of described 3rd gate-controlled switch connects described voltage ratio relatively
The in-phase input end of device, the control end of described 3rd gate-controlled switch connects the output end of described voltage comparator, described voltage ratio
Connect described first reference voltage compared with the inverting input of device, the output end of described voltage comparator is described hysteresis control circuit
Output end.
Described voltage collection circuit includes first resistor, second resistance, 3rd resistor, the first operational amplifier and first
FET, described input voltage source connects the first end of described first resistor and the first end of second resistance, described first electricity
Second end of resistance connects the in-phase input end of described first operational amplifier, and the second end of described first resistor connects described first
The input of gate-controlled switch, the second end of described second resistance connects the inverting input of described first operational amplifier and described
The source electrode of the first FET, the output end of described first operational amplifier connects the grid of described first FET, described
The drain electrode of the first FET connects the first end of described 3rd resistor and the inverting input of described voltage comparator, and described the
Second end ground connection of three resistance.
Another embodiment of the present invention also provides a kind of sluggish control method of fixed frequency, comprises the following steps:
Charge pump circuit generates error voltage signal according to reference frequency and operating frequency；
Described error voltage signal is converted into retarding window voltage by retarding window generative circuit；
The size of hysteresis control circuit operating frequency according to described retarding window voltage-regulation.
Described charge pump circuit generates the step of error voltage signal according to reference frequency and operating frequency particularly as follows: by base
Quasi- frequency and operating frequency obtain difference on the frequency after being compared, and are converted into error voltage letter after described difference on the frequency is integrated
Number.
Described retarding window generative circuit by described error voltage signal be converted into retarding window voltage step particularly as follows:
Described error voltage is carried out obtaining branch pressure voltage after partial pressure；
The top obtaining described retarding window voltage with described branch pressure voltage after second reference voltage is added is with voltage；
The with voltage below of described retarding window voltage is obtained with described branch pressure voltage after second reference voltage is subtracted each other.
The step of described hysteresis control circuit size of operating frequency according to described retarding window voltage-regulation is concrete
For:
Obtain the first reference voltage by gathering input voltage；
It is compared with voltage with the top of described retarding window voltage for described first reference voltage or with voltage below,
And the size of described operating frequency is adjusted according to comparative result.
Described described first reference voltage is compared with described retarding window voltage, and according to comparative result adjust institute
State the step of the size of operating frequency particularly as follows:
When the top that described first reference voltage is less than described retarding window voltage is with voltage or with voltage below, control
Described first reference voltage increases, and makes described first reference voltage with voltage or following more than the top of described retarding window voltage
With voltage；
When the top that described first reference voltage is more than described retarding window voltage is with voltage or with voltage below, control
Described first reference voltage reduces, and makes described first reference voltage with voltage or following less than the top of described retarding window voltage
With voltage.
A kind of sluggish control device of fixed frequency of the embodiment of the present invention and control method realize circuit simply, can be convenient
Realized using standard cmos technique, be simultaneously achieved real fixed frequency and control, to system during to FREQUENCY CONTROL
Peripheral cell Parameters variation is insensitive, and the embodiment of the present invention is applied widely, can be applicable to the switch of all topological form
Power supply or led drive, and also apply be applicable to other Hysteresis control systems, are not limited in field of power supplies.
Brief description
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, below will be to embodiment or description of the prior art
In required use accompanying drawing be briefly described it should be apparent that, drawings in the following description be only the present invention some
Embodiment, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these
Accompanying drawing obtains other accompanying drawings.
Fig. 1 is a kind of example structure schematic diagram of the sluggish control device of fixed frequency provided in an embodiment of the present invention；
Fig. 2 is that a kind of sluggish control principle of the sluggish control device of fixed frequency provided in an embodiment of the present invention is illustrated
Figure；
Fig. 3 is that a kind of frequency negative-feedback principle of the sluggish control device of fixed frequency provided in an embodiment of the present invention is illustrated
Figure；
Fig. 4 is that a kind of another example structure of the sluggish control device of fixed frequency provided in an embodiment of the present invention is illustrated
Figure；
Fig. 5 is the charge pump circuit circuit in a kind of sluggish control device of fixed frequency provided in an embodiment of the present invention
Figure；
Fig. 6 is a kind of another embodiment circuit diagram of the sluggish control device of fixed frequency provided in an embodiment of the present invention.
Fig. 7 is a kind of embodiment flow chart of the sluggish control method of fixed frequency provided in an embodiment of the present invention.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with drawings and Examples, right
The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only in order to explain the present invention, and
It is not used in the restriction present invention.
In order to technical solutions according to the invention are described, to illustrate below by specific embodiment.
A kind of sluggish control device of fixed frequency of the embodiment of the present invention, refers to Fig. 1, comprising: oscillating circuit 101, electricity
Lotus pump circuit 102, retarding window generative circuit 103 and hysteresis control circuit 104；
The output end of oscillating circuit 101 connects the input of charge pump circuit 102, and oscillating circuit 101 is used for charge pump
Circuit 102 output reference frequency；
The input of charge pump circuit 102 connects the output end of hysteresis control circuit 104, and output end connects retarding window life
Become the input of circuit 103, charge pump circuit 102 receives the operating frequency of hysteresis control circuit 104 output, charge pump circuit
102 generate error voltage signal and are sent to retarding window generative circuit 103 according to the operating frequency receiving and reference frequency；
The output end of retarding window generative circuit 103 connects the input of hysteresis control circuit 104, and retarding window generates electricity
Error voltage signal is converted into retarding window voltage and is sent to hysteresis control circuit 104 by road 103；
Hysteresis control circuit 104 is according to the size of retarding window voltage-regulation operating frequency.
The operation principle of explained later sluggishness control device:
The operating frequency of Hysteresis control system is relevant with retarding window voltage, and the more big then operating frequency of retarding window voltage is more
Low, the more little then operating frequency of retarding window voltage is higher.So can realize system is worked by controlling retarding window size
The regulation of frequency.
Oscillating circuit 101 can adopt oscillator, for producing reference frequency f_ref.
Reference frequency f_ref that operating frequency fs of system is generated with oscillator is compared, and can pass through charge pump
Realizing, charge pump circuit 102 is preferably capacitive charge pump circuit 102 to circuit 102, and charge pump circuit 102 is to incoming frequency
It is output as an error voltage signal after being processed, reflect the relative size of fs and f_ref.For example, when fs is less than f_ref
Then charge pump circuit 102 output voltage reduces, and when fs is more than f_ref, then charge pump circuit 102 output voltage increases.
The error voltage of charge pump circuit 102 output delivers to retarding window generative circuit 103.Retarding window generative circuit
103 work in the following ways: increase when error voltage increases then retarding window voltage, when error voltage reduces then retarding window
Voltage reduces.
Hysteresis control circuit 104 carries out sluggish control according to retarding window voltage produced by retarding window generative circuit 103
System, exports the change of retarding window voltage by controlling retarding window generative circuit 103, generates corresponding operating frequency.
Present invention sluggishness control device is related to frequency, voltage, the mutual conversion between retarding window, shown in Figure 2,
The frequency error of fs and f_ref is converted to error voltage signal ve by charge pump circuit 102, and retarding window generative circuit 103 will
Error voltage signal ve is converted into the retarding window voltage parameter δ w of system, and system works according to the retarding window that δ w is limited
And naturally correspond to a system operating frequency fs.
The present invention sluggishness negative feedback control to frequency for the control device, refers to Fig. 3, for example for some reason, system
Operating frequency fs exceedes reference frequency f_ref of setting, then error voltage ve increases, and ve increase then leads to retarding window δ w to increase
Greatly, retarding window δ w increase then can lead to operating frequency fs of system to reduce.Therefore, the work of final system under steady state conditions, a reactor
Working frequency fs is basically identical with reference frequency f_ref.
The advantage of embodiment of the present invention sluggishness control device and control method is: applied widely, can be applicable to all opening up
Flutter the Switching Power Supply of form or led drives, also apply be applicable to other Hysteresis control systems, be not limited in field of power supplies.This
Bright embodiment realizes circuit simply, can be convenient to use standard cmos technique and realize.The embodiment of the present invention achieves real consolidating
Determine FREQUENCY CONTROL, system peripherals component parameters are changed insensitive during to FREQUENCY CONTROL.
A kind of another kind of embodiment of the sluggish control device of fixed frequency of the present invention, refers to Fig. 4, described sluggish control
Device also includes voltage collection circuit 105 and the first gate-controlled switch s1；The input of voltage collection circuit 105 connects input voltage
Source, the output end of voltage collection circuit 105 connects the input of hysteresis control circuit 104 and the input of the first gate-controlled switch s1
End, voltage collection circuit 105 provides the first reference voltage to hysteresis control circuit 104；The output end of hysteresis control circuit 104 is even
Connect the control end of the first gate-controlled switch s1, the output head grounding of the first gate-controlled switch s1, hysteresis control circuit 104 passes through control the
The closed and disconnected of one gate-controlled switch s1 adjusts the first reference voltage of voltage collection circuit 105 output, and the first benchmark is electric
Pressure and retarding window voltage are compared with the size of adjustment work frequency.
Voltage collection circuit 105 can combining using divider resistance or resistance and operational amplifier, input for collection
Voltage source simultaneously draws the first reference voltage and is sent to hysteresis control circuit 104, and hysteresis control circuit 104 is according to the first benchmark electricity
Pressure and retarding window voltage are compared to control the output of operating frequency.
The output end of sluggish control device connects the control end of the first gate-controlled switch s1, and sluggish control device passes through control the
The turn-on and turn-off of one gate-controlled switch s1 control the operating frequency of output system.
A kind of another kind of embodiment of the sluggish control device of fixed frequency of the present invention, retarding window generative circuit 103 wraps
Include voltage and halve circuit 106, amplifier adder and amplifier subtracter, the input that voltage halves circuit 106 is retarding window
The input of generative circuit 103, voltage halves the first input end of output end connection amplifier adder and the amplifier subtraction of circuit
Second input of the first input end of device, the second input of amplifier adder and amplifier subtracter connects the second benchmark electricity
Pressure, the output end of amplifier adder constitutes the first output end of retarding window generative circuit 103, the output end structure of amplifier subtracter
Become the second output end of retarding window generative circuit 103.
Hysteresis control circuit 104 includes voltage comparator cmp, the second gate-controlled switch s2, the 3rd gate-controlled switch s3 and anti-
The input of phase device inv, the second gate-controlled switch s2 connects the first output end of retarding window generative circuit 103, and second controlled opens
The output end closing s2 connects the in-phase input end of voltage comparator cmp, and the control end of the second gate-controlled switch s2 connects phase inverter inv
Output end, the input of phase inverter inv connects the output end of voltage comparator cmp, and the input of the 3rd gate-controlled switch s3 is even
Connect the second output end of retarding window generative circuit 103, the output end of the 3rd gate-controlled switch s3 connects the same of voltage comparator cmp
Phase input, the control end of the 3rd gate-controlled switch s3 connects the output end of voltage comparator cmp, and voltage comparator cmp's is anti-phase
Input connects the first reference voltage, and the output end of voltage comparator cmp is the output end of hysteresis control circuit 104.
Voltage collection circuit 105 includes first resistor r1, second resistance r2,3rd resistor r3, the first operational amplifier opa
And the first FET m1, input voltage source connects the first end of first resistor r1 and the first end of second resistance r2, and first
Second end of resistance r1 connects the in-phase input end of the first operational amplifier opa, and the second end of first resistor r1 connects first can
The input of control switch s1, the second end of second resistance r2 connects the inverting input of the first operational amplifier opa and first
The source electrode of effect pipe m1, the output end of the first operational amplifier opa connects the grid of the first FET m1, the first FET
The drain electrode of m1 connects the first end of 3rd resistor r3 and the inverting input of voltage comparator cmp, the second end of 3rd resistor r3
Ground connection.
One specific embodiment of charge pump circuit 102, refers to Fig. 5, and constant-current source above is according to the frequency of system frequency fs
Rate is passed through to control the 4th gate-controlled switch s4 with fixed pulse width, electric capacity c1 to be charged in each cycle ts, following constant-current source
Frequency according to reference frequency f_ref is passed through to control the 5th gate-controlled switch s5 with fixed pulse width in each cycle t_ref
Electric capacity c1 is discharged.Wherein, ts=1/fs, t_ref=1/f_ref.Therefore, charge pump circuit 102 shown in Fig. 6 can realize right
The difference on the frequency of two input frequency signals is integrated, and is converted to error voltage signal.
Foregoing circuit is to may be constructed a kind of sluggish buck led drive circuit controlling.Wherein, also include loading led
Lamp, inductance l and fly-wheel diode d1, the anode of led connects the second end of first resistor r1, and negative electrode connects the first of inductance l
End, second end of inductance l connects the first end of described first gate-controlled switch and the anode of fly-wheel diode d1, fly-wheel diode d1
Negative electrode connect first resistor r1 first end, it is easy to show that, the operating frequency expression formula of system is as follows:
Expression above reflects the corresponding relation of system operating frequency fs and retarding window δ w.Retarding window is bigger
Then system operating frequency is lower, and the more little then system operating frequency of retarding window is higher.
As shown in fig. 6, the first operational amplifier opa, the first FET m1, first resistor r1 and second resistance r2 etc.
The current detection circuit detection inductive current constituting, and it is converted into voltage the first reference voltage vsen via resistance r3, by first
Reference voltage vsen delivers to the reverse input end of voltage comparator cmp.The positive input of voltage comparator cmp connects retarding window
The voltage that generative circuit 103 is generated.When voltage comparator cmp is output as high level, voltage comparator cmp positive input
Meet the top vref+1/2 with voltage δ v of retarding window voltage, the high level of voltage comparator cmp output makes the first gate-controlled switch
S1 turns on, and because the conducting of the first gate-controlled switch s1 makes the electric current flowing through first resistor r1 increase, makes voltage acquisition electricity further
First reference voltage vsen of road 105 output raises, because the first reference voltage vsen connects the anti-phase defeated of voltage comparator cmp
Enter end, therefore make voltage comparator cmp output low level, when voltage comparator cmp is output as low level, voltage comparator
Cmp positive input meets voltage vref-1/2 δ v, and the low level of now voltage comparator cmp output makes the first gate-controlled switch s1
Disconnect, so that the electric current flowing through first resistor r1 is reduced, make the first reference voltage vsen of voltage collection circuit 105 output further
Reduce, therefore make voltage comparator cmp output high level.
Voltage comparator cmp output signal delivers to the first gate-controlled switch s1 in order to the conducting of control system and shutoff, simultaneously
The frequency of voltage comparator output signal is operating frequency fs of system, and fs is delivered to charge pump with reference frequency f_ref simultaneously
Circuit 102 compares, and generates error voltage δ v, and error voltage δ v is used for the retarding window of initialization system.
When fs is higher than f_ref, charge pump circuit 102 output voltage δ v increases, and therefore retarding window δ w increases, according to
Frequency expression, δ w increase will lead to fs to reduce.Conversely, when fs is less than f_ref, charge pump circuit 102 output voltage δ v
Reduce, therefore retarding window δ w reduces, according to frequency expression, δ w reduction will lead to fs to increase, system under final stable state
Operating frequency is stablized in f_ref.
A kind of a kind of embodiment of the sluggish control method of fixed frequency of the present invention, refers to Fig. 7, comprises the following steps:
S201, charge pump circuit generate error voltage signal according to reference frequency and operating frequency；
Described error voltage signal is converted into retarding window voltage by s202, retarding window generative circuit；
The size of s203, hysteresis control circuit operating frequency according to described retarding window voltage-regulation.
The step of described s201, will be described particularly as follows: obtaining difference on the frequency after being compared reference frequency and operating frequency
Difference on the frequency is converted into error voltage signal after being integrated.
The step of described s202 particularly as follows:
Described error voltage △ v is carried out obtaining branch pressure voltage 1/2 δ v after partial pressure；
The upper of described retarding window voltage is obtained after second reference voltage vref is added with described branch pressure voltage 1/2 δ v
Sideband voltage vref+1/2 δ v；
Obtain under described retarding window voltage after second reference voltage vref and described branch pressure voltage 1/2 δ v is subtracted each other
Sideband voltage vref-1/2 δ v.
The step of described s203 particularly as follows:
Obtain the first reference voltage by gathering input voltage；
Described first reference voltage is compared with described retarding window voltage, and described work is adjusted according to comparative result
The size of working frequency.
Described described first reference voltage is compared with described retarding window voltage, and according to comparative result adjust institute
State the step of the size of operating frequency particularly as follows:
When the top that described first reference voltage is less than described retarding window voltage is with voltage or with voltage below, control
Described first reference voltage increases, and makes described first reference voltage with voltage or following more than the top of described retarding window voltage
With voltage；
When the top that described first reference voltage is more than described retarding window voltage is with voltage or with voltage below, control
Described first reference voltage reduces, and makes described first reference voltage with voltage or following less than the top of described retarding window voltage
With voltage.
The comparison adjustment work with voltage or with voltage below of top by the first reference voltage and retarding window voltage
The output size of frequency fs.
When operating frequency fs is higher than reference frequency f_ref, charge pump circuit 102 output error voltage δ v increases, therefore
Retarding window δ w increases, and according to frequency expression, δ w increase will lead to operating frequency fs to reduce.Conversely, when fs is less than f_ref
When, charge pump circuit 102 output voltage δ v reduces, and therefore retarding window δ w reduces, and according to frequency expression, δ w reduces will
Fs is led to increase, under final stable state, operating frequency fs of system is stablized in f_ref.
The advantage of embodiment of the present invention sluggishness control method is: applied widely, can be applicable to opening of all topological form
Close power supply or led drives, also apply be applicable to other Hysteresis control systems, be not limited in field of power supplies it is achieved that real consolidates
Determine FREQUENCY CONTROL, system peripherals component parameters are changed insensitive during to FREQUENCY CONTROL.
Above content is to further describe it is impossible to assert with reference to specific preferred embodiment is made for the present invention
Being embodied as of the present invention is confined to these explanations.For general technical staff of the technical field of the invention,
Without departing from making some equivalent substitutes or obvious modification on the premise of present inventive concept, and performance or purposes are identical, all should
It is considered as belonging to the scope of patent protection that the present invention is determined by the claims submitted to.
Claims (9)
1. a kind of sluggish control device of fixed frequency is it is characterised in that include: oscillating circuit, charge pump circuit, retarding window
Generative circuit and hysteresis control circuit；
The output end of described oscillating circuit connects the input of described charge pump circuit, and described oscillating circuit is used for described electric charge
Pump circuit output reference frequency；
The input of described charge pump circuit connects the output end of described hysteresis control circuit, and output end connects described retarding window
The input of generative circuit, described charge pump circuit receives the operating frequency of described hysteresis control circuit output, described charge pump
Circuit generates error voltage signal according to the described operating frequency receiving and described reference frequency and is sent to described sluggishness window
Mouth generative circuit, wherein, charge pump circuit is integrated to the difference on the frequency of described operating frequency and described reference frequency, and changes
For error voltage signal；
The output end of described retarding window generative circuit connects the input of described hysteresis control circuit, and described retarding window generates
Described error voltage signal is converted into retarding window voltage and is sent to described hysteresis control circuit by circuit；
The size of described hysteresis control circuit operating frequency according to described retarding window voltage-regulation.
2. sluggishness control device as claimed in claim 1 controlled is opened it is characterised in that also including voltage collection circuit and first
Close；
The input of described voltage collection circuit connects input voltage source, and the output end connection of described voltage collection circuit is described late
The input of stagnant control circuit and the input of described first gate-controlled switch, described voltage collection circuit is to described sluggish control electricity
Road provides the first reference voltage；
The output end of described hysteresis control circuit connects the control end of described first gate-controlled switch, described first gate-controlled switch defeated
Go out end ground connection, described hysteresis control circuit passes through to control the closed and disconnected of described first gate-controlled switch to adjust described voltage acquisition
First reference voltage of circuit output, and described first reference voltage and described retarding window voltage are compared to adjust
State the size of operating frequency.
3. sluggishness control device as claimed in claim 2 is it is characterised in that described retarding window generative circuit includes voltage and subtracts
Half circuit, amplifier adder and amplifier subtracter, the input that described voltage halves circuit is that described retarding window generates electricity
The input on road, described voltage halves the first input end of the output end described amplifier adder of connection of circuit and described amplifier subtracts
Second input of the first input end of musical instruments used in a Buddhist or Taoist mass, the second input of described amplifier adder and described amplifier subtracter connects the
Two reference voltages, the output end of described amplifier adder constitutes the first output end of described retarding window generative circuit, described fortune
The output end putting subtracter constitutes the second output end of described retarding window generative circuit.
4. sluggishness control device as claimed in claim 3 is it is characterised in that described hysteresis control circuit includes voltage ratio relatively
Device, the second gate-controlled switch, the 3rd gate-controlled switch and phase inverter, the input of described second gate-controlled switch connects described sluggishness window
First output end of mouth generative circuit, the output end of described second gate-controlled switch connects the homophase input of described voltage comparator
End, the control end of described second gate-controlled switch connects the output end of described phase inverter, and the input connection of described phase inverter is described
The output end of voltage comparator, the input of described 3rd gate-controlled switch connects the second output of described retarding window generative circuit
End, the output end of described 3rd gate-controlled switch connects the in-phase input end of described voltage comparator, described 3rd gate-controlled switch
Control end connects the output end of described voltage comparator, and the inverting input of described voltage comparator connects described first benchmark electricity
Pressure, the output end of described voltage comparator is the output end of described hysteresis control circuit.
5. as claimed in claim 4 sluggishness control device it is characterised in that described voltage collection circuit include first resistor,
Second resistance, 3rd resistor, the first operational amplifier and the first FET, described input voltage source connects described first electricity
The first end of resistance and the first end of second resistance, the second end of described first resistor connects the homophase of described first operational amplifier
Input, the second end of described first resistor connects the input of described first gate-controlled switch, the second end of described second resistance
Connect the inverting input of described first operational amplifier and the source electrode of described first FET, described first operational amplifier
Output end connect the grid of described first FET, the drain electrode of described first FET connects the of described 3rd resistor
One end and the inverting input of described voltage comparator, the second end ground connection of described 3rd resistor.
6. a kind of control method of the sluggish control device based on fixed frequency as claimed in claim 1 is it is characterised in that wrap
Include following steps:
Charge pump circuit generates error voltage signal according to reference frequency and operating frequency；
Described error voltage signal is converted into retarding window voltage by retarding window generative circuit；
The size of hysteresis control circuit operating frequency according to described retarding window voltage-regulation；
Described charge pump circuit generates the step of error voltage signal according to reference frequency and operating frequency particularly as follows: by benchmark frequency
Rate and operating frequency obtain difference on the frequency after being compared, and are converted into error voltage signal after described difference on the frequency is integrated.
7. sluggishness control method as claimed in claim 6 is it is characterised in that described retarding window generative circuit is by described error
Voltage signal be converted into retarding window voltage step particularly as follows:
Described error voltage is carried out obtaining branch pressure voltage after partial pressure；
The top obtaining described retarding window voltage with described branch pressure voltage after second reference voltage is added is with voltage；
The with voltage below of described retarding window voltage is obtained with described branch pressure voltage after second reference voltage is subtracted each other.
8. sluggishness control method as claimed in claim 7 is it is characterised in that described hysteresis control circuit is according to described sluggishness window
The step of the size of operating frequency described in mouthful voltage-regulation particularly as follows:
Obtain the first reference voltage by gathering input voltage；
It is compared with voltage with the top of described retarding window voltage for described first reference voltage or with voltage below, and root
Adjust the size of described operating frequency according to comparative result.
9. sluggishness control method as claimed in claim 8 is it is characterised in that described will be slow with described for described first reference voltage
Stagnant window voltage is compared, and according to comparative result adjust described operating frequency size step particularly as follows:
When the top that described first reference voltage is less than described retarding window voltage is with voltage or with voltage below, control described
First reference voltage increases, and makes described first reference voltage with voltage or powered below more than the top of described retarding window voltage
Pressure；
When the top that described first reference voltage is more than described retarding window voltage is with voltage or with voltage below, control described
First reference voltage reduces, and makes described first reference voltage with voltage or powered below less than the top of described retarding window voltage
Pressure.
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