CN104793418A - Array substrate and manufacturing method thereof and display device - Google Patents
Array substrate and manufacturing method thereof and display device Download PDFInfo
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- CN104793418A CN104793418A CN201510220036.5A CN201510220036A CN104793418A CN 104793418 A CN104793418 A CN 104793418A CN 201510220036 A CN201510220036 A CN 201510220036A CN 104793418 A CN104793418 A CN 104793418A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133528—Polarisers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/1336—Illuminating devices
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/1336—Illuminating devices
- G02F1/133614—Illuminating devices using photoluminescence, e.g. phosphors illuminated by UV or blue light
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/36—Micro- or nanomaterials
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- Nonlinear Science (AREA)
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses an array substrate and a manufacturing method thereof and a display device which are used for solving the problems that in the prior art, the brightness of a displayer is reduced due to a lower polaroid, and air leakage is caused due to the fact that a clearance exists on the lower polaroid. The array substrate comprises a first lining substrate body, grid lines, data lines and pixel units arranged in a matrix mode, the grid lines and the data lines are distributed on the first lining substrate body in a cross mode, the pixel units are separated out by the grid lines and the data lines, thin film transistors and pixel electrodes are arranged in the pixel units, and the thin film transistors comprise grid electrodes, grid insulation layers, active layers, source electrodes and drain electrodes. The array substrate further comprises a nanorod material layer for converting light emitted out of a backlight source into polarized light.
Description
Technical field
The present invention relates to technical field of liquid crystal display, particularly relate to a kind of array base palte and preparation method thereof and display device.
Background technology
Current display panels mainly comprises: array base palte, color membrane substrates and the liquid crystal layer between array base palte and color membrane substrates, see Figure 1A and Figure 1B, wherein Figure 1B is the sectional view along dotted line A1-A2 direction in Figure 1A, this array base palte comprises: substrate 101, be positioned at the grid 102 above substrate, be positioned at the gate insulation layer 103 above described grid, be positioned at the active layer 104 above described gate insulation layer 103, be positioned at the signal line layer 105 (comprising source electrode and the drain electrode of the setting of same layer) above described active layer 104, be positioned at the insulation course 106 above described signal line layer 105, and be positioned at above described insulation course 106, and by the via hole 107 that runs through insulation course 106 and the described pixel electrode 108 be electrically connected that drains.The key step making described display panels comprises: make array base palte and color membrane substrates, and array substrate and color membrane substrates carry out box technique; To in box technique, first respectively alignment film printing and light orientation process are carried out to described array base palte and color membrane substrates, then between array base palte and color membrane substrates, liquid crystal is injected, and use sealed plastic box to seal, finally cut into single panel also by sticking the orthogonal polaroid in polarization direction to form display panels in the both sides up and down of this single panel, wherein, the described polaroid be arranged on above color membrane substrates is called polaroid (CF POL), described in the polaroid be arranged on below array base palte be called lower polaroid (TFT POL).
But because a polaroid light that allowable vibration direction is parallel with its axis of homology direction passes through, therefore, backlight has the loss of 50% after by described lower polaroid, makes the brightness of liquid crystal display reduce.And, due to the requirement in polaroid manufacture craft, current manufacturer can provide the upper polaroid required for oversize TV product, but is difficult to meet lower polaroid (TFT POL) demand dimensionally, needs the making that could be realized lower polaroid by connecting method.But cut and attach the restriction of precision due to polaroid, lower polaroid can not realize perfect splicing, there is gap 201 in the lower polaroid by being spliced to form, as shown in Figure 2, therefore, inevitably there is light leakage phenomena in stitching portion, cause liquid crystal display to show bad.
Summary of the invention
Embodiments provide a kind of array base palte and preparation method thereof and display device, reduce in order to solve the display brightness caused because of lower polaroid in prior art and cause the problem of light leak owing to there is gap on lower polaroid.
Embodiments provide a kind of array base palte, described array base palte comprises the first underlay substrate, the grid line of arranged crosswise, data line and the pixel cell arranged in matrix that marked off by described grid line and data line on described first underlay substrate, be provided with thin film transistor (TFT) and pixel electrode in described pixel cell, described thin film transistor (TFT) comprises grid, gate insulation layer, active layer, source electrode and drain electrode; The described array base palte light also comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light.
In the embodiment of the present invention, because the array base palte light also comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light, because nanorod structure has directivity, linear polarization transmitting can be carried out, therefore the light through this layer almost all can be converted into polarized light by the nano-bar bed of material, the light loss caused because adopting polaroid can being avoided, improving the utilization factor of light, to realize the array base palte with high brightness, high colour gamut; Further, owing to there is not gap in this layer, effectively can solving the leakage problem caused because there is gap in lower polaroid, improving the contrast of display panel.
Preferably, the described nano-bar bed of material be arranged on described first underlay substrate towards or the side of described thin film transistor (TFT) dorsad.
Because described first underlay substrate surface ratio is more smooth, be conducive to nano-bar material and grow above it with the better nano-bar bed of material of forming property.
Preferably, described array base palte also comprises the protective seam of the side of the first underlay substrate being dorsad arranged on the described nano-bar bed of material.
By the protective seam that the side of the first underlay substrate dorsad at the described nano-bar bed of material is arranged, can the nano-bar bed of material described in available protecting in follow-up manufacture craft from damage.
Preferably, described array base palte also comprises the quantum dot layer be arranged on below the described nano-bar bed of material.
When backlight is blue light backlight, by this quantum dot layer, the blue light that described blue light backlight sends is converted into white light, for display panel provides white light source.
Preferably, the described nano-bar bed of material adopts zinc-oxide nano bar material.
Because zinc paste is semiconductor material with wide forbidden band, its energy gap is 3.37eV, and exciton binding energy, up to 600meV, has excellent optics and electrology characteristic, therefore adopts zinc-oxide nano bar material to make the utilization factor that the described nano-bar bed of material can improve light; In addition, zinc oxide material abundance, cheap, be conducive to reducing production cost.In addition, the described nano-bar bed of material can also adopt other semiconductor material with wide forbidden band such as titania.
Preferably, the thickness of the described nano-bar bed of material is 20 ~ 40 μm.
In present manufacture craft, usual employing pulsed laser deposition or vapour deposition make described zinc-oxide nano layer or nano titania layer, the directive bar-shaped zinc oxide nano rod layer of tool that nanorod length is 0.5 ~ 3 μm, diameter is 50 ~ 100nm is produced by control temperature, time and pressure, in view of the size of this nanometer rods, this layer thickness is arranged in 20 ~ 40 μm, can ensure fully to be converted into polarized light by the light of this layer, also can not affect the transmitance of light because this layer thickness is too thick.
Preferably, the described nano-bar bed of material at least covers the viewing area of described array base palte.
When the described nano-bar bed of material covers the viewing area of described array base palte, be conducive to transmitance and the utilization factor of the light improving viewing area, improve the brightness of viewing area.In addition, the described nano-bar bed of material can also cover viewing area and the non-display area of array base palte simultaneously.
Preferably, described array base palte also comprises passivation layer, and described passivation layer is arranged on the top of described thin film transistor (TFT) place layer.
By arranging the passivation layer covering described thin film transistor (TFT) above the layer of described thin film transistor (TFT) place, can available protecting thin film transistor (TFT) in follow-up technique from damage, ensure that thin film transistor (TFT) has good electrology characteristic.
Embodiments provide a kind of display device, described display device comprises above-mentioned array base palte.
Embodiments provide a kind of method for making of array base palte, described method comprises:
First underlay substrate is formed the figure comprising the nano-bar bed of material, and the light that the described nano-bar bed of material is used for backlight to send is converted into polarized light;
The described substrate comprising the figure of the nano-bar bed of material is formed the figure comprising thin film transistor (TFT) and pixel electrode.
The array base palte that the method provided by the embodiment of the present invention is made, the light comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light, because nanorod structure has directivity, linear polarization transmitting can be carried out, therefore the light through this layer almost all can be converted into polarized light by the nano-bar bed of material, the light loss caused because adopting polaroid can being avoided, improving the utilization factor of light, to realize the array base palte with high brightness, high colour gamut; Further, owing to there is not gap in this layer, effectively can solving the leakage problem caused because there is gap in lower polaroid, improving the contrast of display panel.
Preferably, when the described nano-bar bed of material is arranged on the side towards described thin film transistor (TFT) of described first underlay substrate, described method also comprises:
Before formation comprises the figure of the nano-bar bed of material, form the figure comprising quantum dot layer in the side towards thin film transistor (TFT) of described first underlay substrate; And,
Protective seam is formed above the described substrate comprising nano-bar material layer pattern.
When backlight is blue light backlight, by this quantum dot layer, the blue light that described blue light backlight sends is converted into white light, for display panel provides white light source; Because the substrate comprising quantum dot layer is more smooth, be conducive to nano-bar material and grow with the better nano-bar bed of material of forming property above it; In addition, by forming protective seam above the described substrate comprising nano-bar material layer pattern, can the nano-bar bed of material described in available protecting in follow-up manufacture craft from damage.
Preferably, when the described nano-bar bed of material is arranged on the side of described dorsad thin film transistor (TFT) of described first underlay substrate, described method also comprises:
The figure comprising quantum dot layer is formed in the below of the described nano-bar bed of material;
Protective seam is formed in the below of described quantum dot layer.
Because described first underlay substrate surface ratio is more smooth, be conducive to nano-bar material and grow with the better nano-bar bed of material of forming property above it; And when backlight is blue light backlight, by this quantum dot layer, the blue light that described blue light backlight sends is converted into white light, for display panel provides white light source; In addition, by forming protective seam above the described substrate comprising nano-bar material layer pattern, can the nano-bar bed of material described in available protecting in follow-up manufacture craft from damage.
Preferably, zinc-oxide nano bar material is adopted to make the described nano-bar bed of material.
Because zinc paste is semiconductor material with wide forbidden band, its energy gap is 3.37eV, and exciton binding energy, up to 600meV, has excellent optics and electrology characteristic, therefore adopts zinc-oxide nano bar material to make the utilization factor that the described nano-bar bed of material can improve light; In addition, zinc oxide material abundance, cheap, be conducive to reducing production cost.In addition, the described nano-bar bed of material can also adopt other semiconductor material with wide forbidden band such as titania.
Preferably, the thickness of the described nano-bar bed of material is 20 ~ 40 μm.
In present manufacture craft, usual employing pulsed laser deposition or vapour deposition make described zinc-oxide nano layer, the directive bar-shaped zinc oxide nano rod layer of tool that nanorod length is 0.5 ~ 3 μm, diameter is 50 ~ 100nm is produced by control temperature, time and pressure, in view of the size of this nanometer rods, this layer thickness is arranged in 20 ~ 40 μm, can ensure fully to be converted into polarized light by the light of this layer, also can not affect the transmitance of light because this layer thickness is too thick.
Preferably, the described nano-bar bed of material at least covers the viewing area of described array base palte.
When the described nano-bar bed of material covers the viewing area of described array base palte, be conducive to transmitance and the utilization factor of the light improving viewing area, improve the brightness of viewing area.In addition, the described nano-bar bed of material can also cover viewing area and the non-display area of array base palte simultaneously.
Accompanying drawing explanation
Figure 1A is the planar structure schematic diagram of array base palte in prior art;
Figure 1B is the cross-sectional view along the array base palte in dotted line A1-A2 direction in Figure 1A;
The floor map of the polaroid formed by connecting method in Fig. 2 prior art;
The planar structure schematic diagram of the array base palte that Fig. 3 provides for the embodiment of the present invention one;
Fig. 4 is the cross-sectional view along the array base palte in dotted line B1-B2 direction in Fig. 3;
Fig. 5 is the planar structure schematic diagram of the array base palte comprising quantum dot layer;
Fig. 6 is the planar structure schematic diagram of the array base palte comprising protective seam;
The cross-sectional view of the array base palte that Fig. 7 provides for the embodiment of the present invention two;
The cross-sectional view of the array base palte that Fig. 8 provides for the embodiment of the present invention three;
The cross-sectional view of the array base palte that Fig. 9 provides for the embodiment of the present invention four;
The schematic flow sheet of the method for making of a kind of array base palte that Figure 10 provides for the embodiment of the present invention six;
The schematic flow sheet of the method for making of a kind of array base palte that Figure 11 provides for the embodiment of the present invention seven;
The schematic flow sheet of the method for making of a kind of array base palte that Figure 12 provides for the embodiment of the present invention eight;
The schematic flow sheet of the method for making of a kind of array base palte that Figure 13 provides for the embodiment of the present invention nine.
Embodiment
Embodiments provide a kind of array base palte and preparation method thereof and display device, reduce in order to solve the display brightness caused because of lower polaroid in prior art and cause the problem of light leak owing to there is gap on lower polaroid.
The embodiment of the present invention one provides a kind of array base palte, see Fig. 3 and Fig. 4; Described array base palte comprises: the first underlay substrate 301, the grid line 302 of arranged crosswise, data line 303 and the pixel cell arranged in matrix that marked off by described grid line 302 and data line 303 on described first underlay substrate 301, be provided with thin film transistor (TFT) 304 and pixel electrode 108 in described pixel cell, described thin film transistor (TFT) comprises grid 102, gate insulation layer 03, active layer 104, source electrode 309 and drain electrode 310; The described array base palte light also comprised for being sent by backlight is converted into the nano-bar bed of material 311 of polarized light.
Wherein, the described nano-bar bed of material 311 is arranged on the side towards described thin film transistor (TFT) of described first underlay substrate 301.Because the first underlay substrate 301 generally selects the good substrate of the planarization such as glass substrate or quartz base plate, when described first underlay substrate surface ratio is more smooth, is conducive to nano-bar material and grows above it with the better nano-bar bed of material of forming property.It is noted that this nano-bar bed of material can also be arranged on other layer of array base palte, its polarization can't be affected.
Further, the described nano-bar bed of material adopts zinc-oxide nano bar material or titanium dioxide nano-rod material.
Because zinc paste is semiconductor material with wide forbidden band, its energy gap is 3.37eV, and exciton binding energy, up to 600meV, has excellent optics and electrology characteristic, therefore adopts zinc-oxide nano bar material to make the utilization factor that the described nano-bar bed of material can improve light; In addition, zinc oxide material abundance, cheap, be conducive to reducing production cost.In addition, the described nano-bar bed of material can also adopt other semiconductor material with wide forbidden band such as titania.
Further, the thickness of the described nano-bar bed of material is 20 ~ 40 μm.
In present manufacture craft, usual employing pulsed laser deposition or vapour deposition make described zinc-oxide nano layer, the directive bar-shaped zinc oxide nano rod layer of tool that nanorod length is 0.5 ~ 3 μm, diameter is 50 ~ 100nm is produced by control temperature, time and pressure, in view of the size of this nanometer rods, this layer thickness is arranged in 20 ~ 40 μm, can ensure fully to be converted into polarized light by the light of this layer, also can not affect the transmitance of light because this layer thickness is too thick.
Further, the described nano-bar bed of material 311 at least covers the viewing area of described array base palte.
When the described nano-bar bed of material covers the viewing area of described array base palte, be conducive to transmitance and the utilization factor of the light improving viewing area, improve the brightness of viewing area.In addition, the described nano-bar bed of material can also cover viewing area and the non-display area of array base palte simultaneously.
Further, described array base palte also comprises passivation layer 312, and described passivation layer is arranged on the top of described thin film transistor (TFT) place layer.
By arranging the passivation layer covering described thin film transistor (TFT) above the layer of described thin film transistor (TFT) place, can available protecting thin film transistor (TFT) in follow-up technique from damage, ensure that thin film transistor (TFT) has good electrology characteristic.
Further, see Fig. 5, described array base palte also comprises the quantum dot layer 313 be arranged on below the described nano-bar bed of material, and described quantum dot layer is the quantum dot composite bed of different size.Due to quantum local effect, the quanta point material of single kind just can by the monochromatic light of varying sized generation different colours, therefore, in the present invention, quantum dot layer is receiving after backlight irradiates, and the blue light that sends of backlight is converted into white light and is supplied to display panel.
Further, see Fig. 6, described array base palte also comprises the protective seam 314 of the side of the first underlay substrate being dorsad arranged on the described nano-bar bed of material.
By the side of the first underlay substrate dorsad at the described nano-bar bed of material, protective seam is set, can the nano-bar bed of material described in available protecting in follow-up manufacture craft from damage.Described protective seam can adopt the insulation transparent such as monox or silicon nitride material.
The embodiment of the present invention two provides a kind of array base palte, see Fig. 7; Compared with the array base palte provided with the embodiment of the present invention one, in the array base palte that the embodiment of the present invention two provides, the nano-bar bed of material 311 is positioned at the below of described first underlay substrate, and namely the nano-bar bed of material 311 is arranged on the side of the thin film transistor (TFT) dorsad of the first underlay substrate 301.
Further, described array base palte also comprises the quantum dot layer 313 be positioned at below the described nano-bar bed of material 311, and its effect repeats no more herein.
Further, described array base palte also comprises the protective seam 314 be positioned at below described quantum dot layer 313, for the protection of described quantum dot layer in follow-up technique from damage.
Due to the restriction of present technique, make to operate when making quantum dot layer on described first underlay substrate more difficult, therefore, first can make described quantum dot layer on the substrate of blank, then the substrate comprising described quantum dot layer be sticked the below of the first underlay substrate.
The embodiment of the present invention three provides a kind of array base palte, see Fig. 8; Compared with the array base palte provided with the embodiment of the present invention one, in the array base palte that the embodiment of the present invention three provides, described quantum dot layer is formed on the second underlay substrate 315, and is placed on the below of the first underlay substrate 301 by the mode sticked.
The embodiment of the present invention four provides a kind of array base palte, see Fig. 9; Compared with the array base palte provided with the embodiment of the present invention one, in the array base palte that the embodiment of the present invention four provides, the described nano-bar bed of material 311, quantum dot layer 313 and protective seam 314 are all formed on the second underlay substrate 315, and are placed on the below of the first underlay substrate by the mode sticked; Wherein, described quantum dot layer 313 is positioned at above described second underlay substrate 315, and the described nano-bar bed of material 311 is positioned at the top of described quantum dot layer 313, and described protective seam 314 is positioned at the top of the described nano-bar bed of material 311.
It is noted that the described nano-bar bed of material can be arranged on any layer of array base palte, such as, the top of pixel electrode can also be arranged on, or arrange with layer with source electrode and draining.The various embodiments described above are only preferred embodiment, are not used for limiting the scope of the embodiment of the present invention, and all changes according to shape, structure, feature and the principle etc. described in present patent application scope and modification, all belong to the application protection domain of this patent.
The embodiment of the present invention five provides a kind of display device, and described display device comprises above-mentioned array base palte.Described display device can be: any product or parts with Presentation Function such as liquid crystal panel, Electronic Paper, oled panel, mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.
The embodiment of the present invention six provides a kind of method for making of array base palte, see Figure 10; Described method comprises:
Step 1001, the first underlay substrate is formed the figure comprising the nano-bar bed of material, and the light that the described nano-bar bed of material is used for backlight to send is converted into polarized light;
Step 1002, the described substrate comprising the figure of the nano-bar bed of material is formed the figure comprising thin film transistor (TFT) and pixel electrode.
The array base palte that the method provided by the embodiment of the present invention six is made, the light comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light, because nanorod structure has directivity, linear polarization transmitting can be carried out, therefore the light through this layer almost all can be converted into polarized light by the nano-bar bed of material, the light loss caused because adopting polaroid can being avoided, improving the utilization factor of light, to realize the array base palte with high brightness, high colour gamut; Further, owing to there is not gap in this layer, effectively can solving the leakage problem caused because there is gap in lower polaroid, improving the contrast of display panel.
Because the described nano-bar bed of material can be arranged on the top of described first underlay substrate, also can be arranged on the below of described first underlay substrate, but the method for making of correspondence is different.
Further, when the described nano-bar bed of material is arranged on the side towards described thin film transistor (TFT) of described first underlay substrate, described method also comprises:
Before formation comprises the figure of the nano-bar bed of material, form the figure comprising quantum dot layer in the side towards thin film transistor (TFT) of described first underlay substrate; And,
Protective seam is formed above the described substrate comprising nano-bar material layer pattern.
Further, when the described nano-bar bed of material is arranged on the side of described dorsad thin film transistor (TFT) of described first underlay substrate, described method also comprises:
The figure comprising quantum dot layer is formed in the below of the described nano-bar bed of material;
Protective seam is formed in the below of described quantum dot layer.
For the array base palte that the embodiment of the present invention one provides, see Figure 11; The embodiment of the present invention seven gives its method for making, comprising:
Step 1101, forms the figure comprising quantum dot layer above described first underlay substrate.
Step 1102, comprises the figure of the nano-bar bed of material the described upper shape comprising the substrate of the figure of quantum dot layer.
Step 1103, at the described upper formation protective seam comprising the substrate of the figure of the nano-bar bed of material.
Step 1104, forms the figure comprising thin film transistor (TFT) above described protective seam.Wherein, described formation comprises the figure of transistor, specifically comprises:
One, formed above protective seam and comprise the figure of grid, specifically comprise: first on underlay substrate, (can be transparent glass substrate or quartz base plate), adopt the method for sputtering or thermal evaporation successively deposit thickness be about
metallic diaphragm and photoresist.Grid is formed by single exposure development, etching and stripping technology.Described metallic diaphragm can be at least two kinds of alloys formed in the metallic diaphragms such as cadmium Cr, tungsten W, titanium Ti, thallium Ta and molybdenum Mo or above-mentioned metal, can be single-layer metal rete also can be multiple layer metal rete;
Two, on the described substrate comprising the figure of grid, form the figure comprising gate insulation layer.Specifically comprise: on the substrate of figure comprising grid, successive sedimentation thickness is
insulation material layer, this insulation course is gate insulation layer; This gate insulation layer adopts the insulating material such as monox or silicon nitride;
Three, on the described substrate comprising the figure of gate insulation layer, form the figure including active layer.Specifically comprise: deposited amorphous silicon materials on the substrate of figure comprising gate insulation layer, and utilize active layer mask plate to form the figure including active layer.
Four, on the described substrate including the figure of active layer, form the figure comprising source electrode and drain electrode.Specifically comprise: adopt the method for sputtering or thermal evaporation to deposit a metallic diaphragm and photoresist successively.Signal line layer is formed by single exposure development, etching and stripping technology; Described metallic diaphragm can be at least two kinds of alloys formed in the metallic diaphragms such as cadmium Cr, tungsten W, titanium Ti, thallium Ta and molybdenum Mo or above-mentioned metal, can be single-layer metal rete also can be multiple layer metal rete.
Five, the described substrate comprising the figure of source electrode and drain electrode is formed the figure comprising passivation layer.Specifically comprise: by PECVD method successive sedimentation thickness be
insulation material layer and photoresist layer, and formed by the technique such as single exposure, development, etching and stripping and run through this passivation layer, be provided for the via hole that drain electrode in signal line layer and pixel electrode realize being electrically connected; This insulation course adopts the insulating material such as monox or silicon nitride to be formed.
Step 1105, the described substrate comprising the figure of thin film transistor (TFT) forms pixel electrode, specifically comprises: be about by the upper thickness of method deposition of sputtering or thermal evaporation
transparency conducting layer rete and photoresist layer.By forming pixel electrode after single exposure, development and the technique such as etching and stripping.Described pixel electrode can be ITO or IZO, or other transparent metal oxide.
For the array base palte that the embodiment of the present invention two provides, see Figure 12, the embodiment of the present invention eight gives its method for making, comprising:
Step 1201, in the below of described first underlay substrate, namely the first underlay substrate is formed and comprises the figure of the nano-bar bed of material in the side of thin film transistor (TFT) dorsad.
Step 1202, forms in the described below comprising the substrate of the figure of the nano-bar bed of material figure comprising quantum dot layer.
Step 1203, forms protective seam in the described below comprising the substrate of the figure of quantum dot layer.
Step 1204, is formed and comprises the figure of thin film transistor (TFT) above described first underlay substrate, and comprise the step forming grid, gate insulation layer, active layer, source electrode, drain electrode and passivation layer, specific embodiment repeats no more herein.
Step 1205, the described substrate comprising the figure of thin film transistor (TFT) is formed the figure comprising pixel electrode.
For the array base palte that the embodiment of the present invention four provides, see Figure 13, the embodiment of the present invention nine gives a kind of method making array base palte, comprising:
Step 1301, described first underlay substrate is formed the figure comprising film crystal.
Step 1302, the described substrate comprising the figure of film crystal is formed the figure comprising pixel electrode.
Step 1303, described second underlay substrate is formed the figure comprising quantum dot layer.
Step 1304, the described substrate comprising the figure of quantum dot layer is formed the figure comprising the nano-bar bed of material.
Step 1305, the described substrate comprising the figure of the nano-bar bed of material is formed the figure comprising protective seam.
Step 1306, sticks on the below of described first underlay substrate by the described image substrate comprising protective seam.
It is noted that in the method for making of array base palte that provides of the embodiment of the present invention eight and nine, the step forming thin film transistor (TFT) and pixel electrode can prior to forming the step of the nano-bar bed of material, quantum dot layer and protective seam.
To sum up, a kind of array base palte and preparation method thereof and display device is embodiments provided; Wherein, the described array base palte light also comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light, because nanorod structure has directivity, linear polarization transmitting can be carried out, therefore the light through this layer almost all can be converted into polarized light by the nano-bar bed of material, the light loss caused because adopting polaroid can being avoided, improving the utilization factor of light, to realize the array base palte with high brightness, high colour gamut; Further, owing to there is not gap in this layer, effectively can solving the leakage problem caused because there is gap in lower polaroid, improving the contrast of display panel.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (15)
1. an array base palte, described array base palte comprises the first underlay substrate, the grid line of arranged crosswise, data line and the pixel cell arranged in matrix that marked off by described grid line and data line on described first underlay substrate, thin film transistor (TFT) and pixel electrode is provided with in described pixel cell, described thin film transistor (TFT) comprises grid, gate insulation layer, active layer, source electrode and drain electrode, it is characterized in that, the described array base palte light also comprised for being sent by backlight is converted into the nano-bar bed of material of polarized light.
2. array base palte as claimed in claim 1, is characterized in that, the described nano-bar bed of material be arranged on described first underlay substrate towards or the side of described thin film transistor (TFT) dorsad.
3. array base palte as claimed in claim 2, it is characterized in that, described array base palte also comprises the protective seam of the side of the first underlay substrate being dorsad arranged on the described nano-bar bed of material.
4. array base palte as claimed in claim 1, it is characterized in that, described array base palte also comprises the quantum dot layer be arranged on below the described nano-bar bed of material.
5. array base palte as claimed in claim 1, is characterized in that, the described nano-bar bed of material adopts zinc-oxide nano bar material or titanium dioxide nano-rod material.
6. array base palte as claimed in claim 5, it is characterized in that, the thickness of the described nano-bar bed of material is 20 ~ 40 μm.
7. array base palte as claimed in claim 1, it is characterized in that, the described nano-bar bed of material at least covers the viewing area of described array base palte.
8. array base palte as claimed in claim 1, it is characterized in that, described array base palte also comprises passivation layer, and described passivation layer is arranged on the top of described thin film transistor (TFT) place layer.
9. a display device, is characterized in that, described display device comprises the array base palte described in the arbitrary claim of claim 1 ~ 8.
10. a method for making for array base palte, is characterized in that, described method comprises:
First underlay substrate is formed the figure comprising the nano-bar bed of material, and the light that the described nano-bar bed of material is used for backlight to send is converted into polarized light;
The described substrate comprising the figure of the nano-bar bed of material is formed the figure comprising thin film transistor (TFT) and pixel electrode.
11. methods as claimed in claim 10, is characterized in that, when the described nano-bar bed of material is arranged on the side towards described thin film transistor (TFT) of described first underlay substrate, described method also comprises:
Before formation comprises the figure of the nano-bar bed of material, form the figure comprising quantum dot layer in the side towards thin film transistor (TFT) of described first underlay substrate; And,
Protective seam is formed above the described substrate comprising nano-bar material layer pattern.
12. methods as claimed in claim 10, is characterized in that, when the described nano-bar bed of material is arranged on the side of described dorsad thin film transistor (TFT) of described first underlay substrate, described method also comprises:
The figure comprising quantum dot layer is formed in the below of the described nano-bar bed of material;
Protective seam is formed in the below of described quantum dot layer.
13. methods as claimed in claim 10, is characterized in that, adopt zinc-oxide nano bar material or titanium dioxide nano-rod material to make the described nano-bar bed of material.
14. methods as claimed in claim 13, is characterized in that, the thickness of the described nano-bar bed of material is 20 ~ 40 μm.
15. methods as claimed in claim 10, it is characterized in that, the described nano-bar bed of material at least covers the viewing area of described array base palte.
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