CN104793129A - Auxiliary circuit design method adopting EMMI for chip static leakage detection - Google Patents
Auxiliary circuit design method adopting EMMI for chip static leakage detection Download PDFInfo
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- CN104793129A CN104793129A CN201510222506.1A CN201510222506A CN104793129A CN 104793129 A CN104793129 A CN 104793129A CN 201510222506 A CN201510222506 A CN 201510222506A CN 104793129 A CN104793129 A CN 104793129A
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Abstract
The invention discloses an auxiliary circuit design method adopting an EMMI for chip static leakage detection. The method includes 1, dividing an integrated circuit chip into N unit modules according to circuit functions; 2, setting N PN junction diodes according to the number of the unit modules; 3, arranging module current copying and amplifying circuit according to the unit modules, and allowing the module current copying and amplifying circuits to connect to corresponded unit modules and diodes respectively. The failures, of the type, detected by the EMMI rarely are converted into PN junction hole electron recombination current which can be detected by the EMMI easily, and the failure type, resulting in current change once, of failure samples can be detected by the EMMI; meanwhile, the detecting flexibility of the EMMI during failure analysis is improved equivalently.
Description
Technical field
The invention belongs to integrated circuit (IC) design field, be specifically related to a kind of method for designing utilizing the auxiliary circuit of EMMI detection chip static leakage.
Background technology
EMMI (Emission Microscope, low-light microscope) is a kind of for analysing integrated circuits design or the failure analysis instrument of manufacturing process fault.When it is by catching integrated circuit operation, the photon that produces reflects the roughly working condition of chip internal, thus the roughly position of breaking down, positioning chip inside.Illustrate: in integrated circuits, the compound in electronics and hole can cause the transmitting of photon, so apply bias voltage to a PN junction, now the electronics of N is easy to be diffused into P, and the hole of P also easily diffuses to N, produces the compound in electronics and hole.
Because the image-forming principle of EMMI is the seizure of microscope for photon, so, use the prerequisite of EMMI analysis chip internal circuit failure, be on the position that occurs of fault, create the transmitting of photon.This working mechanism, determines EMMI and has good capturing ability for the fault of these types following: junction leakage (Junction Leakage), contact burr (Contact spiking), thermoelectronic effect (Hot electrons), latch-up (Latch-Up), oxide layer electric leakage (Gate oxide defects/Leakage (F-N current)), polysilicon whisker (Poly-silicon filaments), substrate damage (Substrate damage) etc.But, the fault of photo emissions cannot be produced for some, even if these faults may produce huge electric leakage, EMMI also cannot be captured, and these fault types mainly contain: Ohmic contact, metal interconnection short circuit, surface inversion layer, silicon conductive path etc.
In addition, even if EMMI is good at the fault type caught, when the order of magnitude of leakage current is very low, the photon that also can exceed EMMI catches sensitivity, causes the inefficacy detected.In the integrated circuit (IC) system that many power consumptions are extremely low, such as medical treatment electronic equipment, sensing node, wearable device, RFID etc., even if receive the static leakage of peace rank, all may cause chip overall performance cannot be up to standard.And the small leakage current of this order of magnitude, can compare with the order of magnitude of the optical noise in EMMI test environment, EMMI is difficult to accurate location.
Found by literature search, in recent years, occurred that some use EMMI platform to carry out the method for IC interior fault analysis successively, as:
[CN 102116838 B] discloses a kind of FPGA of use and coordinates EMMI to carry out the method for failure analysis.This method lays particular emphasis on the inefficacy that analysis chip inside cannot be captured by simple power on operation.Because many inefficacies of chip internal not occur in quiescent operation state, the method is write specific test vector by FPGA and is applied to the chip carrying out EMMI failure analysis, away from the quiescent operation state after powering on, thus achieve dynamic localization of fault.
[CN 102466778 B] discloses a kind of method analyzing Power MOS manufacture or design defect.This method lays particular emphasis on the location of the Power MOS device array with repeatability being carried out to invalid position.The method describes the method how using chemical corrosion and Metal deposition, by the processing not having the particular device of external packaging pin to carry out the later stage, thus the electric signal needed for these particular device are applied, so that observe the concrete invalid position of Power MOS device array.
[CN 102565680 A] discloses a kind of dynamically EMMI system and its implementation and methods for using them.
[CN 103389307 A] discloses a kind of device for carrying out back side EMMI failure analysis and failure analysis method.
But, in above-mentioned open source literature, all do not put forth effort on and solve EMMI in analysing integrated circuits fault, the problem (namely utilizing EMMI cannot analyze the fault of the types such as Ohmic contact, metal interconnection short circuit, surface inversion layer, silicon conductive path) that fault type coverage rate is incomplete, does not also provide solution for the peace rank static leakage of receiving in super low-power consumption chip.
Summary of the invention
For the deficiencies in the prior art, the present invention proposes a kind of method for designing utilizing the auxiliary circuit of EMMI detection chip static leakage, improve the fault cover type of EMMI in Integrated circuit failure analysis, the static leakage of the fault detect and Na An rank that EMMI can be used to carry out the types such as Ohmic contact, metal interconnection short circuit, surface inversion layer, silicon conductive path detects.
Technical solution of the present invention is as follows:
Utilize a method for designing for the auxiliary circuit of EMMI detection chip static leakage, its feature is, the method comprises the steps:
1. to integrated circuit (IC) chip to be measured, according to circuit function, N number of unit module is divided into;
2. according to the number of unit module, the PN junction diode that magnitude setting is identical with it, i.e. N number of diode;
3. arrange blocks current respectively to unit module to copy and amplifying circuit, make each blocks current copy the unit module corresponding with it respectively with amplifying circuit and be connected with diode.
Compared with prior art, the invention has the beneficial effects as follows:
1) by not easily by the fault type that EMMI detects, the change of the PN junction both hole and electron recombination current easily detected by EMMI is converted to.In the failure analysis of integrated circuit, as long as the failure type of inefficacy sample can cause the change of electric current, working current and the normal sample of the sample that namely lost efficacy are inconsistent, and what no matter cause inefficacy is any fault type, can be detected by EMMI.
2) by not easily by the electric current receiving peace rank that EMMI detects, be enlarged into the electric current of the 10 μ A magnitudes easily detected by EMMI, add detection sensitivity when using EMMI to carry out fault analysis equivalently.Finally serve the exception of quick position chip quiescent point, the object of quick position chip internal failed areas.
Accompanying drawing explanation
Fig. 1 be the present invention includes N number of unit module, N number of diode, N number of blocks current copy the auxiliary circuit figure with amplifying circuit.
Fig. 2 is that first of unit module A implements illustration
Fig. 3 is on the basis of unit module A, has set up current replication and amplifying circuit, and first after diode array implements illustration.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
Following circuit and working method is increased in integrated circuit (IC) chip inside:
1. the electric current of pair chip internal carries out blocking management, forms the N number of different unit module for the purpose of current detecting.
2. according to unit module number, set up N number of PN junction diode that quantity is corresponding with it.The diode newly established is independent of one another on electrical connection.When layout design, consider the dirigibility of placement-and-routing, selectable by these independently diode arrangement together, formed diode array.In addition, the covering of metal pair photon when detecting for avoiding EMMI, the top of diode array, should not cover or covering metal less as far as possible.
3., according to the number of unit module, set up N number of current replication and amplifying circuit.
Optionally, current replication and amplifying circuit are the current mirroring circuits using MOS transistor to realize.The input port of this current mirroring circuit is connected on the power supply of described unit module, makes all consumption electric current on that module first after current mirror, then flows in described unit module.The output port of current mirror is connected in the PN junction diode of setting up in step 2.
4. beyond normal mode of operation, set up PN junction light-emitting mode, under this pattern, the above-mentioned circuit set up works in such a way:
A) working current of unit module is replicated and amplifies;
The size of running current when can design according to modules, selects rational current amplification factor, makes each to be replicated equal with size of current after amplifying;
Each be replicated and amplify after electric current, equal 10 μ A; Suppose that the static working current of modules A is 5 μ A, can be so 1:2 by the mirroring ratios of design current mirror circuit, make the electric current of current mirror outputs mouth equal the twice of input port.
B) unit module to be replicated and electric current after amplifying, to be applied in corresponding PN junction diode successively;
C) for copying the circuit with amplified current, and PN junction diode array, only work under PN junction light-emitting mode.Under normal mode of operation, this part circuit palpus bypass of setting up, does not affect the normal operating conditions of chip.
5., for inefficacy sample, under galvanoluminescence pattern, use EMMI to carry out localization of fault.Localization method has following characteristics:
A) EMMI observe to as if domain on PN junction diode array region;
B) after EMMI imaging, compare to as if the luminosity of each PN junction diode;
C) judged the size of current relation of each unit module by the luminous intensity of each PN junction diode, know that it is that abnormal circuit occurs for which in the unit module of setting in step 1;
Optionally, select when designing to be applied to size of current on each diode equal time, the luminous obviously brighter unit module corresponding to diode, be the unit module of working current (or electric leakage) bigger than normal, the unit module that luminous obviously darker diode is corresponding, is the unit module that working current is less than normal.
Embodiment 1: suppose that integrated circuit (IC) chip can be divided into 14 kinds of different circuit functions.
Step 1, difference according to circuit function, be divided into 14 different unit modules: A ~ N.
Step 2, to be altogether divided into 14 different unit modules due to chip, the number of diodes in this array, also has 14 altogether, i.e. 14 LED lighting points.Each diode is independently connected on the output port of current replication and amplifying circuit.
Step 3, in these 14 modules of A ~ N, unit module A is a single-stage common-source amplifier circuit, and its circuit structure as shown in Figure 3.This circuit includes input coupling capacitance Cc, gate bias current I
1, resistance R
1, MOS amplifier tube Mn and input load resistance R
2.
Suppose that unit module A is due to the defect designed or process, occur following two kinds of faults:
There is abnormal silicon conductive path, cause actual input bias current I
1bigger than normal compared with expected design;
There is abnormal metal interconnection short circuit, cause actual R
1resistance value ratio expected design less than normal;
According to the current/voltage formula I=K of metal-oxide-semiconductor being operated in saturation region
n(W/L) (V
gS-V
tH)
2(note: in above formula, Kn is the parameter that a technique is relevant, W/L is the design parameter of metal-oxide-semiconductor, VGS is that the gate source voltage of metal-oxide-semiconductor is poor, in this circuit arrangement, due to the source ground of Mn, VGS=VG, VTH is the threshold voltage of Mn, is the parameter that a technique is relevant), static working current and its direct current biasing point VG of amplifier tube Mn are closely related.The change of direct current biasing point VG can have influence on the total current size of unit module A with quadratic relationship.
For the first fault type above-mentioned, I1 is bigger than normal compared with expected design, because VG=I1 × R1, VG are bigger than normal compared with expected design value, beyond expected design scope, causes unit module A normally to work.It is bigger than normal that this fault is rendered as overall current in I-V characteristic.For the second fault type, R
1less than normal compared with expected design, because VG=I
1× R
1, VG is less than normal compared with expected design value, beyond expected design scope, causes unit module A normally to work.It is less than normal that this fault is rendered as overall current in I-V characteristic.When not using auxiliary circuit of the present invention and detection method, although the fault of this two type all shows as the change of module total current, but EMMI cannot capture the photon that abnormal current causes, for chip designer, actual fault cannot be located and occur in which module of whole chips.
Fig. 2 is on the basis of unit module A, has set up current replication and amplifying circuit, and the state after diode array.Wherein, current replication and amplifying circuit contain a switch S, current mirror pipe Mp1 and Mp
2.When chip place in the normal mode of operation time, switch S close, current mirror pipe Mp
1be bypassed with Mp2, the duty of unit module A is with not set up current replication identical with the state of amplifying circuit.When chip is in PN junction light-emitting mode, switch S is opened, and Mp1 is used for the way circuit that perception flows through unit module A.Because during design, the prospective current of unit module A is known, so, can, by designing suitable mirror image multiple, make the output current Ia of Mp2 equal 10 μ A.Ia is replicated together with the current Ib ~ In amplified with in other module, is applied on diode array.When chip is in PN sending and receiving optical mode, the electric current always having 14 tunnel 10 μ A is applied on diode Da ~ Dn together.
Consider previously described two kinds of fault types, when there is the first fault, the electric current of unit module A is bigger than normal compared with expected design, current Ib ~ the In exported due to all the other each unit modules is expected design value 10 μ A, and thus corresponding with unit module A electric current I a is also larger than other current Ib ~ In.When using EMMI to observe diode array, on the diode corresponding to Da, a fairly large number of photon will be captured.The imaging results that EMMI detects by present ER effect large time diode array luminescence situation, namely in diode array, the luminosity that the upper left corner corresponds to the diode of unit module A is better than remaining 13 diodes.Otherwise, when there is previously described the second fault, the electric current of unit module A is less than normal compared with expected design, and the current Ib ~ In exported due to all the other each unit modules is expected design value 10 μ A, and thus corresponding with unit module A electric current I a is also less than other current Ib ~ In.When using EMMI to observe diode array, on the diode corresponding to Da, the photon of negligible amounts will be captured.By presenting unit module A, the imaging results that EMMI detects occurs that fault causes the luminous situation of the diode array of ER effect hour, specifically in diode array, the luminosity corresponding to the diode of unit module A is weaker than remaining 13 diodes.By the luminosity of each diode of front and back in contrast diode array, achieve the module broken down in chip and carry out quick position.
Although the present invention illustrates as above by preferred embodiment, this preferred embodiment is also not used to limit the present invention.Those skilled in the art, without departing from the spirit and scope of the present invention, should have the ability make various correction to this preferred embodiment and supplement, therefore, protection scope of the present invention is as the criterion with the scope of claims.
Claims (1)
1. utilize a method for designing for the auxiliary circuit of EMMI detection chip static leakage, it is characterized in that, the method comprises the steps:
1. to integrated circuit (IC) chip to be measured, according to circuit function, N number of unit module is divided into;
2. according to the number of unit module, the PN junction diode that magnitude setting is identical with it, i.e. N number of diode;
3. arrange blocks current respectively to unit module to copy and amplifying circuit, make each blocks current copy the unit module corresponding with it respectively with amplifying circuit and be connected with diode.
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Cited By (2)
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| CN109884515A (en) * | 2019-02-28 | 2019-06-14 | 中国空间技术研究院 | A kind of low-light microscope bias unit |
| CN109959837A (en) * | 2017-12-25 | 2019-07-02 | 北京兆易创新科技股份有限公司 | A kind of electric-leakage detection circuit |
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