The control method of onboard charger DC-DC system
Technical field
It is applied in onboard charger DC-DC system the present invention relates to one kind, by the internal positive temperature coefficient base for producing
Quasi- voltage compares with the sampled voltage of power tube metallic parasitic resistance, realizes underloading high efficiency, line to DC-DC system output end
The technology of voltage compensation and peak point current limitation control is damaged, belongs to DC-DC converter technical field.
Background technology
With flourishing for portable type electronic product, dc-dc is widely used in electronic product,
Market prospects are boundless, and the requirement to its performance is also with regard to more and more higher, such as input and output voltage scope, the maximum electricity of output
Stream, power supply conversion efficiency, working frequency and power volume etc..
Onboard charger is the newer application fields of DC-DC, and this kind of DC-DC belongs to BUCK type electric pressure converters, with height
Voltage range of application, and underloading conversion efficiency higher is required, separately because the cable of its output end to the equipment that is electrically charged is more long,
Larger voltage loss is had in High-current output, and is not damaged by for protection is electrically charged equipment, the output current of DC-DC
Needs are limited.Therefore need to consider its actual applied environment in onboard charger DC-DC designs.
Fig. 1 is the synchronous rectification BUCK type DC-DC schematic diagrames in vehicle-mounted charge applied environment, on wherein QH1 based on pipe
Switching tube, QL2 down tubes are synchro switch pipe, and L1 is energy storage inductor, and Rl is inductance equivalent series resistance, and CL is filter capacitor, Rc
It is capacitor equivalent series resistance, Rcable is charge cable resistance, and VO1 is DC-DC output voltages, and VO2 is actual loading end electricity
Pressure.
In each cycle, main switch QH1 is first turned on as inductance L1 charges, and inductance L1 electric currents rise, and stores energy
Amount, after certain dutycycle, main switch QH1 shut-offs.And inductance L1 is by synchronous rectifier QL2 afterflows, and inductive current
Decline, inductance L1 releases energy to output end, so complete the energy conversion that a cycle is input to output.While passing through
Two feedback control loops of the voltage detecting of VFB and the current detecting of RM are controlled to dutycycle, realize the voltage and current of stabilization
Output.
, it is necessary to consider three kinds of output current situations emphatically in vehicle-mounted charge DC-DC applications.One is in load trickle charge
Stage, DC-DC understands the electric current in output constant current stage 1/10, usually below 300mA, to reduce system power dissipation, it is necessary to add light
Carry mode of operation and determine when system enters light-load mode.Two is in constant-current charging phase, for different type load system
The charging current of output 1A-3A may be continued.And it can be seen in fig. 1 that between DC-DC output ends and actual loading
In the presence of the line resistance of about Rcable=150m Ω, if output current is 2A, this ohmically pressure drop will reach 300mV,
So will safely be impacted to being electrically charged system, therefore onboard charger DC-DC needs to add line voltage loss balancing work(
Energy.If three is that system output is shorted to ground by mistake, inductance high current can be caused, it is therefore desirable to add peak point current to limit work(
Can, damage chip to prevent high current from turning on.
The content of the invention
The present invention is directed to onboard charger DC-DC system environment characteristics, there is provided one kind is realized to onboard charger DC-
Simple efficient control circuit and the controlling party of DC system underloadings high efficiency, line loss voltage compensation and peak point current limitation function
Method.The present invention is also applicable in the DC-DC system that other need such function, and circuit framework is simple, and technique is easily achieved, drop
Low development cost, reliability is high.
Technical scheme is as follows:
A kind of control circuit of onboard charger DC-DC system, including underloading comparator, a line loss compensation compare
Device, peak point current limitation comparator and a positive temperature coefficient current generating module, the underloading comparator, line loss are mended
The negative input for repaying comparator and peak point current limitation comparator connects the onboard charger DC-DC system internal error
The output signal of amplifier, positive input connects the positive temperature coefficient of the positive temperature coefficient current generating module output respectively
The voltage of the different value that electric current is formed on the polysilicon resistance of series connection, output end exports underloading high effective model, line loss electricity respectively
Pressure compensation and the control signal of peak point current limitation.
A kind of control method of onboard charger DC-DC system, comprises the following steps:
(1) underloading comparator COMP1, line loss compensation comparator COMP2 and peak point current limitation comparator COMP3 are set;
The negative end of three comparators is all connected with the output signal VC of DC-DC system internal error amplifier, forward end then divides
Not Lian Jie positive temperature voltage VPEAK, VCABLE of different value for being formed on polysilicon resistance of positive temperature coefficient electric current and
VLIGHT;
(2) when load current reduction so that when the output signal VC of error amplifier is less than VLIGHT voltages, underloading compares
The output signal L_EN upsets of device COMP1 are height, and shut-off DC-DC system internal clocking produces signal, the main switch of DC-DC system
Pipe is provided by output capacitance completely in off state, load current is continued, and the output voltage VO 1 of DC-DC system declines, error
The output signal VC voltages of amplifier are raised;When the output signal VC voltages of error amplifier are more than VLIGHT voltages, underloading
The output signal L_EN upsets of comparator COMP1 are low, and clock signal is enabled again, and the main switch of DC-DC system is opened, electricity
Inducing current rises, when sampled voltage VSENSE reaches the output signal VC of error amplifier, the PWM comparators of DC-DC system
Control main switch shut-off, output capacitance is electrically charged, the output signal VC of error amplifier decline and less than VLIGHT after, enter
Enter the next cycle of light-load mode, and so on, realize underloading high efficiency function;
(3) when load current increases so that when the output signal VC of error amplifier is more than VCABLE voltages, line loss compensation
The output signal C_EN upsets of comparator COMP2 are low, reference voltage VREF changes, and the output voltage VO 1 of DC-DC system is therewith
Change, makes the output voltage VO 2 at actual loading end enter in zone of reasonableness, realizes line voltage loss balancing function;
(4) when load current continues to increase so that when the output signal VC of error amplifier is more than VPEAK voltages, peak value
The output signal P_EN upsets of current limit comparator COMP3 are low, turn off the main switch output of DC-DC system, and simultaneously
Enter hiccup pattern with hiccup module collective effect control DC-DC system chip, reduce DC-DC system chip and averagely export electricity
Stream, realizes peak point current limitation function.
The method have the benefit that:
The present invention produces a voltage for positive temperature coefficient to compare with the sampling of power tube voltage metal by internal, you can real
Now to the monitoring of output current, efficient underloading, line loss compensation and peak point current threshold limit are determined, and threshold value does not become with temperature
Change.Circuit function principle is simple, it is easy to which technique realizes that can reduce chip cost, reliability is high.
Advantages of the present invention will be given in the description of specific embodiment part below, partly will from the following description
Become obvious, or recognized by practice of the invention.
Brief description of the drawings
Fig. 1 is onboard charger DC-DC schematic diagrames.
Fig. 2 is VC and VSENSE waveform diagrams.
Fig. 3 is circuit theory schematic diagram of the invention.
Fig. 4 is positive temperature coefficient current generating module schematic diagram.
Fig. 5 be underloading efficiently, line loss compensation, peak point current restrictive curve schematic diagram.
Specific embodiment
Specific embodiment of the invention is described further below in conjunction with the accompanying drawings.
As shown in figure 1, current sense amplifier detection power tube path on metallic parasitic resistance RM pressure drop and it is put
Greatly, current sense amplifier is output as the voltage signal VSENSE after amplifying, and this voltage signal has identical with metallic resistance RM
Temperature coefficient be about 3000ppm, this VSENSE signal can with the output signal VC of internal error amplifier pass through PWM comparators
It is compared, with controlled output change in duty cycle, each cycle, when VSENSE reaches VC, switch-off power pipe is waited next
Individual clock signal opens power tube when coming, and so on.Fig. 2 curves show the relation of VSENSE and VC signals, so each
The peak value of cycle VSENSE signal all can be equal with VC, therefore the peak value with VSENSE there is identical change to become by VC signals
Gesture, and VSENSE comes from the sampling to power tube current, therefore the peak value of VSENSE is and inductive current and load electricity
The proportional relation of stream correspondence.
The situation of output current so can be reacted by VSENSE signals, different load current ranks will correspond to
Different VSENSE signal magnitudes, namely VC voltage amplitudes equally correspond to different output current sizes, therefore can be by choosing
Different VPTAT magnitudes of voltage and VC voltage ratios are selected compared with realizing the control to the output loading different operating stage, and due to two
Comparison signal has approximate temperature coefficient, therefore this circuit framework has the temperature close to zero to the control threshold value of output current
Degree coefficient.
Because VC signals are linear change, therefore replace VSENSE as comparison signal with VC.COMP1, COMP2 in Fig. 3
Underloading, line loss compensation and peak point current limitation comparator are respectively with COMP3, the negative end of three comparators is VC, positive
The pressure drop of the different value that end is then formed for a PTAT current on POLY resistance.Fig. 4 show the generation of positive temperature coefficient electric current
Module, wherein POLY resistance have the temperature coefficient of very little, and finally can about fall, the positive temperature voltage VPEAK that ultimately forms,
VCABLE and VLIGHT and thermal voltage VT has identical temperature coefficient, and temperature coefficient is about 3000ppm.
Wherein COMP1 is that underloading controls comparator, when load current is less than certain value, corresponding error amplifier output
Signal VC will be less than VLIGHT voltages, and the output signal L_EN upsets of COMP1 are height, and system will be into light-load mode, L_EN
Signal will control shut-off internal clocking to produce signal, because each cycle is led by the upper power tube of clock signal trailing edge triggering
It is logical, therefore after clock signal shut-off, upper pipe will be in off state be continued, and load current is provided by output capacitance completely, and VO1 will
Can decline, then VC voltages can be raised, when VC voltages are more than VLIGHT voltages, L_EN upsets are low, and clock signal mould is enabled again
Block, power tube is opened, and inductive current rises, when VSENSE reaches VC, the shut-off of PWM comparator controlled outputs power tube, now
Output capacitance is electrically charged, then VC will decline and after less than VLIGHT, into the next cycle of light-load mode, and so on,
This reduces the working frequency of system, reduce switching loss.So by the setting to VLIGHT magnitudes of voltage, can control
Enter light-load mode when why load current is worth.
COMP2 is line loss compensation comparator, and when load current exceedes certain value, the output signal VC of error amplifier surpasses
VCABLE voltages are crossed, C_EN output switching activities are low, and control VREF module voltage conversions, and the ratio for being adjusted can be passed through
PAD is trimmed.In the present embodiment, VREF voltages increase by 6%, and such VO1 output voltages will be changed into 5.3V from original 5V, then exist
Assume that the pressure drop loss in cable resistance is 300mV when output current is 2A, then the actual output voltage of VO2 will be just
5V, thus compensate for line voltage loss, as long as and generally output voltage is met in certain limit, such as 4.8V-
5.2V, even if therefore line loss compensation voltage just can not be coincide with loss voltage, also completely can be by terminal voltage compensation to reasonable
In the range of.
COMP3 is that peak point current limits comparator, and when load current is very big, the output signal VC of error amplifier will surpass
VPEAK voltages are crossed, P_EN output switching activities are low, and P_EN signals will turn off output, and simultaneously common with HICCUP (hiccup) module
Same-action control chip enters hiccup pattern, reduces chip average output current, so realizes peak point current limitation function.
Quantify the above-mentioned principle of explanation below by formula, by taking line loss compensation threshold calculations as an example, by current sense amplifier
Derivation, can obtain having following expression at current peak:
Wherein IQH1 is the peak point current of the power tube that each cycle detection is arrived, and GCS is
Current sense amplifier and metallic resistance RM combine the mutual conductance being derived by,RP4 and RP5 is in amplifier
Portion's resistance, VDCIt is D/C voltage amount, for determining DC operating points (also being measured containing identical DC in positive temperature coefficient voltage below).
It is as follows plus the expression formula after DC amounts for positive temperature coefficient voltage VCABLE:
Two formulas are equal more than, and can obtain line loss voltage compensation circuit threshold expression is to represent IQH1 with ICABLE:
Therefore as can be seen from the above equation, POLY temperature-coefficient of electrical resistances can about fall, and thermal voltage VT and metallic resistance RM
With approximately equalised temperature coefficient, thus obtain ICALBE will have be approximately zero temperature coefficient.And it is seen that logical
K1, K2 and the K3 crossed in change Fig. 3 can realize the detection to output current different value, determine underloading high efficiency, line loss compensation
The threshold value limited with peak point current.
ICABLE obtained by addition is the peak point current of inductance, and is not actual load current value, according to
The operation principle of BUCK types DC-DC, load current is the average value of inductive current, therefore can draw actual load current
For:
Wherein in converter steady operation, input voltage VIN, output electricity
Pressure VO, upper pipe ON time TON and inductance value L are known quantity, therefore ILOAD can be determined by ICABLE completely.
In sum, by setting internal resistance value, suitable VCABLE voltages are chosen, you can corresponding to obtain in load
When why ILOAD is worth, line loss compensation amount is added to output voltage.Similarly for underloading high efficiency and peak point current limitation Working mould
Formula, it is also possible to obtain similar result, therefore do not do repetition derivation here.
As shown in figure 5, three curves are respectively load current, inductive current and output voltage.Understand with load current
Raise, inductive current can also follow change, first when load current is less than 300mA, underloading comparator works, and inductive current is in
Existing discontinuous operating mode (DCM), i.e., now chip operation in the light-load mode stage, switching frequency reduction reduces system power dissipation;When
When load current reaches 1A, internal line loss compensation comparator upset, VREF voltages are increased into 6%, i.e. output voltage is increased by 5V
To 5.3V, line loss compensation function is realized;Load current continues to increase, when it is more than 5A, it will controlled output power tube is turned off, electricity
Inducing current and output voltage can drop to approximately null value, and chip eventually enters into hiccup protections pattern.
Above-described is only the preferred embodiment of the present invention, the invention is not restricted to above example.It is appreciated that this
The oher improvements and changes that art personnel directly derive or associate without departing from the basic idea of the present invention,
It is considered as being included within protection scope of the present invention.