CN104779781B - A kind of surge restraint circuit suitable for single-stage power factor correcting circuit - Google Patents
A kind of surge restraint circuit suitable for single-stage power factor correcting circuit Download PDFInfo
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- CN104779781B CN104779781B CN201410016058.5A CN201410016058A CN104779781B CN 104779781 B CN104779781 B CN 104779781B CN 201410016058 A CN201410016058 A CN 201410016058A CN 104779781 B CN104779781 B CN 104779781B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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Abstract
The present invention provides a kind of surge restraint circuit suitable for single-stage power factor correcting circuit, including：Surge sample circuit, surge control circuit and surge absorbing circuit, surge sample circuit gathers surge from the dc bus of single-stage power factor correcting circuit, and surging signal corresponding with the surge is exported to surge control circuit, surging signal is converted into switching signal by surge control circuit, and export to surge absorbing circuit, surge absorbing circuit is turned on according to switching signal, to absorb surge, so as to suppress impact of the surge to dc bus.The present invention by the absorption to surge on dc bus, is realized the suppression to surge, so as to effectively reduce impact of the surge to dc bus, is protected late-class circuit using the technological means for increasing surge restraint circuit on the basis of single-stage power factor correcting circuit.
Description
Technical field
The present invention relates to surge suppression technique field, is suitable for single-level power factor correction more specifically to one kind
The surge restraint circuit of circuit.
Background technology
LED（Light-Emitting Diode, light emitting diode）It is made of ultra-high purity compound semiconductor materials,
When LED is as light source, there is energy-saving and environmental protection and the advantage of long-life, therefore, in today of energy crisis getting worse, LED quilts
Widely use, also greatly promoted the development of LED drive power industry accordingly.Single- stage PFC（Power Factor
Correction, PFC）Circuit due to PF values are higher, circuit cost is low and the advantage such as simple in structure, because
This is widely used in LED drive power.
Single- stage PFC circuit is although simple in structure, but its Anti-surging is ineffective.When surge carrys out interim, system nominal work
Make voltage transient rise, its amplitude reaches several times~hundred times of rated operational voltage, in this way, easily causing to rush to dc bus
Hit, component metallization top layer is damaged, or even breakdown voltage semiconductor device, and then influence the normal work of late-class circuit.
Therefore, it is those skilled in the art's technical problem urgently to be resolved hurrily how the surge of single- stage PFC circuit suppress.
The content of the invention
In view of this, the present invention provides a kind of surge restraint circuit suitable for single-stage power factor correcting circuit, with logical
The absorption to surge on dc bus is crossed, realizes the suppression to surge, so as to effectively reduce impact of the surge to dc bus, is protected
Protect late-class circuit.
A kind of surge restraint circuit suitable for single-stage power factor correcting circuit, including：Surge sample circuit, surge control
Circuit and surge absorbing circuit processed；
The input terminal of the surge sample circuit and the dc bus of single-stage power factor correcting circuit connect, the surge
Sample circuit gathers surge from the dc bus, and exports surging signal corresponding with the surge；
The input terminal of the surge control circuit is connected with the output terminal of the surge sample circuit, the surge control electricity
Road obtains the surging signal of the surge sample circuit output, and the surging signal is converted into switching signal output；
The input terminal of the surge absorbing circuit is connected with the output terminal of the surge control circuit, the surge absoption electricity
The output terminal on road is connected with the dc bus, and the surge absorbing circuit obtains the described of surge control circuit output and opens
OFF signal, and turned on according to the switching signal, to absorb the surge, suppress the surge to the dc bus
Impact.
Preferably, further include：Rectifier circuit；
The output terminal of the rectifier circuit is connected with the dc bus, alternating current of the rectifier circuit to input
Pressure carries out rectification and obtains DC voltage, and exports to the dc bus.
Preferably, the surge sample circuit includes：First divider resistance group and the second divider resistance group；
The first divider resistance group and the second divider resistance group are connected in series in the dc bus and ground terminal
Between.
Preferably, the first divider resistance group includes：First resistor, second resistance and 3rd resistor；
One end of the first resistor connects the dc bus, and the other end of the first resistor is by being connected in series
The second resistance connects one end of second divider resistance with the 3rd resistor.
Preferably, second divider resistance includes：4th resistance；
One end of 4th resistance connects one end of first divider resistance, the other end connection of the 4th resistance
Ground terminal.
Preferably, the surge control circuit includes：5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, first
Capacitance, the second capacitance, first switch pipe and second switch pipe；
One end of 5th resistance connects the surge sample circuit as the input terminal of the surge control circuit
Output terminal, the other end of the 5th resistance connect ground terminal by the 6th resistance；
First capacitance is connected in the both ends of the 6th resistance in parallel；
The input terminal connection power supply of the first switch pipe, the output terminal of the first switch pipe connect the 7th resistance
One end, the other end of the 7th resistance connects the surge absorbing circuit as the output terminal of the surge control circuit
Input terminal, the control terminal of the first switch pipe connect the input terminal of the second switch pipe by the 8th resistance；
Control terminal connection the 6th resistance of the second switch pipe and the common port of first capacitance, described second
The output terminal connection ground terminal of switching tube；
The positive plate of second capacitance connects the power supply, and negative plate connects the control terminal of the first switch pipe.
Preferably, the first switch pipe and the second switch Guan Jun are triodes.
Preferably, the surge absorbing circuit includes：Electrolytic capacitor and the 3rd switching tube；
The positive terminal of the electrolytic capacitor connects the dc bus, and negative pole end connects the input of the 3rd switching tube
End, the output terminal connection ground terminal of the 3rd switching tube, the control terminal of the 3rd switching tube is as surge absoption electricity
The input terminal on road connects the output terminal of the surge control circuit, and the 3rd switching tube obtains the surge control circuit output
The switching signal, and turned on according to the switching signal, so that the electrolytic capacitor absorbs the surge, suppress institute
State impact of the surge to the dc bus.
Preferably, the 3rd switching tube is NMOS tube.
Preferably, further include：Varistor, one end of the varistor connect the dc bus, the pressure-sensitive electricity
The other end connection ground terminal of resistance, the varistor are used to carry out first order suction to the surge in the dc bus
Receive.
It can be seen from the above technical scheme that the present invention provides a kind of suitable for single-stage power factor correcting circuit
Surge restraint circuit, including：Surge sample circuit, surge control circuit and surge absorbing circuit, surge sample circuit is from single-stage
The dc bus collection surge of circuit of power factor correction, and export surging signal corresponding with the surge to surge and control electricity
Road, surging signal is converted into switching signal by surge control circuit, and is exported to surge absorbing circuit, surge absorbing circuit foundation
Switching signal is turned on, to absorb surge, so as to suppress impact of the surge to dc bus.The present invention is using in single stage power
Increase the technological means of surge restraint circuit on the basis of factor correcting circuit, it is real by the absorption to surge on dc bus
Now to the suppression of surge, so as to effectively reduce impact of the surge to dc bus, late-class circuit is protected.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, without creative efforts, can be with
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is a kind of surge restraint circuit suitable for single-stage power factor correcting circuit disclosed by the embodiments of the present invention
Structure diagram；
Fig. 2 is a kind of surge restraint circuit suitable for single-stage power factor correcting circuit disclosed by the embodiments of the present invention
Circuit diagram.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment, belongs to the scope of protection of the invention.
Referring to Fig. 1, the embodiment of the invention discloses a kind of Surge suppression electricity suitable for single-stage power factor correcting circuit
The structure diagram on road, surge restraint circuit include：Surge sample circuit 11, surge control circuit 12 and surge absorbing circuit 13；
Wherein：
The input terminal and single-level power factor correction of surge sample circuit 11（Power Factor Correction, PFC）
The dc bus V+ connections of circuit, surge sample circuit 11 gathers surge from dc bus V+, and exports corresponding with the surge
Surging signal；
The input terminal of surge control circuit 12 is connected with the output terminal of surge sample circuit 11, and surge control circuit 12 obtains
The surging signal that surge sample circuit 11 exports, and the surging signal is converted into switching signal output；
The input terminal of surge absorbing circuit 13 is connected with the output terminal of surge control circuit 12, surge absorbing circuit 13 it is defeated
Outlet is connected with dc bus V+, the switching signal that the acquisition surge control circuit 12 of surge absorbing circuit 13 exports, and according to
Turned on according to the switching signal, to absorb the surge, suppress impact of the surge to dc bus V+, protect rear class
Circuit.
It should be noted is that surge, that is, surge voltage described above.
It in summary it can be seen, the present invention is used increases surge restraint circuit on the basis of single-stage power factor correcting circuit
Technological means, by the absorption to surge on dc bus V+, realize the suppression to surge, thus effectively reduce surge to straight
The impact of busbar V+ is flowed, protects late-class circuit.
In order to further optimize the above embodiments, it can also include：Rectifier circuit 14；
The output terminal of rectifier circuit 14 is connected with dc bus V+, alternating voltage Vac of the rectifier circuit 14 to input
Carry out rectification and obtain DC voltage Vdc, and export to dc bus V+.
Specifically, referring to Fig. 2, a kind of surge suitable for single-stage power factor correcting circuit disclosed by the embodiments of the present invention
The circuit diagram of suppression circuit, surge sample circuit 11 include：First divider resistance group 111 and the second divider resistance group 112, first
111 and second divider resistance group 112 of divider resistance group is connected in series between dc bus V+ and ground terminal.
After surge sample circuit 11 collects surge from dc bus V+, the first divider resistance group 111 and the second partial pressure
Output terminal of the common port of resistance group 112 as surge sample circuit 11, will surging signal MULTIN outputs corresponding with surge
To surge control circuit 12.
Wherein, the first divider resistance group 111 can include a resistance, can also include multiple resistance, equally, second point
Piezoresistance group 112 can include a resistance, can also include multiple resistance.
For example, when the first divider resistance group 111 includes：When first resistor R1, second resistance R2 and 3rd resistor R3,
One end connection dc bus V+ of first resistor R1, the other end of first resistor R1 pass through the second resistance R2 that is connected in series and the
One end of three resistance R3 the second divider resistances of connection groups 112.At this time, 3rd resistor R3 and the second divider resistance group 112 is public
The output terminal as surge sample circuit 11 is held, surging signal MULTIN is exported to surge control circuit 12.
When the second divider resistance group 112 includes the 4th resistance R4, one end of the 4th resistance R4 connects the first divider resistance
One end of group 111, the other end connection ground terminal of the 4th resistance R4.At this time, the first divider resistance group 111 and the 4th resistance R4
Common port（It is specially the common port of 3rd resistor R3 and the 4th resistance R4 in the present embodiment）As the defeated of surge sample circuit 11
Outlet, surging signal MULTIN is exported to surge control circuit 12.
It should be noted is that the resistance number that the first divider resistance group 111 and the second divider resistance group 112 respectively contain
And the resistance value of each resistance, according to depending on actual conditions, the present invention does not limit herein.
Surge control circuit 12 includes：5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the first electricity
Hold C1, the second capacitance C2, first switch pipe Q1 and second switch pipe Q2；
Output terminal of the one end of 5th resistance R5 as the input terminal connection surge sample circuit 11 of surge control circuit 12,
The other end of 5th resistance R5 passes through the 6th resistance R6 connection ground terminals；
First capacitance C1 is connected in the both ends of the 6th resistance R6 in parallel；
The input terminal connection power Vcc of first switch pipe Q1, the output terminal of first switch pipe Q1 connect the 7th resistance R7's
One end, the other end of the 7th resistance R7 connect the input terminal of surge absorbing circuit 13 as the output terminal of surge control circuit 12,
The input terminal that the control terminal of first switch pipe Q1 passes through the 8th resistance R8 connection second switch pipes Q2；
The common port of control terminal connection the 6th resistance R6 and the first capacitance C1 of second switch pipe Q2, second switch pipe Q2's
Output terminal connects ground terminal；
The positive plate connection power Vcc of second capacitance C2, the control terminal of negative plate connection first switch pipe Q1.
Specifically, surge control circuit 12 obtains the surging signal of the output of surge sample circuit 11 by the 5th resistance R5
MULTIN, and according to the turn-on and turn-off of the low and high level control second switch pipe Q2 in surging signal MULTIN, so as to fulfill
To the detection function of surge.
It should be noted is that the first capacitance C1 and the second capacitance C2 are miscellaneous in surging signal MULTIN for removing
Ripple.
Wherein, the first switch pipe Q1 in the present embodiment and second switch pipe Q2 may each be triode.
Surge absorbing circuit 13 includes：Electrolytic capacitor C3 and the 3rd switching tube Q3；
The positive terminal connection dc bus V+ of electrolytic capacitor C3, the input terminal of the 3rd switching tube Q3 of negative pole end connection, the 3rd
The output terminal connection ground terminal of switching tube Q3, the control terminal of the 3rd switching tube Q3 are connected as the input terminal of surge absorbing circuit 13
The output terminal of surge control circuit 12（With reference to above-described embodiment, the control terminal of the 3rd switching tube Q3 specifically connects the 7th resistance R7
One end as output terminal）, the switching signal of the 3rd switching tube Q3 acquisition outputs of surge control circuit 12, and according to the switch
Signal is turned on, so that electrolytic capacitor C3 is connected between dc bus V+ and ground terminal, to absorb surge, suppresses surge
Impact to dc bus V+.
Wherein, the 3rd switching tube Q3 is NMOS tube.
In order to further optimize the above embodiments, it can also include：One end connection of varistor MOV1, varistor MOV1
The other end connection ground terminal of dc bus V+, varistor MOV1, varistor MOV1 are used for the wave in dc bus V+
Pour into the absorption of the row first order.
Varistor MOV1 is a kind of resistance device with nonlinear wind vibration, is mainly used for bearing overvoltage in circuit
Shi Jinhang voltage clampings, absorb unnecessary electric current to protect Sensitive Apparatus.English full name is " Voltage Dependent
Resistor " is abbreviated as " VDR ", or is called " Varistor ".
In the embodiment that Fig. 2 is provided, it can also include：The output terminal of rectifier circuit BD1, rectifier circuit BD1 point
It is not connected with dc bus V+ and ground terminal, rectifier circuit BD1 carries out rectification to the alternating voltage Vac of input and obtains direct current
Vdc is pressed, and is exported to dc bus V+.
It in summary it can be seen, DC voltage is obtained when rectifier circuit BD1 carries out rectification to the alternating voltage Vac of input
Vdc, and export to dc bus V+, varistor MOV1 absorbs the surge first order in dc bus V+, works as the first order
When absorbing incomplete, surge sample circuit 11 carries out surge partial pressure, and will surging signal MULTIN outputs corresponding with surge
To surge control circuit 12, the first capacitance C1 in surge control circuit 12 is filtered surging signal MULTIN, surge control
Circuit 12 processed controls the conducting of second switch pipe Q2 by filtered surging signal MULTIN, and then controls first switch pipe Q1
Conducting, so that surging signal MULTIN to be converted into the Continuity signal of switching signal, i.e. the 3rd switching tube Q3, make the 3rd switch
Pipe Q3 is turned on, and electrolytic capacitor C3 is really established with the input terminal of the 3rd switching tube Q3 and is connected, and electrolytic capacitor C3 is by charging to wave
Capable absorption is poured into, realizes the suppression to surge, so as to effectively reduce impact of the surge to dc bus V+, protects late-class circuit.
Each embodiment is described by the way of progressive in this specification, what each embodiment stressed be and other
The difference of embodiment, between each embodiment identical similar portion mutually referring to.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or use the present invention.
A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, it is of the invention
The embodiments shown herein is not intended to be limited to, and is to fit to and the principles and novel features disclosed herein phase one
The most wide scope caused.
Claims (9)
- A kind of 1. surge restraint circuit suitable for single-stage power factor correcting circuit, it is characterised in that including：Surge sampling electricity Road, surge control circuit and surge absorbing circuit；The input terminal of the surge sample circuit and the dc bus of single-stage power factor correcting circuit connect, the surge sampling Circuit gathers surge from the dc bus, and exports surging signal corresponding with the surge；The input terminal of the surge control circuit is connected with the output terminal of the surge sample circuit, and the surge control circuit obtains The surging signal of the surge sample circuit output is taken, and the surging signal is converted into switching signal output；The input terminal of the surge absorbing circuit is connected with the output terminal of the surge control circuit, the surge absorbing circuit Output terminal is connected with the dc bus, and the surge absorbing circuit obtains the switch letter of the surge control circuit output Number, and turned on according to the switching signal, to absorb the surge, suppress the surge and the dc bus is rushed Hit；Wherein, the surge absorbing circuit includes：Electrolytic capacitor and the 3rd switching tube；The positive terminal of the electrolytic capacitor connects the dc bus, and negative pole end connects the input terminal of the 3rd switching tube, institute The output terminal connection ground terminal of the 3rd switching tube is stated, the control terminal of the 3rd switching tube is as the defeated of the surge absorbing circuit Enter the output terminal that end connects the surge control circuit, the 3rd switching tube obtains the described of the surge control circuit output Switching signal, and turned on according to the switching signal, so that the electrolytic capacitor absorbs the surge, suppress the surge Impact to the dc bus.
- 2. surge restraint circuit according to claim 1, it is characterised in that further include：Rectifier circuit；The output terminal of the rectifier circuit is connected with the dc bus, the rectifier circuit to the alternating voltage of input into Row rectification obtains DC voltage, and exports to the dc bus.
- 3. surge restraint circuit according to claim 1, it is characterised in that the surge sample circuit includes：First point Piezoresistance group and the second divider resistance group；The first divider resistance group and the second divider resistance group are connected in series between the dc bus and ground terminal.
- 4. surge restraint circuit according to claim 3, it is characterised in that the first divider resistance group includes：First Resistance, second resistance and 3rd resistor；One end of the first resistor connects the dc bus, and the other end of the first resistor is by described in being connected in series Second resistance connects one end of the second divider resistance group with the 3rd resistor.
- 5. surge restraint circuit according to claim 3, it is characterised in that the second divider resistance group includes：4th Resistance；One end of 4th resistance connects one end of the first divider resistance group, and the other end of the 4th resistance connects Ground terminal.
- 6. surge restraint circuit according to claim 1, it is characterised in that the surge control circuit includes：5th electricity Resistance, the 6th resistance, the 7th resistance, the 8th resistance, the first capacitance, the second capacitance, first switch pipe and second switch pipe；One end of 5th resistance connects the output of the surge sample circuit as the input terminal of the surge control circuit End, the other end of the 5th resistance connect ground terminal by the 6th resistance；First capacitance is connected in the both ends of the 6th resistance in parallel；The input terminal connection power supply of the first switch pipe, the output terminal of the first switch pipe connect the one of the 7th resistance End, the other end of the 7th resistance connect the input of the surge absorbing circuit as the output terminal of the surge control circuit End, the control terminal of the first switch pipe connect the input terminal of the second switch pipe by the 8th resistance；The control terminal of the second switch pipe connects the common port of the 6th resistance and first capacitance, the second switch The output terminal connection ground terminal of pipe；The positive plate of second capacitance connects the power supply, and negative plate connects the control terminal of the first switch pipe.
- 7. surge restraint circuit according to claim 6, it is characterised in that the first switch pipe and the second switch Guan Jun is triode.
- 8. surge restraint circuit according to claim 1, it is characterised in that the 3rd switching tube is NMOS tube.
- 9. surge restraint circuit according to claim 1, it is characterised in that further include：Varistor, the varistor One end connect the dc bus, the other end connection ground terminal of the varistor, the varistor is used for described The surge in dc bus carries out first order absorption.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410016058.5A CN104779781B (en) | 2014-01-14 | 2014-01-14 | A kind of surge restraint circuit suitable for single-stage power factor correcting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410016058.5A CN104779781B (en) | 2014-01-14 | 2014-01-14 | A kind of surge restraint circuit suitable for single-stage power factor correcting circuit |
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| CN104779781A CN104779781A (en) | 2015-07-15 |
| CN104779781B true CN104779781B (en) | 2018-05-11 |
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| CN201410016058.5A Active CN104779781B (en) | 2014-01-14 | 2014-01-14 | A kind of surge restraint circuit suitable for single-stage power factor correcting circuit |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107562665A (en) * | 2017-09-19 | 2018-01-09 | 中国科学院长春光学精密机械与物理研究所 | Small-sized cluster information processing system on a kind of star |
| CN108494242B (en) * | 2018-05-22 | 2024-04-26 | 深圳市朗科智能电气股份有限公司 | Single-stage PFC converter capable of resisting lightning surge |
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| CN101645649A (en) * | 2008-08-07 | 2010-02-10 | 艾默生网络能源系统北美公司 | Anti-surge PFC circuit |
| CN102097798A (en) * | 2011-03-16 | 2011-06-15 | 深圳茂硕电源科技股份有限公司 | High-power startup surge suppression circuit |
| CN102118106A (en) * | 2009-12-31 | 2011-07-06 | Nxp股份有限公司 | Surge protection circuit |
| CN102623962A (en) * | 2011-01-30 | 2012-08-01 | 深圳市航嘉驰源电气股份有限公司 | Adaptive lightning-protection surge-protection control circuit |
| CN203387750U (en) * | 2013-08-29 | 2014-01-08 | 阮容芳 | Over-voltage protection efficient LED street lamp power supply |
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2014
- 2014-01-14 CN CN201410016058.5A patent/CN104779781B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101645649A (en) * | 2008-08-07 | 2010-02-10 | 艾默生网络能源系统北美公司 | Anti-surge PFC circuit |
| CN102118106A (en) * | 2009-12-31 | 2011-07-06 | Nxp股份有限公司 | Surge protection circuit |
| CN102623962A (en) * | 2011-01-30 | 2012-08-01 | 深圳市航嘉驰源电气股份有限公司 | Adaptive lightning-protection surge-protection control circuit |
| CN102097798A (en) * | 2011-03-16 | 2011-06-15 | 深圳茂硕电源科技股份有限公司 | High-power startup surge suppression circuit |
| CN203387750U (en) * | 2013-08-29 | 2014-01-08 | 阮容芳 | Over-voltage protection efficient LED street lamp power supply |
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| CN104779781A (en) | 2015-07-15 |
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