CN104753613A - Serial port communication testing device and testing method - Google Patents
Serial port communication testing device and testing method Download PDFInfo
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- CN104753613A CN104753613A CN201510126512.7A CN201510126512A CN104753613A CN 104753613 A CN104753613 A CN 104753613A CN 201510126512 A CN201510126512 A CN 201510126512A CN 104753613 A CN104753613 A CN 104753613A
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Abstract
The invention relates to a serial port communication testing device and a testing method. The serial port communication testing device comprises a CPU (central processing unit) circuit, a storage circuit, an LCD (liquid crystal display) display circuit, a keyboard input circuit, a power source circuit, and a plurality of serial communication circuits; the storage circuit, the LCD display circuit, the keyboard input circuit and a plurality of serial communication circuits are respectively connected with the CPU circuit; the CPU circuit, the storage circuit, the LCD display circuit, the keyboard input circuit and a plurality of serial communication circuits are respectively connected with the power source circuit. The serial port communication testing device and the testing method are not required to take a computer as a running platform and not influenced by instability factors of an external environment and testing software; the testing device is small in volume, light in weight, simple in operation, and convenient to use; the testing device can reliably and stably test failures of a sending channel and a receiving channel of the tested serial interface device.
Description
Technical field
The present invention relates to electronic communication field, particularly relate to a kind of serial communication testing equipment and method of testing.
Background technology
At present, serial communication equipment is due to the extensive use more by force and in a communications system of its versatility, but, at actual development with when detecting Serial Port Communication Software and equipment, software is often adopted to carry out debugging and test, be subject to computer and carry inconvenience, computer run environment, testing software stability and the impact of the factor such as coupling between the two and restriction, the unsteadiness of testing tool and test environment directly affects the stability of test result, causes the problems such as test result is inaccurate, unreliable, not directly perceived.For this reason, be necessary to develop a kind of serial communication testing equipment and method of testing, make simple to operate, easy to use, the sendaisle of the tested serial interface equipment of test that can be reliable, stable and receive path failure problems.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of serial communication testing equipment and method of testing,
The technical scheme that the present invention solves the problems of the technologies described above is as follows:
According to one aspect of the present invention, provide a kind of serial communication testing equipment, comprise cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit, power circuit and multiple serial communication circuit; Described memory circuit, LCD display circuit, input through keyboard circuit are connected with described cpu circuit respectively with multiple serial communication circuit, and described cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit are connected with described power circuit respectively with multiple serial communication circuit.
Wherein, described cpu circuit, it is for reading program in described memory circuit and data; For carrying out bidirectional data transfers with described serial communication circuit, and the data of reception being sent to described memory circuit and LCD display circuit, receiving the user operation commands of input through keyboard circuit transmission and being sent to described memory circuit and described LCD display circuit; Described memory circuit, it is for storing the working procedure of whole testing equipment, and the data and the user's input that receive CPU transmission are about to be sent to the data of testing equipment and store; Described LCD display circuit, it is for receiving user operation commands and showing, and receives the data of described CPU transmission and shows; Described input through keyboard circuit, it is for receiving user's peripheral operation, generates user operation instruction, detects user operation instruction and is sent to described cpu circuit and memory circuit; Described power circuit, it provides power supply for giving all circuit; Described serial communication circuit, when testing sendaisle, receiving the Transistor-Transistor Logic level that described cpu circuit sends, converts serial port communication data to and be sent to testing equipment; When testing receive path, its serial port communication data sent for receiving testing equipment, converts TTL feedback level to and is sent to described cpu circuit.
According to another aspect of the present invention, provide a kind of serial communication method of testing: comprise sendaisle test and receive path test, specific as follows:
Step 1: described cpu circuit sends Transistor-Transistor Logic level to described serial communication circuit;
Step 2: described serial communication equipment receives Transistor-Transistor Logic level that described CPU sends and is converted into communication serial port data and is sent to testing equipment;
Step 3: if described testing equipment receives the communication serial port data that described serial communication equipment sends, then sendaisle communication is normal, serial port communication data is sent to described serial communication circuit by described testing equipment, otherwise transmission channel communication failure, terminate testing process;
Step 4: described communication serial port circuit receives serial port communication data that described testing equipment sends and is converted into TTL feedback level and is sent to described cpu circuit;
Step 5: if described cpu circuit receives the TTL feedback level that described serial communication equipment sends, then receive path communication is normal, the TTL feedback level received is sent to described memory circuit and LCD display circuit by described cpu circuit, otherwise, receive path communication failure, terminates testing process;
Step 6: described memory circuit receives TTL feedback level and stores, described LCD display circuit receives TTL feedback level and shows, and terminates testing process.
The invention has the beneficial effects as follows: a kind of serial communication testing equipment of the present invention and method of testing, unsteadiness factor not by external environment condition and testing software affects, testing equipment volume is little, lightweight, simple to operate, easy to use, the sendaisle of the tested serial interface equipment of test that can be reliable, stable and receive path failure problems, the various speed of serial interface can be adapted to, docking receiving literary composition carries out ASCII character and 16 systems show, and can edit required message and send to equipment under test.The integrated operation keyboard of testing equipment and display, need not computer as operation platform, adapt to various application scenario, be particularly useful for the application scenario of Protocol Analysis.
Accompanying drawing explanation
Fig. 1 is a kind of serial communication testing equipment structural representation of the present invention;
Fig. 2 is a kind of serial communication method of testing flow chart of the present invention.
Embodiment
Be described principle of the present invention and feature below in conjunction with accompanying drawing, example, only for explaining the present invention, is not intended to limit scope of the present invention.
Embodiment one, a kind of serial communication testing equipment, be described in detail a kind of serial communication testing equipment that the present embodiment provides below in conjunction with Fig. 1.
As shown in Figure 1, a kind of serial communication testing equipment, comprises cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit, power circuit and multiple serial communication circuit; Described memory circuit, LCD display circuit, input through keyboard circuit are connected with described cpu circuit respectively with multiple serial communication circuit, and described cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit are connected with described power circuit respectively with multiple serial communication circuit.
Wherein, described cpu circuit, it is for reading program in described memory circuit and data; For carrying out bidirectional data transfers with described serial communication circuit, and the data of reception being sent to described memory circuit and LCD display circuit, receiving the user operation commands of input through keyboard circuit transmission and being sent to described memory circuit and described LCD display circuit; Described memory circuit, it is for storing the working procedure of whole testing equipment, and the data and the user's input that receive CPU transmission are about to be sent to the data of testing equipment and store; Described LCD display circuit, it is for receiving user operation commands and showing, and receives the data of described CPU transmission and shows; Described input through keyboard circuit, it is for receiving user's peripheral operation, generates user operation instruction, detects user operation instruction and is sent to described cpu circuit and memory circuit; Described power circuit, it provides power supply for giving all circuit; Described serial communication circuit, when testing sendaisle, receiving the Transistor-Transistor Logic level that described cpu circuit sends, converts serial port communication data to and be sent to testing equipment; When testing receive path, its serial port communication data sent for receiving testing equipment, converts TTL feedback level to and is sent to described cpu circuit.
In the present embodiment, described cpu circuit comprises CPU, reset circuit and clock circuit, jointly forms the minimum system needed for described cpu circuit work; Described CPU, when testing sendaisle, it is for sending Transistor-Transistor Logic level to described serial communication circuit; When testing receive path, it is for receiving the TTL feedback level of described serial communication circuit transmission and being sent to described memory circuit and LCD display unit; Receive the user operation commands of input through keyboard circuit transmission and be sent to the display of described LCD display unit; Described reset circuit, it is for resetting to described CPU; Described clock circuit, it provides clock signal for giving described CPU.
It should be noted that, when testing sendaisle, if when described CPU needs hardware controls stream, described CPU sends the instruction of hardware controls stream to serial communication circuit, described serial communication equipment receives hardware controls stream instruction and is sent to testing equipment, and described testing equipment passes on the signal that whether can continue to send data to it to described CPU according to the instruction of hardware controls stream.When receiving terminal data processing is not come, just send the signal of " not receiving ", described CPU just stops sending, until the signal receiving " can continue to send " that testing equipment sends sends data-signal again.
Same reason, when testing receive path, if when described CPU needs hardware controls stream, described testing equipment sends the instruction of hardware controls stream to described serial communication circuit, described serial communication equipment receives hardware controls stream instruction and is sent to described CPU, described CPU sends the signals such as DCD, RI according to the instruction of hardware controls stream to described CPU, to pass on the data message whether receiving it and send to described testing equipment.
In the present embodiment, described memory circuit comprises program storing circuit and data storage circuitry, described program storing circuit is used for the working procedure of On-board test equipment, and described data storage circuitry is for the data that receive described CPU and send and user operation instruction and store.
In the present embodiment, described input through keyboard circuit comprises operation keyboard matrix and keyboard scanning circuit, described operation keyboard matrix is for receiving the operation of user's external key, generate user operation instruction, described keyboard scanning circuit is used for scanning the button of described operation keyboard matrix, detects user operation instruction and is sent to described cpu circuit.
Before test, user can arrange test parameter according to different serial communication equipment, and this process user can be completed by above-mentioned input through keyboard circuit, after optimum configurations to be tested completes, can complete above-mentioned testing procedure.
Embodiment two, a kind of serial communication method of testing, be described in detail a kind of serial communication method of testing that the present embodiment provides below in conjunction with Fig. 2.
As shown in Figure 2, a kind of serial communication method of testing flow chart, comprises sendaisle test and receive path test, specific as follows:
Step 1: described cpu circuit sends Transistor-Transistor Logic level to described serial communication circuit;
Step 2: described serial communication equipment receives Transistor-Transistor Logic level that described CPU sends and is converted into communication serial port data and is sent to testing equipment;
Step 3: if described testing equipment receives the communication serial port data that described serial communication equipment sends, then sendaisle communication is normal, serial port communication data is sent to described serial communication circuit by described testing equipment, otherwise transmission channel communication failure, terminate testing process;
Step 4: described communication serial port circuit receives serial port communication data that described testing equipment sends and is converted into TTL feedback level and is sent to described cpu circuit;
Step 5: if described cpu circuit receives the TTL feedback level that described serial communication equipment sends, then receive path communication is normal, the TTL feedback level received is sent to described memory circuit and LCD display circuit by described cpu circuit, otherwise, receive path communication failure, terminates testing process;
Step 6: described memory circuit receives TTL feedback level and stores, described LCD display circuit receives TTL feedback level and shows, and terminates testing process.
In above-mentioned test, if the test of described transmission channel is normal, and the test of described receive path is also normal, then whole serial communication is normal; If transmission channel test and described receive path are tested wherein, any one is tested and breaks down, then serial communication fault.
In the present embodiment, when testing sendaisle, the CPU in described cpu circuit sends Transistor-Transistor Logic level to described serial communication circuit; When testing receive path, described CPU receives the TTL feedback level of described serial communication circuit transmission and is sent to described memory circuit and LCD display unit; Described CPU receives the user operation instruction of input through keyboard circuit transmission and is sent to the display of described LCD display unit; Reset circuit in described cpu circuit resets to described CPU; Clock circuit in described cpu circuit provides clock signal to described CPU.
In the present embodiment, the working procedure of the program storing circuit On-board test equipment in described memory circuit, the data storage circuitry in described memory circuit is for the data that receive described CPU and send and user operation instruction storing.
In the present embodiment, operation keyboard matrix reception user external key operation in described input through keyboard circuit, generate user operation instruction, the button of keyboard scanning circuit in described input through keyboard circuit to described operation keyboard matrix scans, and detects user operation instruction and is sent to described cpu circuit.
A kind of serial communication testing equipment of the present invention and method of testing, unsteadiness factor not by external environment condition and testing software affects, testing equipment volume is little, lightweight, simple to operate, easy to use, the sendaisle of the tested serial interface equipment of test that can be reliable, stable and receive path failure problems, can adapt to the various speed of serial interface, docking receiving literary composition carries out ASCII character and 16 systems show, and can edit required message and send to equipment under test.The integrated operation keyboard of testing equipment and display, need not computer as operation platform, adapt to various application scenario, be particularly useful for the application scenario of Protocol Analysis.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. a serial communication testing equipment, is characterized in that: comprise cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit, power circuit and multiple serial communication circuit; Described memory circuit, LCD display circuit, input through keyboard circuit are connected with described cpu circuit respectively with multiple serial communication circuit, and described cpu circuit, memory circuit, LCD display circuit, input through keyboard circuit are connected with described power circuit respectively with multiple serial communication circuit;
Described cpu circuit, it is for reading program in described memory circuit and data; For carrying out bidirectional data transfers with described serial communication circuit, and the data of reception being sent to described memory circuit and LCD display circuit, receiving the user operation commands of input through keyboard circuit transmission and being sent to described memory circuit and described LCD display circuit;
Described memory circuit, it is for storing the working procedure of whole testing equipment, and the data and the user's input that receive CPU transmission are about to be sent to the data of testing equipment and store;
Described LCD display circuit, it is for receiving user operation commands and showing, and receives the data of described CPU transmission and shows;
Described input through keyboard circuit, it is for receiving user's peripheral operation, generates user operation instruction, detects user operation instruction and is sent to described cpu circuit and memory circuit;
Described power circuit, it provides power supply for giving all circuit;
Described serial communication circuit, when testing sendaisle, receiving the Transistor-Transistor Logic level that described cpu circuit sends, converts serial port communication data to and be sent to testing equipment; When testing receive path, its serial port communication data sent for receiving testing equipment, converts TTL feedback level to and is sent to described cpu circuit.
2. a kind of serial communication testing equipment according to claim 1, is characterized in that: described cpu circuit comprises CPU, reset circuit and clock circuit;
Described CPU, when testing sendaisle, it is for sending Transistor-Transistor Logic level to described serial communication circuit; When testing receive path, it is for receiving the TTL feedback level of described serial communication circuit transmission and being sent to described memory circuit and LCD display unit; Receive the user operation commands of input through keyboard circuit transmission and be sent to the display of described LCD display unit;
Described reset circuit, it is for resetting to described CPU;
Described clock circuit, it provides clock signal for giving described CPU.
3. a kind of serial communication testing equipment according to claim 1, it is characterized in that: described memory circuit comprises program storing circuit and data storage circuitry, described program storing circuit is used for the working procedure of On-board test equipment, and described data storage circuitry is for the data that receive described CPU and send and user operation instruction and store.
4. a kind of serial communication testing equipment according to claim 1, it is characterized in that: described input through keyboard circuit comprises operation keyboard matrix and keyboard scanning circuit, described operation keyboard matrix is for receiving the operation of user's external key, generate user operation instruction, described keyboard scanning circuit is used for scanning the button of described operation keyboard matrix, detects user operation instruction and is sent to described cpu circuit.
5. a serial communication method of testing, is characterized in that: it adopts a kind of serial communication testing equipment described in claim 1-4, comprises sendaisle test and receive path test, specific as follows:
Step 1: described cpu circuit sends Transistor-Transistor Logic level to described serial communication circuit;
Step 2: described serial communication equipment receives Transistor-Transistor Logic level that described CPU sends and is converted into communication serial port data and is sent to testing equipment;
Step 3: if described testing equipment receives the communication serial port data that described serial communication equipment sends, then sendaisle communication is normal, serial port communication data is sent to described serial communication circuit by described testing equipment, otherwise transmission channel communication failure, terminate testing process;
Step 4: described communication serial port circuit receives serial port communication data that described testing equipment sends and is converted into TTL feedback level and is sent to described cpu circuit;
Step 5: if described cpu circuit receives the TTL feedback level that described serial communication equipment sends, then receive path communication is normal, the TTL feedback level received is sent to described memory circuit and LCD display circuit by described cpu circuit, otherwise, receive path communication failure, terminates testing process;
Step 6: described memory circuit receives TTL feedback level and stores, described LCD display circuit receives TTL feedback level and shows, and terminates testing process.
6. a kind of serial communication method of testing according to claim 5, is characterized in that: when testing sendaisle, and the CPU in described cpu circuit sends Transistor-Transistor Logic level to described serial communication circuit; When testing receive path, described CPU receives the TTL feedback level of described serial communication circuit transmission and is sent to described memory circuit and LCD display unit; Described CPU receives the user operation instruction of input through keyboard circuit transmission and is sent to the display of described LCD display unit; Reset circuit in described cpu circuit resets to described CPU; Clock circuit in described cpu circuit provides clock signal to described CPU.
7. a kind of serial communication method of testing according to claim 5, it is characterized in that: the working procedure of the program storing circuit On-board test equipment in described memory circuit, the data storage circuitry in described memory circuit is for the data that receive described CPU and send and user operation instruction storing.
8. a kind of serial communication method of testing according to claim 5, it is characterized in that: the operation keyboard matrix reception user external key operation in described input through keyboard circuit, generate user operation instruction, the button of keyboard scanning circuit in described input through keyboard circuit to described operation keyboard matrix scans, and detects user operation instruction and is sent to described cpu circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510126512.7A CN104753613A (en) | 2015-03-21 | 2015-03-21 | Serial port communication testing device and testing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510126512.7A CN104753613A (en) | 2015-03-21 | 2015-03-21 | Serial port communication testing device and testing method |
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| CN104753613A true CN104753613A (en) | 2015-07-01 |
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| CN201510126512.7A Pending CN104753613A (en) | 2015-03-21 | 2015-03-21 | Serial port communication testing device and testing method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104991183A (en) * | 2015-07-02 | 2015-10-21 | 北京津宇嘉信科技股份有限公司 | Test method for JYJC monitoring unit CPU mainboard |
| CN110865912A (en) * | 2019-10-31 | 2020-03-06 | 天津市英贝特航天科技有限公司 | System and method for detecting serial port communication reliability of DSP (digital Signal processor) |
-
2015
- 2015-03-21 CN CN201510126512.7A patent/CN104753613A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104991183A (en) * | 2015-07-02 | 2015-10-21 | 北京津宇嘉信科技股份有限公司 | Test method for JYJC monitoring unit CPU mainboard |
| CN104991183B (en) * | 2015-07-02 | 2018-04-24 | 北京津宇嘉信科技股份有限公司 | A kind of test method for JYJC monitoring unit cpu motherboards |
| CN110865912A (en) * | 2019-10-31 | 2020-03-06 | 天津市英贝特航天科技有限公司 | System and method for detecting serial port communication reliability of DSP (digital Signal processor) |
| CN110865912B (en) * | 2019-10-31 | 2024-01-16 | 天津市英贝特航天科技有限公司 | System and method for detecting serial port communication reliability of DSP (digital Signal processor) |
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Application publication date: 20150701 |