CN104753321B - Driving method for diode clamping type three-level bridge arm and bridge arm logic unit - Google Patents

Driving method for diode clamping type three-level bridge arm and bridge arm logic unit Download PDF

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CN104753321B
CN104753321B CN201510108613.1A CN201510108613A CN104753321B CN 104753321 B CN104753321 B CN 104753321B CN 201510108613 A CN201510108613 A CN 201510108613A CN 104753321 B CN104753321 B CN 104753321B
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drive signal
signal
current input
igbt
level
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CN104753321A (en
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姜鑫
刘闯
黄晓波
刘炳
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Beijing Etechwin Electric Co Ltd
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Beijing Etechwin Electric Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0038Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Electronic Switches (AREA)

Abstract

The embodiment of the invention provides a driving method for a diode-clamped three-level bridge arm and a bridge arm logic unit, wherein the driving method comprises the following steps: in the steady state, the following treatments were carried out: acquiring a current input driving signal; comparing the current input driving signal with the output driving signal of the previous period, if the current input driving signal is different from the output driving signal of the previous period, judging whether the quantity of the on level signals in the current input driving signal is more than that of the on level signals in the output driving signal of the previous period, if so, entering a dead zone processing state, and performing the following processing: waiting for a preset dead time, entering a starting processing state, and performing the following processing: according to the current input driving signal, the IGBT needing to be switched on is selected, the corresponding bit in the output driving signal of the previous period is changed into a switching-on level signal, the preset first narrow-band pulse suppression time is waited, and then the stable processing state is entered.

Description

For the driving method and bridge arm logical block of three level bridge arm of diode clamp bit-type
Technical field
The present invention relates to technical field of wind power, more particularly to a kind of driving side for three level bridge arm of diode clamp bit-type Method and bridge arm logical block.
Background technology
As market is for the requirement of many factors such as cost, grid-connected characteristic, the quality of power supply, many level have become wind-powered electricity generation change The mainstream development direction of stream device.Compared with two level topologys, three-level topology can effectively expansion switch power device in voltage On working range, under equal-wattage, the rising of voltage means the reduction of electric current, and electric current is related to loss, so adopting Typically all there is low cost, efficient advantage with the current transformer of three-level topology.In addition, under identity unit switching frequency, Three-level topology has more preferable harmonic wave performance, so as to more friendly to electrical network, can save extra electrical network filter apparatus or filter Wave device.
However, in three-level topology, on each single bridge arm, have four independent power devices (such as IGBT), it is this many The system of degree of freedom easily because interference or logical error cause system cisco unity malfunction, breaks down after even damaging Really.So three level bridge arms have strict demand to the drive signal which receives.
The content of the invention
The purpose of the embodiment of the present invention is, there is provided a kind of driving method for three level bridge arm of diode clamp bit-type and Bridge arm logical block, enables to the switching rules requirement that output drive signal meets three level bridge arms, so as to effectively eliminate Interference and impact of the component variations to output drive signal, it is ensured that three level bridge arm normal works.
For achieving the above object, The embodiment provides a kind of be used for three level bridge arm of diode clamp bit-type Driving method, a bridge arm of three level bridge arm of the diode clamp bit-type include four IGBT and with its one-to-one four Individual bottom layer driving device, and bridge arm logical block is provided between system controller and bottom layer driving device, the bridge arm logic Unit has the signal input part for receiving the input drive signal from the system controller and to four bottoms Driver sends the drive signal outfan of output drive signal, and the drive signal outfan was respectively provided with defeated to a upper cycle Go out drive signal latch function,
The input drive signal and the output drive signal are four parallel level signal, and the level signal is extremely Include less opening level signal and shut-off level signal for driving IGBT to turn off for drive that IGBT opens,
At least there is the bridge arm logical block stabilized treatment state, dead band to process state and open process state, described Method includes:
Under the stabilized treatment state, it is handled as follows:
Obtain current input drive signal;
Output drive signal of the current input drive signal with the upper cycle was compared, if described work as Front input drive signal is different from the output drive signal in a upper cycle, then judge open-minded in current input drive signal Whether the quantity of level signal was more than the quantity for opening level signal in the output drive signal in a upper cycle,
If the quantity for opening level signal in the current input drive signal is more than the output in a upper cycle The quantity for opening level signal in drive signal, then process state into the dead band,
In the dead band process state, it is handled as follows:
Default Dead Time is waited, is entered and is opened process state,
Open in process state described, be handled as follows:
According to the current input drive signal, the IGBT for needing to open was selected, by the output driving in a upper cycle In signal, corresponding position is changed to open level signal, waits default first narrow-band impulse to suppress the time, subsequently into described Stabilized treatment state.
Embodiments of the invention additionally provide a kind of bridge arm logical block for three level bridge arm of diode clamp bit-type, institute State three level bridge arm of diode clamp bit-type a bridge arm include four IGBT and with its one-to-one four bottom layer driving device, And bridge arm logical block is provided between system controller and bottom layer driving device, the bridge arm logical block has for connecing Receive the signal input part of the input drive signal from the system controller and output is sent to four bottom layer driving devices The drive signal outfan of drive signal, the drive signal outfan with the output signal latch function to a upper cycle,
The input drive signal and the output drive signal are four parallel level signal, and the level signal is extremely Include less opening level signal and shut-off level signal for driving IGBT to turn off for drive that IGBT opens,
At least there is the bridge arm logical block stabilized treatment state, dead band to process state and open process state, described Bridge arm logical block includes:
Steady statue processing module, for, under the stabilized treatment state, being handled as follows:
Obtain current input drive signal;
Output drive signal of the current input drive signal with the upper cycle was compared, if described work as Front input drive signal is different from the output drive signal in a upper cycle, then judge open-minded in current input drive signal Whether the quantity of level signal was more than the quantity for opening level signal in the output drive signal in a upper cycle,
If the quantity for opening level signal in the current input drive signal is more than the output in a upper cycle The quantity for opening level signal in drive signal, then process state into the dead band,
Dead band status processing module, for, in the dead band process state, being handled as follows:
Default Dead Time is waited, carries out opening process state,
Opening state processing module, for opening in process state described, is handled as follows:
According to the current input drive signal, the IGBT for needing to open was selected, by the output drive signal in a upper cycle In corresponding position be changed to open level signal, wait default first narrow-band impulse to suppress the time, subsequently into described stable Process state.
Driving method and bridge arm logical block for three level bridge arm of diode clamp bit-type provided in an embodiment of the present invention, Process and state or open under process state by stabilized treatment state respectively in bridge arm logical block, dead band, carry out with it is residing The corresponding process of process state, can switch between above-mentioned various process states, input and outfan are compatible Dead band processes the drive signal of state, and realizes burst pulse suppression in outfan such that it is able to so that output drive signal Meet the switching rules requirement of three level bridge arms, and effectively eliminate interference and shadow of the component variations to output drive signal Ring, it is ensured that three level bridge arm normal works.
Description of the drawings
Structural representations of the Fig. 1 for the drive circuit of the diode clamp bit-type tri-level single bridge arm of the embodiment of the present invention;
Fig. 2 illustrates for the flow process of the driving method for three level bridge arm of diode clamp bit-type of the embodiment of the present invention one Figure;
Fig. 3 illustrates for the flow process of the driving method for three level bridge arm of diode clamp bit-type of the embodiment of the present invention two Figure;
Fig. 4 shows for the structure of the bridge arm logical block for three level bridge arm of diode clamp bit-type of the embodiment of the present invention three It is intended to.
Specific embodiment
It is used for the driving method and bridge arm of three level bridge arm of diode clamp bit-type below in conjunction with the accompanying drawings to the embodiment of the present invention Logical block is described in detail.
Structural representations of the Fig. 1 for the drive circuit of the three level bridge arm of diode clamp bit-type of the embodiment of the present invention, reference Fig. 1, diode clamp bit-type tri-level single bridge arm include:Four bottom layer driving devices, four IGBT, and two diodes and Two capacitor cells.The drive signal of three level bridge arms is produced according to system voltage electric current by system controller, is patrolled by bridge arm Output drive signal is sent to four bottom layer driving devices after volume cell processing, then from bottom layer driving device to one-to-one with which IGBT output drive signals, make bridge arm exchange output point current potential be respectively equal to positive direct-current bus, negative dc bus or dc bus The current potential at midpoint.Output drive signal presses first IGBT, second IGBT, and the 3rd IGBT, the order of the 4th IGBT are retouched State, represent that output drive signal is high level with 1, with 0 represent output drive signal be low level (in general, high level make To open level signal, low level is used as shut-off level signal), then output drive signal has following working condition:When 1100, Exchange output point current potential is positive direct-current bus current potential;When 0110, exchange output point current potential is dc bus midpoint potential;0011 When, exchange output point current potential is negative dc bus current potential.Because IGBT is receiving shut-off drive signal to actual shut-off, have The delay of certain hour.So when mutually switching between three of the above output drive signal, needing the output driving of intermediateness Signal, the intermediateness are commonly referred to as dead band state, and specifically, 0100 is the 1100 and 0110 dead band state for mutually switching; 0010 is the 0110 and 0011 dead band state for mutually switching.In practical application, some system controllers are not sent into dead band shape The output drive signal of state.Additionally, initial working condition or terminating working condition, its corresponding output drive signal is 0000.Bridge arm logical block can also receive fault-signal from bottom layer driving device, or receive stop signal from system controller, this When need to enter stopped process, its corresponding output drive signal be 0000.
More than in addition to six kinds of output drive signals, other output drive signal forms are rub-out signal, for example, export Drive signal is 1000, if bottom layer driving device is performed by this, will cause first or second IGBT over-voltage breakdown.Such as export Drive signal is 1110, will cause the 4th IGBT over-voltage breakdown.Output drive signal is 1111 for another example, only will cause certain IGBT excessively streams are burnt.This also requires that the output driving that must first ensure first IGBT and the 4th IGBT in error protection Signal is 0, then make second IGBT and the 3rd IGBT output drive signal be 0.IGBT when opening, some initial situations The reversely restoring process of adjacent diodes can be accompanied by, if the time that IGBT is opened is very short, the shut-off of IGBT needs will be caused anti- To restoring current and the sum of ac output current, now will appear from shut-off overvoltage and damage this IGBT, reverse recovery current disappears Time is anti-depending on IGBT and the characteristic of diode.Typically certain hour will be at least maintained to be referred to as burst pulse suppression drive signal System.In diode clamp bit-type three-level current transformer, particularly power is more than the current transformer of 100kW, in system controller and work( Typically have very long signal cable between rate device, due to device concordance and device between line length it is different, will cause The signal for receiving may be rub-out signal;As long signal cable is typically rendered as capacitive, the slope at signal edge is caused to become Low, the signal for receiving is likely to as rub-out signal;Due to the switch motion of power device very high-energy, interference is easily coupled to In drive signal, will cause to receive rub-out signal.
Based on above-mentioned analysis, bridge arm logical block need to have following functions:There can be dead band and without dead in input compatibility The drive signal in area;Can interpolate that and shield the rub-out signal that interference and component variations cause;Narrow arteries and veins can be realized in outfan Punching suppresses;Dead band can be realized in outfan;IGBT is turned off in the correct order can in shut-off process state.
Embodiment one
Fig. 2 illustrates for the flow process of the driving method for three level bridge arm of diode clamp bit-type of the embodiment of the present invention one Figure, Fig. 1 illustrate the structural representation of the drive circuit of diode clamp bit-type tri-level single bridge arm, see figures.1.and.2, in two poles In three level bridge arm of pipe wrench bit-type, bridge arm include four IGBT and with its one-to-one four bottom layer driving device, and It is provided with bridge arm logical block between system controller and bottom layer driving device, bridge arm logical block has for receiving from being The signal input part of the input drive signal of system controller and the driving for sending output drive signal to four bottom layer driving devices are believed Number outfan, drive signal outfan were respectively provided with the output drive signal latch function to a upper cycle, input drive signal and Output drive signal is four parallel level signal, and level signal is at least may include for driving what IGBT opened to open level Signal and the shut-off level signal for driving IGBT to turn off.
Bridge arm logical block can at least have stabilized treatment state, dead band to process state and open process state, the method Include following process step in each process cycle, wherein, in method flow, it is related to stabilized treatment state, at dead band Reason state, open process state and shut-off process state between redirecting, under stabilized treatment state, first, currently will be input into Drive signal was compared with the output drive signal in a upper cycle, then, selected to jump to extremely according to the various situations for comparing Area processes state, waits Dead Time to jump to process state of opening, or jumps directly to turn off process state, then or protects Hold in stabilized treatment state, comprise the following steps that:
Step 201:Under stabilized treatment state, current input drive signal is obtained, and judges current input drive signal Whether identical with the output drive signal in a upper cycle, if the judgment is Yes, then execution step 203, if the judgment is No, then hold Row step 202.
Step 202:Judge whether the quantity for opening level signal in current input drive signal was more than a upper cycle The quantity for opening level signal in output drive signal, if the judgment is Yes, then execution step 204, if the judgment is No, then Execution step 207.Specifically, after step 201 enters stabilized treatment state, can be by the current input drive signal of comparison In the quantity for opening level signal whether more than the quantity for opening level signal in the output drive signal in a upper cycle, from And it is state to be processed into dead band to judge, or shut-off process state is entered, perform after entering into certain process state corresponding Process.
Step 203:Keep output drive signal constant.Specifically, the output in current input drive signal and a upper cycle When drive signal is identical, then it is maintained under stabilized treatment state, keeps output drive signal constant, that is, still by upper one week The output drive signal of phase is exported as the output drive signal of current period, and can be predetermined cycle or predetermined Trigger condition, performs and obtains current input drive signal, and by the output driving in current input drive signal and a upper cycle The process that signal is compared.
Step 204:State is processed into dead band, judges whether to reach default Dead Time.Specifically, if it is determined that It is, then execution step 205 if the judgment is No, then to return to stabilized treatment state.Specifically, in order in dead band Process state is continued for some time, and is provided with Dead Time, waits default Dead Time, if open-minded in current input signal The quantity of level signal opened the quantity of level signal in being consistently greater than the output drive signal in a upper cycle, then can enter and open Logical process state, if it is not, then jumping out dead band processes state, returns to stabilized treatment state.
Step 205:According to current input drive signal, the IGBT for needing to open was selected, by the output driving in a upper cycle In signal, corresponding position is changed to open level signal.
Specifically, can select to need the IGBT for opening by procedure below, and the IGBT that change is chosen to open is corresponding The output drive signal in a upper cycle:
Detect whether that the position for meeting the current input drive signal corresponding to second IGBT or the 3rd IGBT is open-minded The position of the output drive signal in level signal and a upper cycle is shut-off level signal, if it is satisfied, then condition will be met The position of the output drive signal in an IGBT corresponding upper cycles is changed to open level signal;
If be unsatisfactory for, continue to detect whether that the current input met corresponding to first IGBT or the 4th IGBT is driven The position of dynamic signal is to open the position of level signal and the output drive signal in a upper cycle to turn off level signal, will meet bar The position of the output drive signal in an IGBT corresponding upper cycles of part is changed to open level signal.
Step 206:Judge whether that reaching default first narrow-band impulse suppresses the time.Specifically, in order in outfan reality Burst pulse suppression is showed, that is, into after opening process state, has needed persistently to open a period of time, therefore it is narrow to be provided with first Tape pulse suppresses the time, after reaching the default first narrow-band impulse suppression time, just returns to stabilized treatment state.
Step 207:According to current input drive signal, selected to need the IGBT of shut-off, by the output driving in a upper cycle In signal, corresponding position is changed to turn off level signal.Specifically, can select to need the IGBT of shut-off by procedure below, and become The output drive signal in an IGBT corresponding upper cycles of more selected shut-off:
Detect whether that the position for meeting the current input drive signal corresponding to first IGBT or the 4th IGBT is shut-off The position of the output drive signal in level signal and a upper cycle is to open level signal, if it is satisfied, then condition will be met The position of the output drive signal in an IGBT corresponding upper cycles is changed to turn off level signal;
If be unsatisfactory for, continue to detect whether that the current input met corresponding to second IGBT or the 3rd IGBT is driven The position of dynamic signal is to turn off the position of level signal and the output drive signal in a upper cycle to open level signal, will meet bar The position of the output drive signal in an IGBT corresponding upper cycles of part is changed to turn off level signal.
Step 208:Judge whether that reaching default second narrow-band impulse suppresses the time.Specifically, in order in outfan reality Show burst pulse suppression, be, into after shut-off process state, to need also exist for persistently turning off a period of time with step 206 identical, Therefore it is provided with the second narrow-band impulse and suppresses the time, after reaching the default second narrow-band impulse suppression time, just returns again It is back to stabilized treatment state.
Further, in order to when stop signal or fault-signal is received, four are sent to bottom layer driving device To turn off the output drive signal of level signal, and all IGBT are turned off, signal input part is additionally operable to receive from system control The stop signal of device and/or fault-signal from bottom layer driving device is received, the method may also include:Receiving stop signal Or in the case of fault-signal, four output drive signals for being shut-off level signal are sent to four bottom layer driving devices.This In it should be noted that also can pass through setting independent port be used for receive from system controller stop signal and/or connect Receive the fault-signal from bottom layer driving device.
Preferably, in order to filter the interference of signal, under stabilized treatment state, state before execution step 202 process it Before, can also include:Current input drive signal is compared with the previous resulting previous input drive signal of operation that obtains Compared with if current input drive signal is different from the previous resulting previous input drive signal of operation that obtains, into filtering Process state,
Under Filtering Processing state, default filtering time is waited, then judges whether current input drive signal occurs Change, if do not changed, continued executing with the output drive signal by current input drive signal with a upper cycle and enters The process that row compares, in the event of changing, then abandons the current input drive signal of this acquisition, into stabilized treatment state, Continue executing with the operation for obtaining current input drive signal.
Further, in order to shield the rub-out signal that interference and component variations cause, can be by current input letter Number whether it is that rub-out signal is judged, is processed according to judged result accordingly.
Specifically, before stating the process of step 202 before execution, under Filtering Processing state, when waiting default filtering Between, then judge whether current input drive signal changes, if after the process not changed, can also wrap Include:
Judge whether current input signal is rub-out signal, if current input signal is rub-out signal, to four bottoms Layer driver sends four output drive signals for being shut-off level signal, turns off IGBT in the correct order with this, such as Fruit current input signal is not rub-out signal, then continued executing with the output driving by current input drive signal with a upper cycle and believe Number process being compared.
The driving method for three level bridge arm of diode clamp bit-type of the present invention, on the one hand, in bridge arm logical block Stable, dead band, it is switched on or off under arbitrary process state, carries out the process corresponding with residing process state such that it is able to Switch between above-mentioned various process states so that the compatible dead band of input and outfan processes the drive signal of state, Either open process state and be also off process state, all burst pulse suppression is realized in outfan;On the other hand, introduce From the stop signal and the fault-signal from bottom layer driving device of system controller such that it is able to by correct suitable in stopped process Sequence turns off IGBT;Another further aspect, by whether being that rub-out signal judges to current input signal, if it is, sending four Position is the output drive signal of shut-off level signal, turns off IGBT with this, it becomes possible to which shielding interference and component variations cause Rub-out signal.
Embodiment two
With reference to the drive for three level bridge arm of diode clamp bit-type for specifically illustrating the embodiment of the present invention two Dynamic method.In order to more intuitively understand the embodiment of the present invention, explanation is needed exist for, output drive signal presses first With 1, IGBT, second IGBT, the order description of the 3rd IGBT, the 4th IGBT, represent that output drive signal is high level, Using high level as level signal is opened, represent that output drive signal is low level with 0, using low level as shut-off level letter Number.
Fig. 3 illustrates for the flow process of the driving method for three level bridge arm of diode clamp bit-type of the embodiment of the present invention two Figure.With reference to Fig. 3, in order that output drive signal meets the switching rules requirement of three level bridge arms, following steps are can perform:
Step 301:Obtain current input signal.
Step 302:Judge whether current input signal is stop signal or fault-signal, if it is, execution step 304, if it is not, then execution step 303.Specifically, the signal input part of bridge arm logical block is additionally operable to receive from system control The stop signal of device processed, or the fault-signal from bottom layer driving device is received, when stop signal or fault-signal is received It is accomplished by making corresponding process, it is therefore desirable to whether be that stop signal or fault-signal are made and being sentenced to current input drive signal It is disconnected.
Step 303:Judged whether current input signal is identical with the input drive signal in a upper cycle, if it is, holding Row step 305, if it is not, then execution step 306.
Step 304:Output drive signal is set to " 0000 ".Specifically, current input signal is that stop signal or failure are believed Number, then need for output drive signal to be set to " 0000 ", be sent to bottom layer driving device, and turn off all IGBT.
Step 305:Keep output drive signal constant.
Step 306:Start filtering to count, judge whether that reaching setting value and current input signal does not change, if It is, then execution step 307, if it is not, then returning 301, to continue executing with acquisition current input signal.Specifically, if current defeated The input signal for entering signal with a upper cycle is differed, now into Filtering Processing, then is just started filtering and is counted, until counting To setting value, there is no any change in current input signal, then it is assumed that current input signal is stabilization signal, if the phase of counting Between, current input signal changes, then return and continue to obtain input signal.
Step 307:Judge whether current input signal is rub-out signal, if it is, execution step 309, if it is not, then Execution step 308.Specifically, due to typically having very long signal cable between system controller to power device, furthermore The concordance of device is different with line length between device, therefore as signal is disturbed and component variations so that input signal is mistake Error signal, this step do respective handling according to judged result, to shield by judging whether current input signal is rub-out signal Cover rub-out signal.
Here, it should be noted that through step 307, if input signal is not rub-out signal, the input signal is just Correct signal, i.e., any one in 1100,0100,0110,0010,0011 and 0000, that is, input drive signal, that Continue to obtain current input drive signal, and perform current input drive signal and the output drive signal in a upper cycle compares Process.
Step 308:Obtained and judged whether current input drive signal and the output drive signal in a upper cycle are identical.Such as It is really, then execution step 310, if it is not, then execution step 311.
Step 309:Output drive signal is set to " 0000 ".With step 304 identical it is, if current input signal is mistake Error signal, also needs to turn off IGBT in the correct order, that is, output drive signal is set to " 0000 ", be sent to bottom layer driving Device.
Step 310:Keep output drive signal constant.Specifically, the output in current input drive signal and a upper cycle Drive signal is identical, is now held in stabilized treatment state, then be maintained for output drive signal constant.
Step 311:In judging current input drive signal, whether " 1 " quantity is less than or equal in a upper periodic output signal The quantity of " 1 ".If it is, execution step 313, if it is not, then execution step 312.
Step 312:Start dead band to count, in judging whether to reach setting value, and current input drive signal, " 1 " quantity begins Eventually more than the quantity of " 1 " in output drive signal.If it is, execution step 315, if it is not, then returning 301, continues executing with Obtain current input drive signal.Specifically, in dead band process state, default Dead Time is waited, after reaching setting value, Just can enter and open process state.For example, the exchange output point current potential of diode clamp bit-type tri-level single bridge arm is that positive direct-current is female Line current potential, output drive signal now is " 1100 ", if it is desired to it is dc bus midpoint electricity to be switched to exchange output point current potential Position, that is, need output drive signal to be " 0110 ", then the intermediateness of " 1100 " and " 0110 " mutually switching is accomplished by, Be be introduced into dead band process state, and then continue executing with dead band counting process, and after reaching setting value enter open place The process of reason state.
Step 313:The position of shut-off was selected, and corresponding position in the output drive signal in a upper cycle is changed to into " 0 ". Specifically, in shut-off process state, can select to need the IGBT of shut-off by procedure below, and change is chosen shut-off The output drive signal in an IGBT corresponding upper cycles:
Check that first IGBT and the 4th IGBT distinguished corresponding current input drive signal and the output in a upper cycle Drive signal, if meet current input drive signal for " 0 " and a upper cycle output drive signal for " 1 " IGBT, The position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle was changed to into " 0 " then, if not eligible IGBT, just check that second IGBT and the 3rd IGBT distinguished corresponding current input drive signal and the output in a upper cycle Drive signal, if meet current input drive signal for " 0 " and a upper cycle output drive signal for " 1 " IGBT, The position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle was changed to into " 0 " then.
Step 314:Start shut-off to count, and judge whether to reach setting value.If it is, returning, acquisition is continued executing with Current input drive signal, if it is not, then continuing executing with step 314.Specifically, suppress to realize burst pulse, that is, will Drive signal maintains certain hour, therefore is provided with shut-off counting.
Step 315:The position that selection is opened, and corresponding position in the output drive signal in a upper cycle is changed to into " 1 ". Specifically, in process state is opened, can select to need the IGBT for opening by procedure below, and change is chosen what is opened The output drive signal in an IGBT corresponding upper cycles:
Check that second IGBT and the 3rd IGBT distinguished corresponding current input drive signal and the output in a upper cycle Drive signal, if meet current input drive signal for " 1 " and a upper cycle output drive signal for " 0 " IGBT, The position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle was changed to into " 1 " then, if not eligible IGBT, just check that first IGBT and the 4th IGBT distinguished corresponding current input drive signal and the output in a upper cycle Drive signal, if meet current input drive signal for " 1 " and a upper cycle output drive signal for " 0 " IGBT, The position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle was changed to into " 1 " then.
Step 316:Counting is opened in startup, and judges count whether reach setting value.If it is, returning, continue executing with Current input drive signal is obtained, if it is not, then continuing executing with step 316.It is to be provided with to open meter with step 314 identical Drive signal is maintained certain hour, suppresses burst pulse with this by number.
The driving method for three level bridge arm of diode clamp bit-type of the present invention, with following technique effect:
1) bridge arm logical block stabilized treatment state to be switched on or off process state and switch over when, be all introduced into Dead band processes state so that the compatible dead band of input and outfan processes the drive signal of state;
2) either counting is all provided with opening process state and be also off process state so that output drive signal A period of time is maintained, so that burst pulse suppression is realized in outfan;
3) by introducing stop signal and the fault-signal from bottom layer driving device from system controller, can stop Turn off IGBT during only in the correct order;
4) by whether being that rub-out signal judges to current input signal, if a determination be made that rub-out signal, just The output drive signal of " 0000 " is sent, IGBT is turned off with this, the rub-out signal that interference and component variations cause can be shielded.
Embodiment three
Single bridge arm of three level bridge arm of diode clamp bit-type is included four IGBT and is driven with its one-to-one four bottom Dynamic device, and bridge arm logical block is provided between system controller and bottom layer driving device, bridge arm logical block has to be used for Receive the signal input part of the input drive signal from system controller and output driving letter is sent to four bottom layer driving devices Number drive signal outfan, the drive signal outfan with the output drive signal latch function to a upper cycle, input Drive signal and output drive signal are four parallel level signal, and level signal is at least included for driving what IGBT was opened Level signal and the shut-off level signal for driving IGBT to turn off are opened, bridge arm logical block can at least have stabilized treatment shape State, dead band process state and open process state.
Fig. 4 shows for the structure of the bridge arm logical block for three level bridge arm of diode clamp bit-type of the embodiment of the present invention three It is intended to.With reference to Fig. 4, which includes:Steady statue processing module 401, for, under stabilized treatment state, being handled as follows:Obtain Take current input drive signal;Output drive signal of the current input drive signal with a upper cycle was compared, if worked as Front input drive signal is different from the output drive signal in a upper cycle, then judge to open level in current input drive signal The quantity of signal then processed shape into dead band more than the quantity for opening level signal in the output drive signal in a upper cycle State;Dead band status processing module 402, for, in dead band process state, being handled as follows:Default Dead Time is waited, Carry out opening process state;Opening state processing module 403, for, in process state is opened, being handled as follows:According to work as Front input drive signal, selected the IGBT for needing to open, corresponding position in the output drive signal in a upper cycle is changed to out Logical level signal, waits default first narrow-band impulse to suppress the time, subsequently into stabilized treatment state.
Specifically, opening state processing module 403 can include:First detection and processing unit 4031, for detection be No to meet first condition, first condition is that the position of the current input drive signal corresponding to second IGBT or the 3rd IGBT is The position of level signal and the output drive signal in a upper cycle was opened to turn off level signal, if it is satisfied, then bar will be met The position of the output drive signal in an IGBT corresponding upper cycles of part is changed to open level signal;
Second detection and processing unit 4032, if for being unsatisfactory for first condition, continuing to detect whether satisfaction second Condition, second condition are the position of the current input drive signal corresponding to first IGBT or the 4th IGBT to open level letter Number and the output drive signal in a upper cycle position for shut-off level signal, by the IGBT for meeting a condition corresponding upper cycle The position of output drive signal be changed to open level signal.
Specifically, off state processing module 404 can include:3rd detection and processing unit 4041, for detection be No to meet third condition, third condition is that the position of the current input drive signal corresponding to first IGBT or the 4th IGBT is The position of shut-off level signal and the output drive signal in a upper cycle is to open level signal, if it is satisfied, then bar will be met The position of the output drive signal in an IGBT corresponding upper cycles of part is changed to turn off level signal;
4th detection and processing unit 4042, if for being unsatisfactory for third condition, continuing to detect whether to meet the 4th Condition, it is shut-off level letter that fourth condition is the position of the current input drive signal corresponding to second IGBT or the 3rd IGBT Number and the output drive signal in a upper cycle position to open level signal, by the IGBT for meeting a condition corresponding upper cycle Output drive signal position be changed to turn off level signal.
Explanation is needed exist for, bridge arm logical block at least can also have shut-off process state, and steady statue processes mould Block 401 is can be additionally used under stabilized treatment state, is also handled as follows:If opening level in current input drive signal The quantity of signal then entered shut-off and processes shape less than the quantity for opening level signal in the output drive signal in a upper cycle State, the bridge arm logical block can also include:
Off state processing module 404, for, under shut-off process state, being handled as follows:
According to current input drive signal, selected to need the IGBT of shut-off, by phase in the output drive signal in a upper cycle The position answered is changed to turn off level signal, waits default second narrow-band impulse to suppress the time, subsequently into stabilized treatment state.
The bridge arm logical block for three level bridge arm of diode clamp bit-type of the present invention, in the steady of bridge arm logical block Fixed, dead band, it is switched on or off under arbitrary process state, carries out the process corresponding with residing process state such that it is able to Switch between above-mentioned various process states so that the compatible dead band of input and outfan processes the drive signal of state, nothing By being to open process state to be also off process state, all burst pulse suppression is realized in outfan.
Preferably, if steady statue processing module 401 can be additionally used in the defeated of current input drive signal and a upper cycle Go out drive signal identical, be then maintained at stabilized treatment state;
Under stabilized treatment state, keep output drive signal constant, and with predetermined cycle or predetermined triggering Condition, performs and obtains current input drive signal, and by the output drive signal in current input drive signal and a upper cycle The process being compared.
Further, in order to filter the interference of signal, the bridge arm logical block can also include:
Filtering Processing module, for current input drive signal is obtained the resulting previous input driving of operation with previous Signal is compared, if current input drive signal is different from the previous resulting previous input drive signal of operation that obtains, Filtering Processing is entered then,
Under Filtering Processing state, default filtering time is waited, then judges whether current input drive signal occurs Change, if do not changed, continued executing with the output drive signal by current input drive signal with a upper cycle and enters The process that row compares, in the event of changing, then abandons the current input drive signal of this acquisition, into stabilized treatment state, Continue executing with the operation for obtaining current input drive signal.
Further, in order to when stop signal or fault-signal is received, four are sent to bottom layer driving device To turn off the output drive signal of level signal, and turn off all IGBT.Signal input part can be also used for receiving from system The stop signal of controller and/or fault-signal from bottom layer driving device is received, the bridge arm logical block can also include:
Stop signal or fault-signal processing module, in the case where stop signal or fault-signal is received, to Four bottom layer driving devices send four output drive signals for being shut-off level signal.
Further, in order to shield the rub-out signal that interference and component variations cause, can be by current input letter Number whether it is that rub-out signal is judged, is processed according to judged result accordingly.The bridge arm logical block can also include:
Rub-out signal judge module, for judging whether current input signal is rub-out signal, if current input signal For rub-out signal, then four output drive signals for being shut-off level signal are sent to four bottom layer driving devices, if currently Input signal is not rub-out signal, then continuing executing with the output drive signal by current input drive signal with a upper cycle is carried out Process relatively.
The above, the only specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any Those familiar with the art the invention discloses technical scope in, change or replacement can be readily occurred in, should all be contained Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be defined by the scope of the claims.

Claims (14)

1. a kind of driving method for three level bridge arm of diode clamp bit-type, it is characterised in that the diode clamp bit-type three One bridge arm of level bridge arm include four IGBT and with its one-to-one four bottom layer driving device, and in system controller Bridge arm logical block is provided between bottom layer driving device, the bridge arm logical block has for receiving from the system control The signal input part of the input drive signal of device processed and the driving for sending output drive signal to four bottom layer driving devices are believed Number outfan, the drive signal outfan with the output drive signal latch function to a upper cycle,
The input drive signal and the output drive signal are four parallel level signal, and the level signal is at least wrapped Include level signal is opened and shut-off level signal for driving IGBT to turn off for drive that IGBT opens,
At least there is the bridge arm logical block stabilized treatment state, dead band to process state and open process state, methods described Including:
Under the stabilized treatment state, it is handled as follows:
Obtain current input drive signal;
Output drive signal of the current input drive signal with the upper cycle was compared, if described current defeated Entered that drive signal is different from the output drive signal in a upper cycle, then judge to open level in current input drive signal Whether the quantity of signal was more than the quantity for opening level signal in the output drive signal in a upper cycle,
If the quantity for opening level signal in the current input drive signal is more than the output driving in a upper cycle The quantity for opening level signal in signal, then process state into the dead band,
In the dead band process state, it is handled as follows:
Default Dead Time is waited, is entered and is opened process state,
Open in process state described, be handled as follows:
According to the current input drive signal, the IGBT for needing to open was selected, by the output drive signal in a upper cycle In corresponding position be changed to open level signal, wait default first narrow-band impulse to suppress the time, subsequently into described stable Process state;
The bridge arm logical block at least also has shut-off process state, and methods described also includes:
Under the stabilized treatment state, also it is handled as follows:
If the quantity for opening level signal in the current input drive signal is defeated less equal than the upper cycle What is gone out in drive signal opens the quantity of level signal, then into the shut-off process state,
Under the shut-off process state, it is handled as follows:
According to the current input drive signal, selected to need the IGBT of shut-off, by the output drive signal in a upper cycle In corresponding position be changed to turn off level signal, wait default second narrow-band impulse to suppress the time, subsequently into described stable Process state.
2. driving method according to claim 1, it is characterised in that if current input drive signal with described upper one week The output drive signal of phase is identical, then be maintained at the stabilized treatment state;
Under the stabilized treatment state, keep the output drive signal constant, and with the predetermined cycle or predetermined Trigger condition, performs and obtains current input drive signal, and by the current input drive signal and a upper cycle The process that output drive signal is compared.
3. driving method according to claim 1 and 2, it is characterised in that under the stabilized treatment state, performing general Before the process that the output drive signal in the current input drive signal and a upper cycle is compared, also included:
The current input drive signal is compared with the previous resulting previous input drive signal of operation that obtains, if The current input drive signal is different from the previous resulting previous input drive signal of operation that obtains, then into Filtering Processing State,
Under the Filtering Processing state, default filtering time is waited, whether the current input drive signal is then judged Change, if do not changed, continued executing with defeated by the current input drive signal and a upper cycle Go out the process that drive signal is compared, in the event of changing, then abandon the described current input drive signal of this acquisition, enter Enter stabilized treatment state, continue executing with the operation for obtaining the current input drive signal.
4. driving method according to claim 3, it is characterised in that the signal input part is additionally operable to receive from described The stop signal of system controller and/or fault-signal from the bottom layer driving device is received, methods described also includes:
In the case where stop signal or fault-signal is received, four are sent to four bottom layer driving devices and be shut-off electricity The output drive signal of ordinary mail number.
5. driving method according to claim 1, it is characterised in that open in process state described, works as according to described Front input drive signal, selected the IGBT for needing to open, corresponding position in the output drive signal in a upper cycle is changed to out The process of logical level signal includes:
Detect whether to meet first condition, the first condition is the current input corresponding to second IGBT or the 3rd IGBT The position of drive signal is to open the position of level signal and the output drive signal in a upper cycle to turn off level signal, if full Foot, then be changed to open level signal by the position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle;
If being unsatisfactory for the first condition, continue to detect whether to meet second condition, the second condition is first The position of the current input drive signal corresponding to IGBT or the 4th IGBT is the output for opening level signal and a upper cycle The position of drive signal is shut-off level signal, and the position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle is become Level signal is opened more.
6. driving method according to claim 1, it is characterised in that in the shut-off process state, worked as according to described Front input drive signal, selected to need the IGBT of shut-off, corresponding position in the output drive signal in a upper cycle is changed to close The process of disconnected level signal includes:
Detect whether to meet third condition, the third condition is the current input corresponding to first IGBT or the 4th IGBT The position of drive signal is to turn off the position of level signal and the output drive signal in a upper cycle to open level signal, if full Foot, then be changed to turn off level signal by the position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle;
If being unsatisfactory for the third condition, continue to detect whether to meet fourth condition, the fourth condition is second The position of the current input drive signal corresponding to IGBT or the 3rd IGBT was shut-off level signal and the output in a upper cycle The position of the output drive signal in the IGBT for meeting a condition corresponding upper cycle is become by the position of drive signal to open level signal Level signal is turned off more.
7. driving method according to claim 3, it is characterised in that performing the current input drive signal and institute It is before stating the process that the output drive signal in a cycle is compared, described to judge whether the current input drive signal is sent out Changing, if after the process not changed, also included:
Judge whether the current input signal is rub-out signal, if the current input signal is rub-out signal, to institute State four bottom layer driving devices and send four output drive signals for being shut-off level signal, if the current input signal is not For rub-out signal, then continued executing with the output drive signal by the current input drive signal with the upper cycle and compared Compared with process.
8. a kind of bridge arm logical block for three level bridge arm of diode clamp bit-type, it is characterised in that the diode clamp One bridge arm of three level bridge arm of type include four IGBT and with its one-to-one four bottom layer driving device, bridge arm logical block It is arranged between system controller and bottom layer driving device, the bridge arm logical block has for receiving from system control The signal input part of the input drive signal of device and the drive signal of output drive signal is sent to four bottom layer driving devices Outfan, the drive signal outfan with the output drive signal latch function to a upper cycle,
The input drive signal and the output drive signal are four parallel level signal, and the level signal is at least wrapped Include level signal is opened and shut-off level signal for driving IGBT to turn off for drive that IGBT opens,
At least there is the bridge arm logical block stabilized treatment state, dead band to process state and open process state, the bridge arm Logical block includes:
Steady statue processing module, for, under the stabilized treatment state, being handled as follows:
Obtain current input drive signal;
Output drive signal of the current input drive signal with the upper cycle was compared, if described current defeated Entered that drive signal is different from the output drive signal in a upper cycle, then judge to open level in current input drive signal Whether the quantity of signal was more than the quantity for opening level signal in the output drive signal in a upper cycle,
If the quantity for opening level signal in the current input drive signal is more than the output driving in a upper cycle The quantity for opening level signal in signal, then process state into the dead band,
Dead band status processing module, for, in the dead band process state, being handled as follows:
Default Dead Time is waited, is entered and is opened process state,
Opening state processing module, for opening in process state described, is handled as follows:
According to the current input drive signal, the IGBT for needing to open was selected, by phase in the output drive signal in a upper cycle The position answered is changed to open level signal, waits default first narrow-band impulse to suppress the time, subsequently into the stabilized treatment State;
The bridge arm logical block at least also has shut-off process state, and the steady statue processing module is additionally operable to described Under stabilized treatment state, also it is handled as follows:If the quantity for opening level signal in the current input drive signal Less equal than the quantity for opening level signal in the output drive signal in a upper cycle, then processed into the shut-off State, the bridge arm logical block also include:
Off state processing module, for, under the shut-off process state, being handled as follows:
According to the current input drive signal, selected to need the IGBT of shut-off, by phase in the output drive signal in a upper cycle The position answered is changed to turn off level signal, waits default second narrow-band impulse to suppress the time, subsequently into the stabilized treatment State.
9. bridge arm logical block according to claim 8, it is characterised in that the steady statue processing module be additionally operable to as The current input drive signal of fruit is identical with the output drive signal in a upper cycle, then be maintained at the stabilized treatment state;
Under the stabilized treatment state, keep the output drive signal constant, and with the predetermined cycle or predetermined Trigger condition, performs and obtains current input drive signal, and by the current input drive signal and a upper cycle The process that output drive signal is compared.
10. bridge arm logical block according to claim 8 or claim 9, it is characterised in that the bridge arm logical block also includes:
Filtering Processing module, for the current input drive signal is obtained the resulting previous input driving of operation with previous Signal is compared, if the current input drive signal obtains the resulting previous input drive signal of operation not with previous Together, then into Filtering Processing state,
Under the Filtering Processing state, default filtering time is waited, whether the current input drive signal is then judged Change, if do not changed, continued executing with defeated by the current input drive signal and a upper cycle Go out the process that drive signal is compared, in the event of changing, then abandon the described current input drive signal of this acquisition, enter Enter stabilized treatment state, continue executing with the operation for obtaining the current input drive signal.
11. bridge arm logical blocks according to claim 10, it is characterised in that the signal input part is additionally operable to receive and From the stop signal of the system controller and/or fault-signal from the bottom layer driving device is received, the bridge arm logic Unit also includes:
Stop signal or fault-signal processing module, in the case where stop signal or fault-signal is received, to described Four bottom layer driving devices send four output drive signals for being shut-off level signal.
12. bridge arm logical blocks according to claim 8, it is characterised in that the opening state processing module includes:
First detection and processing unit, for detecting whether meet first condition, the first condition is second IGBT or the The position of the current input drive signal corresponding to three IGBT is the output drive signal for opening level signal and a upper cycle Position be shut-off level signal, if it is satisfied, then by the output drive signal in the IGBT for meeting a condition corresponding upper cycle Position is changed to open level signal;
Second detection and processing unit, if for being unsatisfactory for the first condition, continuing to detect whether to meet second condition, The second condition is the position of the current input drive signal corresponding to first IGBT or the 4th IGBT to open level letter Number and the output drive signal in a upper cycle position for shut-off level signal, by the IGBT for meeting a condition corresponding upper cycle The position of output drive signal be changed to open level signal.
13. bridge arm logical blocks according to claim 8, it is characterised in that the off state processing module includes:
3rd detection and processing unit, for detecting whether meet third condition, the third condition is first IGBT or the The position of the current input drive signal corresponding to four IGBT was shut-off level signal and the output drive signal in a upper cycle Position to open level signal, if it is satisfied, then by the output drive signal in the IGBT for meeting a condition corresponding upper cycle Position is changed to turn off level signal;
4th detection and processing unit, if for being unsatisfactory for the third condition, continuing to detect whether to meet fourth condition, It is shut-off level letter that the fourth condition is the position of the current input drive signal corresponding to second IGBT or the 3rd IGBT Number and the output drive signal in a upper cycle position to open level signal, by the IGBT for meeting a condition corresponding upper cycle Output drive signal position be changed to turn off level signal.
14. bridge arm logical blocks according to claim 10, it is characterised in that the bridge arm logical block also includes:
Rub-out signal judge module, for judging whether the current input signal is rub-out signal, if the current input Signal is rub-out signal, then send four output drive signals for being shut-off level signal to four bottom layer driving devices, If the current input signal not be rub-out signal, continue executing with by the current input drive signal with described upper one week The process that the output drive signal of phase is compared.
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105553313B (en) * 2016-03-02 2019-03-01 深圳市永联科技股份有限公司 NPC type three-level inverter driving circuit and method with protection structure
CN110829802B (en) * 2018-08-14 2022-07-29 中车株洲电力机车研究所有限公司 Three-level half-bridge driving circuit and converter
CN112510978B (en) * 2020-11-24 2021-09-17 廊坊英博电气有限公司 Method, device, equipment and storage medium for suppressing driving narrow pulse
CN115566882B (en) * 2022-11-09 2023-03-21 浙江飞旋科技有限公司 Logic processing device and method for switching signals of three-level inverter circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101588124A (en) * 2008-05-23 2009-11-25 力博特公司 Wave-chasing current-limiting control method of diode mid-point clamping multilevel converter
CN101860031A (en) * 2010-05-20 2010-10-13 河源市雅达电子有限公司 Method for reducing influence of dead time on spatial vector
CN102904217A (en) * 2012-10-12 2013-01-30 深圳市英威腾电气股份有限公司 Diode-clamped three-level insulated gate bipolar translator (IGBT) drive protection circuit, diode-clamped three-level (IGBT) drive module, and diode-clamped three-level topology device
CN103219980A (en) * 2012-01-23 2013-07-24 英飞凌科技奥地利有限公司 Methods for monitoring functionality of a switch and driver units for switches
WO2013151542A1 (en) * 2012-04-04 2013-10-10 Otis Elevator Company Multilevel converter
CN103856093A (en) * 2014-03-03 2014-06-11 深圳市禾望电气有限公司 Inverter dead band time elimination method and device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8847328B1 (en) * 2013-03-08 2014-09-30 Ixys Corporation Module and assembly with dual DC-links for three-level NPC applications

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101588124A (en) * 2008-05-23 2009-11-25 力博特公司 Wave-chasing current-limiting control method of diode mid-point clamping multilevel converter
CN101860031A (en) * 2010-05-20 2010-10-13 河源市雅达电子有限公司 Method for reducing influence of dead time on spatial vector
CN103219980A (en) * 2012-01-23 2013-07-24 英飞凌科技奥地利有限公司 Methods for monitoring functionality of a switch and driver units for switches
WO2013151542A1 (en) * 2012-04-04 2013-10-10 Otis Elevator Company Multilevel converter
CN102904217A (en) * 2012-10-12 2013-01-30 深圳市英威腾电气股份有限公司 Diode-clamped three-level insulated gate bipolar translator (IGBT) drive protection circuit, diode-clamped three-level (IGBT) drive module, and diode-clamped three-level topology device
CN103856093A (en) * 2014-03-03 2014-06-11 深圳市禾望电气有限公司 Inverter dead band time elimination method and device

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