CN104753050A - Constant-current protection solid-state power controller and solid-state power control method - Google Patents
Constant-current protection solid-state power controller and solid-state power control method Download PDFInfo
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Abstract
The invention relates to a constant-current protection solid-state power controller and a solid-state power control method. The constant-current protection solid-state power controller comprises an efficiency field effect tube, a sampling resistor, a sampling conversion circuit, a suspension grid driving circuit and an FPGA, wherein a drain electrode of the power field effect tube is connected with a bus, and while a source electrode of the power field effect tube is connected with one end of the sampling resistor; the other end of the sampling resistor is connected in series with a load; two input ends of the sampling converting circuit are connected in parallel to two ends of the sampling resistor; one output end of the sampling converting circuit is connected with the FPGA; the FPGA is connected with the other output end of the sampling converting circuit and connected with the suspension grid driving circuit. According to the constant-current protection solid-state power controller, the constant-current technology is adopted, so that the interference of the electric devices on a bus of a power supply during power on and power off can be completely avoided; in addition, the I2T protection technology is utilized to protect the power supply output of the loads of the electric devices.
Description
Technical field
The present invention relates in the severe rugged environments such as Aeronautics and Astronautics, the constant current protection solid-state power controller of 5 ~ 270V DC distribution device, distribution overload protection, inlet highway protection and solid state power control method.
Background technology
Traditional DC electrical appliance all adopts molten electrical equipment, mechanical switch etc. to carry out circuit protection, add power-off source; unavoidably there is mechanical properties, consistency is poor, switch life is limited drawback in this kind of circuit design; the use of the severe rugged environments such as Aeronautics and Astronautics can not be met; solid-state power controller is the solid-state components and parts integrating the translation function of relay and the defencive function of circuit breaker, is the switching device of the control load break-make matched with solid state distribution system.It has contactless, without electric arc, noiseless, response is fast, electromagnetic interference is little, the life-span is long, reliability is high and be convenient to the advantages such as computer long-distance control.
The product of existing SSPC and patent are only carry out inverse time protection, if having problems as there is the random surge of start, may turn off by mistake, be only " escaping ", can not suppress very well for bus start surge.
Summary of the invention
Technical problem to be solved by this invention be to provide a kind of be applied to the collector load of 5 ~ 270V direct-flow electricity utilization apparatus overcurrent, the overload crossing consumption protection and bus, electrical appliance Surge suppression in one, the constant current that utilizes constant current protection algorism and inverse time protection algorithm protects solid-state power controller and solid state power control method.
The technical scheme that the present invention solves the problems of the technologies described above is as follows: a kind of constant current protection solid-state power controller, comprises power field effect pipe, sampling resistor, sample conversion circuit, suspended gate drive circuit and FPGA;
The drain electrode of described power field effect pipe is connected with bus, the source electrode of described power field effect pipe is connected with one end of described sampling resistor, the other end of described sampling resistor is connected with one end of load, the other end ground connection of described load, is connected with the grid of described power field effect pipe for driving the suspended gate drive circuit of described power field effect pipe;
Two inputs of described sample conversion circuit are connected in parallel on the two ends of described sampling resistor, for gathering voltage signal on sampling resistor and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
An output of described sample conversion circuit is connected with described FPGA, for the voltage signal after analog-to-digital conversion and current signal are passed to FPGA;
FPGA described in described FPGA is connected with described suspended gate drive circuit; described FPGA produces inverse time lag control signal and constant-current control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe to carry out inverse time protection and constant current protection to load by controlling described suspended gate drive circuit.
The invention has the beneficial effects as follows: adopt " constant current resist technology " to protect direct current supply bus; Operating voltage rail wide ranges, for 5 ~ 270V DC bus bus protection; Control redundancy is large, can carry out observing and controlling, parallel redundancy.
On the basis of technique scheme, the present invention can also do following improvement.
Further, described FPGA comprises inverse time protection module, communication module and constant current protection module;
Described inverse time protection module is connected with described communication module, described inverse time protection module utilizes inverse time protection algorithm to calculate to the voltage signal of input and current signal, obtain inverse time lag control signal, inverse time lag control signal is sent to suspended gate drive circuit, and by communication module, inverse time lag control signal is sent to host computer;
Described constant current protection module is connected with described communication module; described constant current protection module utilizes constant current protection algorism to calculate to the voltage signal of input and current signal; obtain constant-current control signal; constant-current control signal is sent to suspended gate drive circuit, and by communication module, constant-current control signal is sent to host computer.
Further, described sampling protective circuit comprises sample circuit and A/D change-over circuit;
Described sample circuit is connected with described A/D change-over circuit, two inputs of sample circuit are connected in parallel on the two ends of described sampling resistor, sample circuit is for gathering voltage signal on sampling resistor and current signal, and A/D change-over circuit is for carrying out A/D conversion by the voltage signal on the sampling resistor of collection and current signal.
Further, a kind of direct-flow current consumer, comprises constant current protection solid-state power controller.
Further, a kind of solid state power control method adopting constant current to protect solid-state power controller, comprises the following steps:
Step 1: the voltage signal on described sample conversion circuit collection sampling resistor and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
Step 2: when load generation over-current phenomenon avoidance, if when the current value of current flow signal is greater than default constant current value, performs step 3, otherwise, perform step 4;
Step 3: described FPGA carries out constant current protection and inverse time protection to load, performs step 5;
Step 4: described FPGA carries out inverse time protection to load, performs step 5;
Step 5: end process.
Further; described FPGA carries out constant current protection to load and is specially: described FPGA utilizes constant current protection algorism to calculate according to the voltage signal after analog-to-digital conversion and current signal; produce constant-current control signal; suspended gate drive circuit according to the constant-current control signal driving power field effect transistor of input, and then carries out constant current protection to load.
Further; described FPGA carries out inverse time protection to load and is specially: described FPGA produces inverse time lag control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe to carry out inverse time protection to load by controlling described suspended gate drive circuit.
Further, also comprise in described step 5, if load is still in over-current state, then cut off load.
Further, described inverse time lag control signal comprises inverse time lag parameter and switch controlling signal.
Further, described inverse time lag parameter is calculated by inverse time protection algorithm.
Accompanying drawing explanation
Fig. 1 is random surge schematic diagram when protecting without constant current;
Fig. 2 is that the present invention adds surge waveform schematic diagram immediately after constant current protection;
Fig. 3 is constant current of the present invention, I
2t current time external characteristic figure;
Fig. 4 is constant current protecting control flow chart of the present invention;
Fig. 5 is circuit principle structure figure of the present invention.
In accompanying drawing, the list of parts representated by each label is as follows:
1, power field effect pipe, 2, sampling resistor, 3, sample conversion circuit, 3-1, sample circuit, 3-2, A/D change-over circuit, 4, suspended gate drive circuit, 5, FPGA, 5-1, inverse time protection module, 5-2, communication module, 5-3, constant current protection module.
Embodiment
Be described principle of the present invention and feature below in conjunction with accompanying drawing, example, only for explaining the present invention, is not intended to limit scope of the present invention.
Embodiment 1
A kind of constant current protection solid-state power controller, comprises power field effect pipe 1, sampling resistor 2, sample conversion circuit 3, suspended gate drive circuit 4 and FPGA5;
The drain electrode of described power field effect pipe 1 is connected with bus, the source electrode of described power field effect pipe 1 is connected with one end of described sampling resistor 2, the described other end of sampling resistor 2 is connected with one end of load, the other end ground connection of described load, is connected with the grid of described power field effect pipe 1 for driving the suspended gate drive circuit (4) of described power field effect pipe 1;
Two inputs of described sample conversion circuit 3 are connected in parallel on the two ends of described sampling resistor 2, for gathering voltage signal on sampling resistor 2 and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
An output of described sample conversion circuit 3 is connected with described FPGA 5, for the voltage signal after analog-to-digital conversion and current signal are passed to FPGA 5;
Described in described FPGA 5, FPGA 5 is connected with described suspended gate drive circuit 4; described FPGA 5 produces inverse time lag control signal and constant-current control signal according to the voltage signal after analog-to-digital conversion and current signal, drives the 1 pair of load of described power field effect pipe to carry out inverse time protection and constant current protection by controlling described suspended gate drive circuit 4.
Described FPGA5 comprises inverse time protection module 5-1, communication module 5-2 and constant current protection module 5-3;
Described inverse time protection module 5-1 is connected with described communication module 5-2, described inverse time protection module 5-1 utilizes inverse time protection algorithm to calculate to the voltage signal of input and current signal, obtain inverse time lag control signal, inverse time lag control signal is sent to suspended gate drive circuit 4, and by communication module 5-2, inverse time lag control signal is sent to host computer;
Described constant current protection module 5-3 is connected with described communication module 5-2; described constant current protection module 5-3 utilizes constant current protection algorism to calculate to the voltage signal of input and current signal; obtain constant-current control signal; constant-current control signal is sent to suspended gate drive circuit 4, and by communication module 5-2, constant-current control signal is sent to host computer.
Described sampling protective circuit 3 comprises sample circuit 3-1 and A/D change-over circuit 3-2;
Described sample circuit 3-1 is connected with described A/D change-over circuit 3-2, two inputs of sample circuit 3-1 are connected in parallel on the two ends of described sampling resistor 2, sample circuit 3-1 is for gathering voltage signal on sampling resistor 2 and current signal, and A/D change-over circuit 3-2 is used for the voltage signal on the sampling resistor 2 of collection and current signal to carry out A/D conversion.
A kind of direct-flow current consumer, comprises constant current protection solid-state power controller.
Adopt constant current to protect a solid state power control method for solid-state power controller, comprise the following steps:
Step 1: described sample conversion circuit 3 gathers voltage signal on sampling resistor 2 and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
Step 2: when load generation over-current phenomenon avoidance, if when the current value of current flow signal is greater than default constant current value, performs step 3, otherwise, perform step 4;
Step 3: described FPGA5 carries out constant current protection and inverse time protection to load, performs step 5;
Step 4: described FPGA5 carries out inverse time protection to load, performs step 5;
Step 5: end process.
Described FPGA5 carries out constant current protection to load and is specially: described FPGA5 utilizes constant current protection algorism to calculate according to the voltage signal after analog-to-digital conversion and current signal; produce constant-current control signal; suspended gate drive circuit 4 according to the constant-current control signal driving power field effect transistor 1 of input, and then carries out constant current protection to load.
Described FPGA5 carries out inverse time protection to load and is specially: described FPGA5 produces inverse time lag control signal according to the voltage signal after analog-to-digital conversion and current signal, drives the 1 pair of load of described power field effect pipe to carry out inverse time protection by controlling described suspended gate drive circuit 4.
Also comprise in described step 5, if load is still in over-current state, then cut off load.
Described inverse time lag control signal comprises inverse time lag parameter and switch controlling signal.
Described inverse time lag parameter is calculated by inverse time protection algorithm.
As shown in Figure 1, for protecting without constant current random surge schematic diagram time; Fig. 2 is that the present invention adds surge waveform schematic diagram immediately after constant current protection; CCSSPC has had concurrently and has consumed protection (inverse time protection) to the mistake of electrical appliance, also has bus surge protection (constant current protection can suppress current surge in any case).
CCSSPC mainly comprises power Mosfet, detects resistance, A/D convertor circuit, sample circuit, suspended gate drive circuit, inverse time protection algorithm, communication module.
Power Mosfet is as switch, and the direct connection bus current sampling circuit that drains input is connected in parallel on sampling resistor two ends, outputs to FPGA and constant-current circuit, the function that FPGA realizes inverse time protection algorithm and communicates with host computer through sampling and AD conversion; Current signal inputs constant flow module simultaneously, forms closed-loop control.
When normal work CCSSPC by the voltage of sampling, current signal by the communication line of FPGA and isolation to host computer.When abnormal conditions generation overcurrent appears in load, if exceed setting constant current value, then start constant current protection, and inverse time protection, constant current a period of time (being determined by the parameter of inverse time lag), if extremely do not terminate, cuts off load; If generation overcurrent, but do not exceed constant current point, then only start inverse time protection, protection curve can according to load state User Defined.
As shown in Figure 5, in CCSSPC, Mosfet, as main switching device, controls the break-make of load.Mosfet is by suspended gate drive circuit Direct driver, and the break-make control signal of drive circuit is produced by FPGA and constant current protection algorism.
I
2t protection and constant current protection algorism are protected CCSSPC institute control load simultaneously, when load current generation overcurrent, and I
2namely T protection starts, and judges manner of execution and time delay according to overcurrent condition, and served as and flow to when exceeding constant current point, constant-current circuit carries out constant current protection.Wherein " I
2t " for protection electrical appliance overcurrent, cross consumption; " constant current " is overload, the electricity consumption surge of protection power supply buses.
As Fig. 4, the feedback signal of constant current protection is input in constant current protecting control circuit through AD conversion after carrying out current sample to sampling resistor, produces control signal driving switch pipe, finally reach constant current through control circuit.Add the CCSSPC current time external characteristic curve of constant current protection as shown in Figure 3.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a constant current protection solid-state power controller, it is characterized in that, comprise power field effect pipe (1), sampling resistor (2), sample conversion circuit (3), suspended gate drive circuit (4) and FPGA (5);
The drain electrode of described power field effect pipe (1) is connected with bus, the source electrode of described power field effect pipe (1) is connected with one end of described sampling resistor (2), the other end of described sampling resistor (2) is connected with one end of load, the other end ground connection of described load, is connected with the grid of described power field effect pipe (1) for driving the suspended gate drive circuit (4) of described power field effect pipe (1);
Two inputs of described sample conversion circuit (3) are connected in parallel on the two ends of described sampling resistor (2), for gathering voltage signal on sampling resistor (2) and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
An output of described sample conversion circuit (3) is connected with described FPGA (5), for the voltage signal after analog-to-digital conversion and current signal are passed to FPGA (5);
Described FPGA (5) described FPGA (5) is connected with described suspended gate drive circuit (4); described FPGA (5) produces inverse time lag control signal and constant-current control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe (1) to carry out inverse time protection and constant current protection to load by controlling described suspended gate drive circuit (4).
2. constant current protection solid-state power controller according to claim 1, it is characterized in that, described FPGA (5) comprises inverse time protection module (5-1), communication module (5-2) and constant current protection module (5-3);
Described inverse time protection module (5-1) is connected with described communication module (5-2), described inverse time protection module (5-1) utilizes inverse time protection algorithm to calculate to the voltage signal of input and current signal, obtain inverse time lag control signal, inverse time lag control signal is sent to suspended gate drive circuit (4), and by communication module (5-2), inverse time lag control signal is sent to host computer;
Described constant current protection module (5-3) is connected with described communication module (5-2); described constant current protection module (5-3) utilizes constant current protection algorism to calculate to the voltage signal of input and current signal; obtain constant-current control signal; constant-current control signal is sent to suspended gate drive circuit (4), and by communication module (5-2), constant-current control signal is sent to host computer.
3. constant current protection solid-state power controller according to claim 1, it is characterized in that, described sampling protective circuit (3) comprises sample circuit (3-1) and A/D change-over circuit (3-2);
Described sample circuit (3-1) is connected with described A/D change-over circuit (3-2), two inputs of sample circuit (3-1) are connected in parallel on the two ends of described sampling resistor (2), sample circuit (3-1) is for gathering voltage signal on sampling resistor (2) and current signal, and A/D change-over circuit (3-2) is for carrying out A/D conversion by the voltage signal on the sampling resistor (2) gathered and current signal.
4. a direct-flow current consumer, is characterized in that, comprise as arbitrary in claims 1 to 3 as described in constant current protection solid-state power controller.
5. adopt described constant current as arbitrary in claims 1 to 3 to protect a solid state power control method for solid-state power controller, it is characterized in that, comprise the following steps:
Step 1: the voltage signal on described sample conversion circuit (3) collection sampling resistor (2) and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
Step 2: when load generation over-current phenomenon avoidance, if when the current value of current flow signal is greater than default constant current value, performs step 3, otherwise, perform step 4;
Step 3: described FPGA (5) carries out constant current protection and inverse time protection to load, performs step 5;
Step 4: described FPGA (5) carries out inverse time protection to load, performs step 5;
Step 5: end process.
6. solid state power control method according to claim 5; it is characterized in that; described FPGA (5) carries out constant current protection to load and is specially: described FPGA (5) utilizes constant current protection algorism to calculate according to the voltage signal after analog-to-digital conversion and current signal; produce constant-current control signal; suspended gate drive circuit (4) according to the constant-current control signal driving power field effect transistor (1) of input, and then carries out constant current protection to load.
7. solid state power control method according to claim 5; it is characterized in that; described FPGA (5) carries out inverse time protection to load and is specially: described FPGA (5) produces inverse time lag control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe (1) to carry out inverse time protection to load by controlling described suspended gate drive circuit (4).
8. solid state power control method according to claim 5, is characterized in that, also comprises in described step 5, if load is still in over-current state, then cuts off load.
9. solid state power control method according to claim 5, is characterized in that, described inverse time lag control signal comprises inverse time lag parameter and switch controlling signal.
10. solid state power control method according to claim 9, is characterized in that, described inverse time lag parameter is calculated by inverse time protection algorithm.
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Cited By (5)
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| CN105514949A (en) * | 2016-01-28 | 2016-04-20 | 中国科学院空间应用工程与技术中心 | Solid state power controller with latent flux prevention function and control method |
| CN106773932A (en) * | 2016-12-06 | 2017-05-31 | 武汉工程大学 | Digitlization based on FPGA is by ripple current limiting system and guard method |
| CN107317314A (en) * | 2017-08-15 | 2017-11-03 | 中国航天时代电子公司 | A kind of solid-state power controller with current-limiting protection and inverse time-lag protection function |
| CN108233347A (en) * | 2016-12-14 | 2018-06-29 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of brushless motor controller Over Current Protection System and over-current protection method |
| CN113655739A (en) * | 2021-07-22 | 2021-11-16 | 北京卫星制造厂有限公司 | Configurable digital solid-state power distribution system based on FPGA |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105514949A (en) * | 2016-01-28 | 2016-04-20 | 中国科学院空间应用工程与技术中心 | Solid state power controller with latent flux prevention function and control method |
| CN106773932A (en) * | 2016-12-06 | 2017-05-31 | 武汉工程大学 | Digitlization based on FPGA is by ripple current limiting system and guard method |
| CN108233347A (en) * | 2016-12-14 | 2018-06-29 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of brushless motor controller Over Current Protection System and over-current protection method |
| CN108233347B (en) * | 2016-12-14 | 2019-06-07 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of brushless motor controller Over Current Protection System and over-current protection method |
| CN107317314A (en) * | 2017-08-15 | 2017-11-03 | 中国航天时代电子公司 | A kind of solid-state power controller with current-limiting protection and inverse time-lag protection function |
| CN107317314B (en) * | 2017-08-15 | 2019-03-15 | 中国航天时代电子公司 | A kind of solid-state power controller with current-limiting protection and inverse time-lag protection function |
| CN113655739A (en) * | 2021-07-22 | 2021-11-16 | 北京卫星制造厂有限公司 | Configurable digital solid-state power distribution system based on FPGA |
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