CN104751558B - Banknote tester, currency detecting system and banknote detection method - Google Patents
Banknote tester, currency detecting system and banknote detection method Download PDFInfo
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- CN104751558B CN104751558B CN201510142451.3A CN201510142451A CN104751558B CN 104751558 B CN104751558 B CN 104751558B CN 201510142451 A CN201510142451 A CN 201510142451A CN 104751558 B CN104751558 B CN 104751558B
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- frame
- synchronizing signal
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Abstract
The embodiments of the invention provide a kind of banknote tester, currency detecting system and banknote detection method, methods described includes：Synchronizing signal forwarding step:Produce and frame synchronizing signal is sent by GPIO；Collection packing step；Initialization step：GPIO is produced according to the frame synchronizing signal that receives to interrupt, and carries out initialization operation and opening timing device is to prepare to receive data；Data reception step；Frame interrupts judgment step；Frame interrupt processing step；Abnormality processing step：Timer interruption is triggered, the value of anomalous counts device adds 1 and Off Timer；And currency examination judgment step.The mode that the embodiment of the present invention coordinates by using frame synchronizing signal and timer interruption finds and counts banknote data exception in time, data independence is good between banknote, will not because of a banknote under the influence of the data exception of a banknote data, the probability for the not clear paper money of batch occur is reduced, currency examination efficiency is improved.
Description
Technical field
The invention belongs to paper currency detection technical field, more particularly to a kind of banknote tester, currency detecting system and banknote detection method.
Background technology
After existing banknote tester, the data for having received a banknote, a frame can be produced immediately and interrupted, and itself is entered
The initialization of row component register, and then start the reception of next banknote data.
However, during currency examination often occur banknote re-open, even or data acquisition less than situation, will result in
Frame interruption can be just produced after the completion of loss of data, only next banknote data filling, thus causes the banknote that the beginning is opened from this
Data are all abnormal datas, have had a strong impact on currency examination result and efficiency.
The content of the invention
The purpose of the embodiment of the present invention, which is that offer is a kind of, can find banknote tester, the currency examination of banknote data exception in time
System and banknote detection method, to ensure the correctness of currency examination data, improve currency examination efficiency.
The banknote detection method of the embodiment of the present invention includes：Synchronizing signal forwarding step：Produce and frame synchronization is sent by GPIO
Signal；
Collection packing step：The corresponding image of collection banknote, magnetic and thickness data are simultaneously transmitted；
Initialization step：GPIO is produced according to the frame synchronizing signal received to interrupt, and is carried out initialization operation and is opened fixed
When device with prepare receive data；
Data reception step：Receive currency examination data；
Frame interrupts judgment step：Judge whether that producing frame interrupts, if then entering frame interrupt processing step, if otherwise entering
Abnormality processing step；
Frame interrupt processing step：Off Timer is interrupted；
Abnormality processing step：Timer interruption is triggered, the value of anomalous counts device adds 1 and Off Timer；And
Currency examination judgment step：Judge whether currency examination terminates, if then terminating flow, if otherwise returning to synchronizing signal sends step
Suddenly.
Further, initialization includes initializing UPP, SPI and timer in the initialization step, and opens
UPP is enabled and SPI is enabled.
Further, synchronizing signal forwarding step includes：
Synchronizing signal produces sub-step：Produce frame synchronizing signal；And
Synchronizing signal judges sub-step：Judge whether GPIO receives frame synchronizing signal, if then entering initialization step, if
Otherwise this step is repeated.
Further, frame, which is interrupted, also includes calculation step between judgment step and currency examination judgment step：To the currency examination of reception
Data carry out calculation process and export currency examination information.
Further, the currency examination data are the corresponding image of individual banknotes, magnetic and thickness data through packing processing.
The embodiment of the present invention also provides a kind of banknote tester simultaneously, including：
Produce and sent by GPIO the frame synchronizing signal generation module of frame synchronizing signal；
The corresponding image of collection banknote, magnetic and thickness data and the collection packetization module transmitted；
Detection in real time receives and forwards the synchronizing signal judge module of the frame synchronizing signal；
GPIO is produced according to the frame synchronizing signal received to interrupt, and is carried out initialization operation and is produced the instruction of opening timing device
To prepare the initialization module for receiving data；
Receive the data reception module of currency examination data；
Judge whether to produce the frame interruption judge module that frame is interrupted；
Producing the frame interruption processing module of generation Off Timer interrupt instruction when frame is interrupted；
The instruction of triggering timer interruption, anomalous counts device accumulated instruction and Off Timer are produced when frame is interrupted not producing
The exception processing module of instruction；
Timing is started according to the instruction of opening timing device, interrupted according to Off Timer interrupt instruction Off Timer, according to
Off Timer instructs the timer of timeing closing；
The anomalous counts device that own value is added 1 according to anomalous counts device accumulated instruction；And
Judge whether currency examination terminates, if then terminating to judge, if otherwise notifying initialization module to proceed currency examination processing
Currency examination judge module.
Further, the frame synchronizing signal generation module and collection packetization module are integrated in FPGA unit.
Further, the synchronizing signal judge module, initialization module, data reception module, frame interrupt judge module,
Frame interruption processing module, exception processing module, timer, anomalous counts device and currency examination judge module are integrated in DSP unit,
DSP unit also includes carrying out calculation process to the currency examination data of reception and exports the computing module of currency examination information.
The embodiment of the present invention is also simultaneously there is provided a kind of currency detecting system, including banknote tester as described above, in addition to even
The banknote tester is connected to, control instruction is sent to banknote tester and receives the main control computer of banknote tester feedback information.
The mode that the embodiment of the present invention coordinates by using frame synchronizing signal and timer interruption finds and counts paper money in time
Ticket data is abnormal, and data independence is good between banknote, will not because of a banknote under the influence of the data exception of a banknote data,
The probability for the not clear paper money of batch occur is reduced, currency examination efficiency is improved.
Brief description of the drawings
Fig. 1 is the currency detecting system topological structure schematic diagram of the embodiment of the present invention.
Fig. 2 is the banknote tester data communication topological structure schematic diagram of the embodiment of the present invention.
Fig. 3 is the modular structure schematic diagram of the banknote tester of the embodiment of the present invention.
Fig. 4 is the banknote detection method flow chart of the embodiment of the present invention.
Fig. 5 is the schematic flow sheet of the synchronizing signal forwarding step of the embodiment of the present invention.
Description of reference numerals.
Banknote tester 100.
FPGA unit 10.
Frame synchronizing signal generation module 11.
Gather packetization module 12.
DSP unit 20.
Synchronizing signal judge module 21.
Initialization module 22.
Data reception module 23.
Frame interrupts judge module 24.
Frame interruption processing module 25.
Exception processing module 26.
Timer 27.
Anomalous counts device 28.
Currency examination judge module 29.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.For the ease of understanding and describing presently filed embodiment, first following technical term is illustrated.
Main control computer, Main Controller, is abbreviated as MC.
Field programmable gate array, Field-Programmable Gate Array, is abbreviated as FPGA, it be PAL,
The product further developed on the basis of the programming devices such as GAL, CPLD.
Digital signal processor, Digital Signal Processor, is abbreviated as DSP.
Universal parallel interface, Universal Parallel Port, is abbreviated as UPP.
SPI, Serial Peripheral Interface, is abbreviated as SPI.
General input/output port, General-Purpose Input/Output Ports, is abbreviated as GPIO.
The currency detecting system topological structure schematic diagram of the embodiment of the present invention shown in Fig. 1 is refer to, the currency detecting system includes
Banknote tester 100, in addition to the banknote tester 100 is connected to, send control instruction to banknote tester 100 and receive currency examination dress
Put the main control computer (MC) of 100 feedback informations.MC is completed to issue control command to slave computer (in the present embodiment as host computer
Banknote tester 100, including a FPGA and multiple DSP) and the feedback information that slave computer is uploaded is received, the feedback information is preferred
For currency examination information.
The data communication topological structure schematic diagram of banknote tester 100 of the embodiment of the present invention shown in Fig. 2 is refer to, FPGA leads to
Cross UPP, SPI and be connected to DSP, each sensing data collected is sent to each DSP by FPGA, and DSP carries out calculation process, obtained
Go out currency examination information.
Please also refer to the modular structure schematic diagram of the banknote tester 100 of the embodiment of the present invention shown in Fig. 3, the currency examination
Device 100 includes FPGA unit 10 and DSP unit 20.
Frame synchronizing signal generation module 11 and collection packetization module 12 are integrated with FPGA unit 10.
Frame synchronizing signal generation module 11 is used to produce and sends frame synchronizing signal by GPIO.
The corresponding image of the collection collection banknote of packetization module 12, magnetic and thickness data are simultaneously transmitted.
It is integrated with DSP unit 20 in synchronizing signal judge module 21, initialization module 22, data reception module 23, frame
Disconnected judge module 24 and frame interruption processing module 25.
Synchronizing signal judge module 21, which is used to detect in real time, to be received and forwards the frame synchronizing signal.
Initialization module 22 produces GPIO according to the frame synchronizing signal received and interrupted, and carries out initialization operation and produce to open
Timer instruction is opened to prepare to receive data.
Data reception module 23 is used to receive currency examination data.
Frame, which interrupts judge module 24, to be used to judge whether that producing frame interrupts.Specifically, UPP, the SPI for being connected to DSP are connecing
Receive predetermined amount of data（The partial data of such as one banknote）Currency examination data when can produce frame interruption.
Frame interruption processing module 25 is producing generation Off Timer interrupt instruction when frame is interrupted.
Exception processing module 26, timer 27, anomalous counts device 28 and currency examination judge module are also integrated with DSP unit 20
29。
Exception processing module 26 produces the instruction of triggering timer interruption, the cumulative finger of anomalous counts device when not producing frame interruption
Order and Off Timer instruction.
Timer 27 starts timing according to the instruction of opening timing device, according in Off Timer interrupt instruction Off Timer
It is disconnected, timeing closing is instructed according to Off Timer.
Own value is added 1 by anomalous counts device 28 according to anomalous counts device accumulated instruction, and then carries out anomaly statistics, Yi Jiyi
The often operation such as alarm, to note abnormalities and be counted in time, can also be simultaneously emitted by warning.
Currency examination judge module 29 judges whether currency examination terminates, if then terminating to judge, if otherwise notifying initialization module 22
Proceed currency examination processing.
As a kind of embodiment, DSP unit 20 also includes the currency examination data of reception are carried out with calculation process and is exported to test
The computing module of paper money information（It is not shown）.
Fig. 4 is refer to, the banknote detection method of the embodiment of the present invention includes following steps.
Synchronizing signal forwarding step S1：Frame synchronizing signal generation module 11 produces and sends frame synchronizing signal extremely by GPIO
DSP unit 20.Collection packing step S2：The corresponding image of the collection collection banknote of packetization module 12, magnetic and thickness data are simultaneously beaten
It is bundled into currency examination data and is transmitted processing.
Initialization step S3：Initialization module 22 produces GPIO according to the frame synchronizing signal received and interrupted, and carries out initial
Change operation and opening timing device 27 with prepare receive data.Specifically, initialization is included to UPP, SPI in the initialization step
And timer 27 is initialized, and open UPP enables and SPI enables.
Data reception step S4：Data reception module 23 receives currency examination data；Specifically, the currency examination data are through packing
The corresponding image of individual banknotes, magnetic and the thickness data of processing.
Frame interrupts judgment step S5：Frame interrupts judge module 24 and judges whether that producing frame interrupts, and is interrupted if then entering frame
Process step S6, if otherwise entering abnormality processing step S7.
Frame interrupt processing step S6：The Off Timer of frame interruption processing module 25 is interrupted.
Abnormality processing step S7：Exception processing module 26 triggers timer interruption, and the value of anomalous counts device 28 adds 1 and closed
Timer 27.
Calculation step S8：Computing module carries out calculation process to the currency examination data of reception and exports currency examination information.Preferably,
Calculation step S8 can be individually placed in progress after frame interrupt processing step S6, and frame interrupt processing step S6 can also be placed in simultaneously
Carried out with after abnormality processing step S7, also to carry out calculation process to incomplete currency examination data and export currency examination information, with
It is standby to check afterwards.
Currency examination judgment step S9：Currency examination judge module 29 judges whether currency examination terminates, if then terminating flow, if otherwise returning
Synchronizing signal forwarding step S1 is returned, the reception operation of next frame synchronizing signal and currency examination data is carried out.
It refer to Fig. 5, the synchronizing signal forwarding step S1 of embodiment of the present invention schematic flow sheet, it includes following two
Sub-step.
Synchronizing signal produces sub-step S21：Frame synchronizing signal generation module 11 produces frame synchronizing signal.
Synchronizing signal judges sub-step S22：Synchronizing signal judge module 21 judges whether GPIO receives frame synchronizing signal, if
It is then to enter initialization step S3, if otherwise repeating this step.Preferably, synchronizing signal is returned in currency examination judgment step S9 to send
Step S1 is to be back to synchronizing signal to judge sub-step S22.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
Any modifications, equivalent substitutions and improvements made within refreshing and principle etc., should be included in the scope of the protection.
Claims (7)
1. a kind of banknote detection method, it is characterised in that the banknote detection method includes：
Synchronizing signal forwarding step：FPGA unit produces and sends frame synchronizing signal by GPIO；
Collection packing step：The corresponding image of FPGA unit collection banknote, magnetic and thickness data are simultaneously transmitted；
Initialization step：DSP unit produces GPIO according to the frame synchronizing signal received and interrupted, and carries out initialization operation and opens
Timer with prepare receive data；
Data reception step：DSP unit receives currency examination data；
Frame interrupts judgment step：DSP unit judges whether that producing frame interrupts, if then entering frame interrupt processing step, if otherwise
Into abnormality processing step；
Frame interrupt processing step：DSP unit Off Timer is interrupted；
Abnormality processing step：DSP unit triggers timer interruption, and the value of anomalous counts device adds 1 and Off Timer；And
Currency examination judgment step：DSP unit judges whether currency examination terminates, if then terminating flow, if otherwise returning to synchronizing signal hair
Send step.
2. banknote detection method according to claim 1, it is characterised in that initialization is included to general in the initialization step
Parallel interface, SPI and timer are initialized, and open universal parallel interface enable and SPI enables.
3. banknote detection method according to claim 1, it is characterised in that synchronizing signal forwarding step includes：
Synchronizing signal produces sub-step：Produce frame synchronizing signal；And
Synchronizing signal judges sub-step：Judge whether GPIO receives frame synchronizing signal, if then entering initialization step, if otherwise
Repeat this step.
4. banknote detection method according to claim 1, it is characterised in that frame is interrupted between judgment step and currency examination judgment step
Also include calculation step：Currency examination data to reception carry out calculation process and export currency examination information, wherein, calculation step can be single
Progress after frame interrupt processing step is solely placed in, the laggard of frame interrupt processing step and abnormality processing step can also be placed in simultaneously
OK.
5. banknote detection method according to claim 1, it is characterised in that the currency examination data are individual paper money through packing processing
The corresponding image of ticket, magnetic and thickness data.
6. a kind of banknote tester, it is characterised in that the banknote tester includes：
Produce and sent by GPIO the frame synchronizing signal generation module of frame synchronizing signal；
The corresponding image of collection banknote, magnetic and thickness data and the collection packetization module transmitted；
Detection in real time receives and forwards the synchronizing signal judge module of the frame synchronizing signal；
GPIO is produced according to the frame synchronizing signal received to interrupt, and is carried out initialization operation and is produced the instruction of opening timing device with standard
The standby initialization module for receiving data；
Receive the data reception module of currency examination data；
Judge whether to produce the frame interruption judge module that frame is interrupted；
Producing the frame interruption processing module of generation Off Timer interrupt instruction when frame is interrupted；
The instruction of triggering timer interruption, anomalous counts device accumulated instruction and Off Timer instruction are produced when frame is interrupted not producing
Exception processing module；
Timing is started according to the instruction of opening timing device, interrupted according to Off Timer interrupt instruction Off Timer, according to closing
Timer instructs the timer of timeing closing；
The anomalous counts device that own value is added 1 according to anomalous counts device accumulated instruction；And
Judge whether currency examination terminates, if then terminating to judge, if otherwise notifying initialization module to proceed testing for currency examination processing
Paper money judge module；
Wherein, the frame synchronizing signal generation module and collection packetization module are integrated in FPGA unit；
The synchronizing signal judge module, initialization module, data reception module, frame interrupt judge module, frame interrupt processing mould
Block, exception processing module, timer, anomalous counts device and currency examination judge module are integrated in DSP unit, and DSP unit also includes
Currency examination data to reception carry out calculation process and export the computing module of currency examination information.
7. a kind of currency detecting system, it is characterised in that the currency detecting system includes banknote tester as claimed in claim 6, also wraps
Include and be connected to the banknote tester, send control instruction to banknote tester and receive the main control computer of banknote tester feedback information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510142451.3A CN104751558B (en) | 2015-03-27 | 2015-03-27 | Banknote tester, currency detecting system and banknote detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510142451.3A CN104751558B (en) | 2015-03-27 | 2015-03-27 | Banknote tester, currency detecting system and banknote detection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104751558A CN104751558A (en) | 2015-07-01 |
| CN104751558B true CN104751558B (en) | 2017-11-07 |
Family
ID=53591173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510142451.3A Expired - Fee Related CN104751558B (en) | 2015-03-27 | 2015-03-27 | Banknote tester, currency detecting system and banknote detection method |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108020154B (en) * | 2017-11-21 | 2020-09-15 | 深圳怡化电脑股份有限公司 | Test method and test system of currency detector |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58119082A (en) * | 1982-01-08 | 1983-07-15 | Omron Tateisi Electronics Co | Reading and discriminating method for paper or the like |
| DE4039396A1 (en) * | 1990-12-10 | 1992-06-11 | Ibm | CASE FOR RECORDING AT LEAST ONE CASSETTE CONTAINING IN PARTICULAR PAPER MONEY |
| WO1996009590A1 (en) * | 1994-09-20 | 1996-03-28 | Nevin William W | System and method for generating and printing printouts and for detecting and preventing alteration of bank instrument |
| DE19706130C1 (en) * | 1997-02-17 | 1998-04-23 | Siemens Nixdorf Inf Syst | Sheet transport device for handling banknotes |
| DE10332212A1 (en) * | 2003-07-16 | 2005-02-24 | Koenig & Bauer Ag | Apparatus for quality testing of specimens and a method for checking the quality of sheets |
| CN202217338U (en) * | 2011-08-10 | 2012-05-09 | 深圳市怡化电脑有限公司 | Currency detector electronic hardware configuration |
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2015
- 2015-03-27 CN CN201510142451.3A patent/CN104751558B/en not_active Expired - Fee Related
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Granted publication date: 20171107 |