CN104743504B - Semiconductor device and forming method thereof - Google Patents
Semiconductor device and forming method thereof Download PDFInfo
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- CN104743504B CN104743504B CN201310754040.0A CN201310754040A CN104743504B CN 104743504 B CN104743504 B CN 104743504B CN 201310754040 A CN201310754040 A CN 201310754040A CN 104743504 B CN104743504 B CN 104743504B
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Abstract
A kind of semiconductor device and forming method thereof, wherein, the forming method of semiconductor device includes: provide substrate, substrate surface has the first conductive layer, first conductive layer surface has sacrifice layer, and sacrificial layer surface has mask layer, and mask layer exposes partial sacrificial layer surface；With mask layer as mask, etching sacrificial layer, till exposing the first conductive layer, in sacrifice layer, form the first opening and the second opening；On mask layer surface, the first opening and the sidewall of the second opening and lower surface form conducting film；Formed on conducting film surface and fill full first opening and the dielectric layer of the second opening；After forming dielectric layer, remove the partially electronically conductive film on mask layer surface, graphically change conducting film, the first connector is formed in the first opening, the second connector is formed in the second opening, the second conductive layer, the second connector and the second conductive layer electricity open circuit, the second conductive layer and the electrical connection of the first connector is formed on mask layer surface.The performance of semiconductor device formed is moderately good.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to a kind of semiconductor device and formation side thereof
Method.
Background technology
MEMS (Micro-Electro Mechanical System is called for short MEMS) is a kind of acquisition
Information, process information and the integrated device of execution operation.Sensor in MEMS is able to receive that pressure
The external informations such as power, position, speed, acceleration, magnetic field, temperature or humidity, and outside being obtained
Portion's information is converted into the signal of telecommunication, in order to process in MEMS.Pressure transducer is i.e. one
Plant the switching device that pressure signal is converted to the signal of telecommunication.
Capacitance pressure transducer is the one in existing pressure transducer, a kind of condenser type of prior art
Pressure transducer includes: substrate；It is positioned at the first electrode layer of substrate surface；It is positioned at substrate and the first electrode
The second electrode lay on layer surface, has cavity, described sky between described first electrode layer and the second electrode lay
Chamber makes the first electrode layer and the second electrode lay electric isolution.
Described first electrode layer, the second electrode lay and cavity constitute capacitance structure, when described second electrode
Layer is when being under pressure, and described the second electrode lay can deform upon, and causes described first electrode layer and second
Distance between electrode layer changes, and causes the capacitance of described capacitance structure to change.Due to institute
State the second electrode lay pressure experienced corresponding with the capacitance of described capacitance structure, therefore, it is possible to by second
Electrode layer pressure experienced is converted into the signal of telecommunication of described capacitance structure output.
But, existing pressure transducer unstable properties.
Summary of the invention
The problem that the present invention solves is to provide a kind of semiconductor device and forming method thereof, improves sensor
Performance.
For solving the problems referred to above, the present invention provides the forming method of a kind of semiconductor device, including: provide
Substrate, described substrate surface has the first conductive layer, and described first conductive layer surface has sacrifice layer, institute
Stating sacrificial layer surface and have mask layer, described mask layer exposes partial sacrificial layer surface；With described mask
Layer is mask, etches described sacrifice layer, till exposing the first conductive layer, is formed in sacrifice layer
First opening and the second opening；At described mask layer surface, the first opening and the sidewall of the second opening and the end
Surface, portion forms conducting film；Formed on described conducting film surface and fill full first opening and Jie of the second opening
Matter layer；After forming dielectric layer, remove the partially electronically conductive film on mask layer surface, graphically lead described in change
Electrolemma, forms the first connector in the first opening, forms the second connector, at mask layer in the second opening
Surface forms the second conductive layer, described second connector and the second conductive layer electricity open circuit, described second conduction
Layer electrically connects with the first connector.
Optionally, before forming the second conductive layer, at described sacrificial layer surface, the first opening and second
The sidewall of opening and lower surface form protective layer, and described conducting film is formed at described protective layer.
Optionally, the material of described protective layer is titanium nitride.
Optionally, the thickness of described protective layer is 100 angstroms～200 angstroms.
Optionally, the material of described conducting film is titanium, tungsten, aluminum or copper.
Optionally, the thickness of described conducting film is 50 angstroms～150 angstroms.
Optionally, the first conductive layer bottom the second connector and the first conductive layer electricity bottom the first connector
Open circuit.
Optionally, with the first conductive layer being connected bottom the second connector as bottom electrode, described second leads
Electric layer is top electrodes, and described first conductive layer, the second conductive layer, the first connector and the second connector are constituted
Sensor.
Optionally, described first opening and second opening parallel width in substrate surface direction are 200 angstroms
～300 angstroms.
Optionally, the material of described sacrifice layer and the first conductive layer, the second conductive layer and the material of mask layer
Different.
Optionally, the material of described sacrifice layer is amorphous carbon.
Optionally, the forming method of described dielectric layer includes: at conducting film surface deposition medium film, described
Deielectric-coating fills full described second opening；Polish described deielectric-coating, until exposing leading of mask layer surface
Till electrolemma.
Optionally, also include: after removing the partially electronically conductive film on mask layer surface, etch by described the
The mask layer that two conductive layers expose, till exposing sacrifice layer；After etching described mask layer,
With the second conductive layer and mask layer as mask, isotropic etching technics is used to etch described sacrifice layer,
Till exposing the first conductive layer, between described first conductive layer and the second conductive layer, form cavity.
Optionally, the one or many during the material of described mask layer is silicon oxide, silicon nitride, silicon oxynitride
Plant combination.
Optionally, described substrate includes: semiconductor base, be positioned at semiconductor substrate surface or semiconductor-based
Semiconductor device at the end, the electric interconnection structure electrically connecting described semiconductor device and electric isolution are described
Electric interconnection structure and the insulating barrier of semiconductor device.
Optionally, described first conductive layer is electrically connected with described semiconductor device by described electric interconnection structure.
Optionally, the material of described insulating barrier includes humidity sensitive dielectric material.
Accordingly, the present invention also provides for a kind of semiconductor device using any of the above-described method to be formed,
Including: substrate, the first conductive layer of described substrate surface；It is positioned at the sacrifice of described first conductive layer surface
Layer, described sacrificial layer surface has mask layer, has and expose first and lead in described sacrifice layer and mask layer
First opening of electric layer and the second opening；It is positioned at the first connector of the first opening；It is positioned at the second opening
The second connector, described second connector and the second conductive layer electricity open circuit；It is positioned at the second of mask layer surface
Conductive layer, described second conductive layer and the electrical connection of the first connector.
Compared with prior art, technical scheme has the advantage that
In the forming method of the present invention, after forming the first opening and the second opening in sacrifice layer, in institute
State mask layer surface, the first opening and the sidewall of the second opening and lower surface forms conducting film.Wherein,
Be positioned at the conducting film of the first opening for forming the first connector, be positioned at the conducting film of the second opening for
Form the second connector, owing to the first opening and the second opening are formed by etching sacrificial layer, and etch described
Sacrifice layer is not likely to produce etch by-products, and the interface that the most described conducting film and the first conductive layer contact is not
Easily quality is good, connecing between the most described first connector or the contact interface of the second connector and the first conductive layer
Resistance of getting an electric shock reduces.Secondly, it is positioned at the conducting film on mask layer surface for forming the second conductive layer, described the
Two conductive layers and the electrical connection of the first connector, owing to described first connector and the second conductive layer are by conducting film shape
Becoming, the contact resistance between the most described first connector and the second conductive layer is low, electrical connection properties is good.
Owing to the contact resistance of described first connector and the top of the second connector or bottom is all reduced, therefore institute
The operating current of the semiconductor device formed improves, so that the stable performance of the semiconductor device formed.
Further, before forming the second conductive layer, at described sacrificial layer surface, the first opening and second
The sidewall of opening and lower surface form protective layer, and described conducting film is formed at described protective layer.?
After being subsequently formed the first connector, the second connector and the second conductive layer, described protective layer can be sacrificial in removal
During domestic animal layer, protect described first connector, the second connector and the second conductive layer surface from damage.
Further, the material of described sacrifice layer is amorphous carbon, and the product etching described sacrifice layer is prone to wave
Send out, after therefore forming the first opening and the second opening in sacrifice layer, will not be at the first conductive layer surface
Attachment can increase the etch by-products of resistance, then connecing between the conducting film and the first conductive layer that are subsequently formed
Touch interface quality good.
In the structure of the present invention, have in described sacrifice layer and mask layer and expose the first of the first conductive layer
Opening and the second opening, have the first connector, have second in described second opening in described first opening
Connector, second conductive layer on described mask layer surface, and described second conductive layer and the electrical connection of the first connector.
The bottom of described first connector and the second connector is relatively low with the interface contact resistance that the first conductive layer contacts,
And electrical connection properties between the first connector and the second conductive layer is good.The most described semiconductor device
Operating current improves, stable performance.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of a kind of sensor；
Fig. 2 to Fig. 7 is the cross-sectional view of the forming process of the semiconductor device of the embodiment of the present invention.
Detailed description of the invention
As stated in the Background Art, existing pressure transducer unstable properties.
Fig. 1 is the cross-sectional view of a kind of sensor, including: substrate 100；It is positioned at substrate 100 table
First electrode layer 101 in face；It is positioned at substrate 100 and the second electrode lay 102 on the first electrode layer 101 surface,
Between described first electrode layer 101 and the second electrode lay 102, there is cavity 103；Described first electrode layer
There is between 101 and the second electrode lay 102 first conductive plunger 104 and the second conductive plunger 105, described
Electrically insulated by insulating barrier between second conductive plunger 105 and the second electrode lay 102, and the first conductive plunger
104 and second the first electrode layers 101 bottom conductive plunger 105 are not attached to；Described first conductive plunger
104 and second the sidewall surfaces of conductive plunger 105 there is the first protective layer 106 cover；Described second electrode
Layer 102 and the first electrode layer 101 apparent surface have the second protective layer 107.
Described first conductive plunger 104 and the second conductive plunger 105 are used for supporting the second electrode lay 102 and hang
Empty in the first electrode layer 101 surface.Secondly, respectively to the first electrode layer 101 and the second electrode lay 102
It is biased, obtains, with this, the electric capacity that the first electrode layer 101, the second electrode lay 102 and cavity 103 are constituted
The capacitance variation amount of structure.Additionally, described first conductive plunger 104 and the second conductive plunger 105 points
Do not electrically connect with the first electrode layer 101, and the first conductive plunger 104 and the second conductive plunger 105 institute
The first mutual open circuit of electrode layer 101 of connecting is the most mutually isolated by wet sensitive dielectric layer, described mutually breaks
First electrode layer 101 on road and wet sensitive dielectric layer constitute capacitance type humidity sensor, by the first conduction
Connector 104 and the second conductive plunger 105 are biased, it is possible to obtain the first conductive layer 101 and be situated between with wet sensitive
The capacitance variation amount of the capacitance structure that matter layer is constituted.Therefore, outside described sensor can obtain simultaneously
The pressure in portion and humidity information.
But, find through research, as shown in the region A in Fig. 1 and region B, described first conduction
Easily there is process byproducts in connector 104 or the top of the second conductive plunger 105 and bottom, such as, etches
The polymer that technique produces, causes described first conductive plunger 104 or the second conductive plunger 105 and first
The interface contact resistance that electrode layer 101 or the second electrode lay 102 contact increases so that sensor
Operating current reduces, the unstable properties of the most described sensor.
Concrete, when forming the sensor shown in Fig. 1, described cavity 103 has sacrifice layer, institute
State the second protective layer and be formed at sacrificial layer surface, described after forming the second protective layer, in the second protection
Layer surface forms the second electrode lay 102, and removes described sacrifice layer after forming the second electrode lay 102.
For region A, wherein, due to described first conductive plunger 104 and the second conductive plunger 105
Sidewall surfaces is covered by the first protective layer 106, it is therefore desirable to be first formed at the first conduction in sacrifice layer
The first protection connector that layer 101 contacts, etches described first protection connector, to protect described first
Form the through hole exposing the first conductive layer 101 in connector, in described through hole, fill conductive material with shape
Become the first conductive plunger 104 and the second conductive plunger 105.Owing to the material of described first protective layer 106 is
Dielectric layer material, when etching described first protection connector to form through hole, easy generation is difficult in a large number
The polymer removed, described polymer can be attached to the first conductive layer 101 surface of via bottoms, causes
Electricity is contacted between one conductive plunger 104 and the bottom of the second conductive plunger 105 and the first conductive layer 101
Resistance increases.
For region B, due to after forming the second protective layer 107, on the second protective layer 107 surface
Form the second electrode lay 102, and described the second electrode lay 102 needs to connect with the first conductive plunger 104
Touch, therefore before forming the second electrode lay 102, described second protective layer 107 can be etched and expose
First conductive plunger 104 top.And the technique of described etching the second protective layer 107 can produce equally and be difficult to
The polymer removed, described polymer can be attached to the first conductive plunger 104 top, cause the first conduction
Contact resistance between connector 104 and the second electrode lay 102 increases.
In order to solve the problems referred to above, after further research, the present invention proposes the shape of a kind of semiconductor device
One-tenth method.Wherein, after forming the first opening and the second opening in sacrifice layer, at described mask layer table
Face, the first opening and the sidewall of the second opening and lower surface form conducting film.Wherein, it is positioned at first to open
Conducting film in Kou is for forming the first connector, and the conducting film being positioned at the second opening is inserted for forming second
Plug, owing to the first opening and the second opening are formed by etching sacrificial layer, and etches described sacrifice layer and is difficult to
Producing etch by-products, it is good that the interface that the most described conducting film and the first conductive layer contact is difficult to quality,
Contact resistance between the most described first connector or the contact interface of the second connector and the first conductive layer reduces.
Secondly, it is positioned at the conducting film on mask layer surface for forming the second conductive layer, described second conductive layer and the
One connector electrical connection, owing to described first connector and the second conductive layer are formed by conducting film, therefore described
Contact resistance between first connector and the second conductive layer is low, electrical connection properties is good.Due to described first
The contact resistance of connector and the top of the second connector or bottom is all reduced, the quasiconductor therefore formed
The operating current of device improves, so that the stable performance of the semiconductor device formed.
Understandable, below in conjunction with the accompanying drawings for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from
The specific embodiment of the present invention is described in detail.
Fig. 2 to Fig. 7 is the cross-sectional view of the forming process of the semiconductor device of the embodiment of the present invention.
Refer to Fig. 2, it is provided that substrate 200, described substrate 200 surface has the first conductive layer 201, institute
Stating the first conductive layer 201 surface and have sacrifice layer 202, described sacrifice layer 202 surface has mask layer 203,
Described mask layer 203 exposes partial sacrificial layer 202 surface.
Described substrate 200 includes: semiconductor base 210, be positioned at semiconductor base 210 surface or quasiconductor
Semiconductor device in substrate 210, electrically connect the electric interconnection structure of described semiconductor device (not shown)
211 and electrically insulate the insulating barrier 212 of described electric interconnection structure 211 and semiconductor device.
In the present embodiment, described first conductive layer 201 and insulating barrier 212 can constitute humidity sensor.
And, described first conductive layer 201 can be with the second conductive layer being subsequently formed and the first conductive layer
201 and second cavitys between conductive layer constitute pressure transducer, and the semiconductor device therefore formed is pressure
Force transducer and the integrated device of humidity sensor.
Described semiconductor device can be cmos device, and described cmos device includes transistor, storage
Device, capacitor or resistor etc..Described semiconductor base 210 is silicon substrate, silicon-Germanium substrate, carborundum
Substrate, silicon-on-insulator (SOI) substrate, germanium on insulator (GOI) substrate, glass substrate or III-V
Compounds of group substrate, such as gallium nitride or GaAs etc..In the present embodiment, described insulating barrier 212
Material includes humidity sensitive dielectric material, such as polyimides, and described insulating barrier 212 can be as institute's shape
Dielectric layer in the capacitance type humidity sensor become.
In the present embodiment, described semiconductor base 200 is silicon substrate, the quasiconductor in described substrate 200
Device is transistor (not shown).The surface of described substrate 200 is insulating barrier 212 surface, and described
One conductive layer 201 is formed in described substrate 200, and the surface of described first conductive layer 201 and insulation
The surface of layer 212 flushes.
Described first conductive layer 201 is made up of the first sub-electrode layer (not shown) that at least two is discrete,
And it is mutually isolated by described insulating barrier 212 between described first sub-electrode layer；Follow-up formed first inserts
Plug and the second connector lay respectively at two the first discrete sub-electrode layer surfaces, make described first connector and the
The the first sub-electrode layer connected can be biased by two connectors respectively, thus obtains two first son electricity
The capacitance variation amount of the capacitance structure that pole layer and insulating barrier 212 are constituted, obtains external environment condition with this
Humidity information.
Secondly, described first conductive layer 201 can also be as the bottom electricity of the pressure transducer being subsequently formed
Pole, the second conductive layer being subsequently formed, as the top layer electrode of pressure transducer, is subsequently formed and leads in first
Cavity between electric layer 201 and the second conductive layer and described first conductive layer 201 and the second conductive layer are i.e.
Constitute pressure inducer, by the electric capacity obtaining first conductive layer the 201, second conductive layer and cavity is constituted
The capacitance variation amount of structure, it is possible to obtain the pressure information of external environment condition.
The material of described first conductive layer 201 is conductive material, such as copper, tungsten or aluminum, and the present embodiment
In, the material covering the partial insulative layer 212 surrounding described first conductive layer 201 is humidity sensitive medium
Material.Described first conductive layer 201 can also be by described electric interconnection structure 211 and described semiconductor device
Part electrically connects.
The second conductive layer owing to being subsequently formed had cavity before described first conductive layer 201, made institute
State cavity, the first conductive layer 201 and the second conductive layer and can constitute pressure transducer, therefore, formed
Before the second follow-up conductive layer, form sacrifice layer 202 on described first conductive layer 201 surface, described sacrificial
Domestic animal layer 202 forms the correspondence position of cavity needed for occupying, and after being subsequently formed the second conductive layer,
Remove described sacrifice layer 202 to form cavity.
Additionally, insert in order to subsequent technique can form the first connector and second on the first conductive layer 201 surface
Plug, needs to form the first opening and second exposing the first conductive layer 201 in described sacrifice layer 202
Opening, the most described sacrifice layer 202 surface is formed and defines the first opening and the second opening correspondence position
Mask layer 203.
The formation process of described sacrifice layer 202 is chemical vapor deposition method or physical gas-phase deposition.
The material of described sacrifice layer 202 and the material of the first conductive layer 201 and mask layer 203 are different, to ensure
Follow-up when removing sacrifice layer 202, the first conductive layer 201 and mask layer 203 will not be damaged.In this enforcement
In example, the material of described sacrifice layer 202 is amorphous carbon, due to the etching gas bag of etching amorphous carbon
Including oxygen, described oxygen and carbon react and can produce carbon monoxide or silicon dioxide gas, therefore etch nothing
Setting carbon is difficult to generate solid by-product, thus is difficult to cause the first conductive layer 201 surface shape after etching
Looks are bad.
The formation process of described mask layer 203 includes: at sacrifice layer 202 surface deposition mask thin film；?
Mask film surface forms patterned photoresist layer；Mask described in described photoresist layer as mask etching
Thin film, till exposing sacrifice layer 202 surface, forms mask layer 203；After etch mask thin film,
Remove described photoresist layer.The material of described mask layer 203 is in silicon oxide, silicon nitride, silicon oxynitride
One or more combination.Described mask layer 203 is except as etching covering of the first opening and the second opening
Film, additionally it is possible to when follow-up removal sacrifice layer 202, protect the second conductive layer surface from damage, and
Dare to supporting described second conductive layer and be suspended on the first conductive layer 201 surface.
Refer to Fig. 3, with described mask layer 203 as mask, etch described sacrifice layer 202, until exposing
Till going out the first conductive layer 201, in sacrifice layer 202, form the first opening 204 and the second opening 205.
The technique of described etching sacrificial layer 202 is anisotropic dry etch process, it is possible to form sidewall
First opening 204 and second opening 205 vertical relative to substrate 200 surface, the first opening formed
204 and second opening 205 to be parallel to the width of substrate 200 surface direction be 200 angstroms～300 angstroms.At this
In embodiment, the material of described sacrifice layer 202 is amorphous carbon, described anisotropic dry etching work
Skill includes: etching gas includes oxygen, and power is more than 100 watts, and bias voltage is more than 100 volts, temperature
More than 100 degrees Celsius.
Owing to the material of described sacrifice layer 202 is amorphous carbon, in described anisotropic dry etching work
In skill, described amorphous carbon can generate CO (carbon monoxide converter) gas or carbon dioxide quilt with oxygen reaction
Discharge, therefore etch described amorphous carbon and be not likely to produce solid byproducts, therefore the first opening 204 and the
The first conductive layer 201 clean surface that two opening 205 bottom-exposed go out, does not have etch by-products attachment,
It is subsequently formed connecing of the conducting film in the first opening 204 and the second opening 205 and the first conductive layer 201
Touch interface resistance relatively low, be conducive to the electric current of the semiconductor device work making driving be formed to improve, thus
Improve work efficiency and the stability of the semiconductor device formed.
The first opening 204 formed at subsequent technique for forming the first connector, described second opening 205
At subsequent technique for forming the second connector；And, the first conductive layer bottom described second opening 205
Electricity open circuit between 201 and first the first conductive layers 201 bottom opening 204.In the present embodiment, institute
State the first opening 204 and the second opening 205 expose two the first discrete sub-electrode layer surfaces respectively,
The first sub-electrode layer that then said two is discrete is as two electrodes of humidity sensor, and is positioned at described two
The insulating barrier 212 of isolation it is used for as the dielectric between two electrodes between individual the first discrete sub-electrode layer
Layer；Owing between two the first sub-electrode layers, insulating barrier 212 material is wet sensitive dielectric material, therefore, logical
Cross the capacitance variation obtained between said two the first sub-electrode layer, i.e. can obtain the wet of external environment condition
Degree.And the first connector being subsequently formed and the second connector are respectively used to apply two discrete sub-electrode layers
Bias, to obtain capacitance variation.
Refer to Fig. 4, on described sacrifice layer 202 surface, the first opening 204 and side of the second opening 205
Wall and lower surface form protective layer 206；Conducting film 207 is formed on described protective layer 206 surface.
Described conducting film 207 is for forming follow-up the first connector, the second connector and the second conductive layer；Its
In, it is positioned at the conducting film 207 of the first opening 204 for forming the first connector, is positioned at the second opening 205
Interior conducting film 207 is for forming the second connector, and the conducting film being positioned at mask layer 203 surface forms second
Conductive layer.
Described protective layer 206 for prevent the material of conducting film 207 to sacrifice layer 202 internal diffusion, to protect
Demonstrate,prove described conducting film 207 and the pattern of sacrifice layer 202 and stable performance；And, described in follow-up removal
During sacrifice layer 202, described protective layer 206 can be protected and be positioned at the first opening 204 and the second opening 205
Interior conducting film 207 surface is from damage, to ensure the stable performance of the semiconductor device formed.
In the present embodiment, the material of described protective layer 206 is titanium nitride, the material of described conducting film 207
For titanium.The thickness of described protective layer 206 is 100 angstroms～200 angstroms, and the thickness of described conducting film 207 is 50
Angstrom～150 angstroms；In the present embodiment, the thickness of described protective layer 206 is 150 angstroms, described conducting film 207
Thickness be 100 angstroms.Owing to being positioned at the conducting film 207 on mask layer 203 surface for forming the second conduction
Layer, and the second conductive layer is after follow-up removal sacrifice layer 202, needs to be suspended on the first conductive layer 201 table
Face, makes to be formed between the first conductive layer 201 and the second conductive layer cavity, the most described conducting film 207 He
The thickness of protective layer 206 is difficult to blocked up, to ensure that follow-up the second formed conductive layer will not be because of quality mistake
Fracture greatly.Owing to the resistivity of described titanium material is low, conductive capability good, though described conducting film 207
Thinner thickness, it is also possible to ensure that the second conductive layer has low resistivity；And, described protective layer 206
Material be titanium nitride, described titanium nitride also has conductive capability, it is possible to make conducting film 207 He further
The laminated construction that protective layer 206 is constituted has low-resistivity, then by described conducting film 207 and protective layer
The electric current of 206 is sufficiently large to meeting technical need.
In other embodiments, the material of described conducting film can also be tungsten, aluminum or copper, and formation process is
Depositing operation, electroplating technology or chemical plating process.
The formation process of described protective layer 206 and conducting film 207 is chemical vapor deposition method, physics gas
Phase depositing operation or atom layer deposition process.In the present embodiment, form described protective layer 206 and conducting film
The technique of 207 is physical gas-phase deposition, and the parameter of described physical gas-phase deposition is: air pressure is
10-7 torr～10-9 torr, base station temperature is-15 degrees Celsius～-25 degrees Celsius, and substrate bias power is 300 watts～900
Watt.
Refer to Fig. 5, formed on described conducting film 207 surface and fill completely the first opening 204(such as Fig. 4 institute
Show) and the second opening 205(is as shown in Figure 4) dielectric layer 208.
Described dielectric layer 208 for conducting film 207 and protective layer 206 are fixed on the first opening 204 or
The sidewall of the second opening 205 and lower surface, and can protect and be positioned at the first opening 204 or the second and open
Conducting film 207 in mouth 205.
The material of described dielectric layer 208 is in silicon oxide, silicon nitride, silicon oxynitride, low K dielectric material
One or more combinations；The forming method of described dielectric layer 208 includes: deposit on conducting film 207 surface
Deielectric-coating, described deielectric-coating fills full described second opening 205；Polish described deielectric-coating, until exposing
Till the conducting film 207 on mask layer 203 surface.
Refer to Fig. 6, after forming dielectric layer 208, remove the partially electronically conductive film on mask layer 203 surface
207(is as shown in Figure 5), graphically change described conducting film 207, in the first opening 204(such as Fig. 4 institute
Show) in formed the first connector 207a, at the second opening 205(as shown in Figure 4) in formation the second connector
207b, forms the second conductive layer 207c, described second connector 207a and second and leads on mask layer 203 surface
The electricity open circuit of electric layer 207c, described second conductive layer 207c and the first connector 207a electrical connection.
The technique of described patterned conductive film 207 includes: in dielectric layer 208 and conducting film 207 surface shape
Become photoresist layer；Described photoresist layer is exposed, to expose partially electronically conductive film 207 surface；With
Described photoresist layer is mask, uses anisotropic dry etch process to etch described conducting film 207 He
Protective layer 206, till exposing mask layer 203, forms the second conductive layer 207c, the first connector
207a and the second connector 207b.It should be noted that have single in the second conductive layer 207c formed
Or some through holes exposing mask layer 203 or opening, in order to follow-up can go from described through hole or opening
Except sacrifice layer 202.
Wherein, bottom the first conductive layer 201 and the first connector 207a bottom the second connector 207b
One conductive layer 207 electricity open circuit, described first conductive layer 207 and insulating barrier 212 can pass as humidity
Sensor, described first connector 207a and the second connector 207b is for driving two electrodes of humidity sensor.
In the present embodiment, described first conductive layer 207 includes the first sub-electrode layer that at least two is discrete, and
Described first connector 207a and the second connector 207c lays respectively at two the first discrete sub-electrode layer surfaces,
Discrete the first sub-electrode layer of said two is as two electrodes of humidity sensor, said two electrode energy
Hard to bear to the first connector 207a with the driving of the second connector 207c.
Secondly, described first conductive layer 201 and the second conductive layer 207c can also be used to form pressure sensing
Device.Wherein, due to the second connector 207b and the second conductive layer 207c electricity open circuit, and described second
Be connected with part the first conductive layer 201 bottom connector 207b, then be connected bottom the second connector 207b
Part the first conductive layer 201 is as bottom electrode；And the second conductive layer being connected with the first connector 207a
207c is as top electrodes, after follow-up removal sacrifice layer 202, and described first conductive layer 201 and second
Cavity is constituted between conductive layer 207c.
Due in the present embodiment, described first connector 207 and the second conductive layer 207c is by conducting film 207
Being formed, between the most described first connector 207 and the second conductive layer 207c, electrical connection properties is good, first insert
Plug 207 is low with the contact resistance of the second conductive layer 207c junction, then drive the semiconductor device formed
The current stabilization and sufficiently large to meeting technical need of work.Therefore, the performance of the sensor formed
Stable.
Refer to Fig. 7, after removing the partially electronically conductive film on mask layer 203 surface, etching is by described second
The mask layer 203 that conductive layer 207c exposes, till exposing sacrifice layer 202；Described in etching
After mask layer 203, with the second conductive layer 207c and mask layer 203 as mask, use isotropic
Etching technics etches described sacrifice layer 202, till exposing the first conductive layer 201, leads described the
Cavity 209 is formed between electric layer 201 and the second conductive layer 207c.
The technique of described etching mask layer 203 is anisotropic dry etch process, makes covering after etching
The figure of film layer 203 figure and the second conductive layer 207 is consistent；After etching mask layer 203, expose
Go out sacrifice layer 202, and after removing sacrifice layer 202, the cavity 209 formed can with ft connection,
Make insulating barrier 212 can touch external environment condition, owing to the material of described insulating barrier 212 is wet sensitive medium
Material, enables the dielectric coefficient of described insulating barrier 212 to change along with the change of humidity, then can
Obtain two the first discrete conductive layers 201 that described first connector 207a and the second connector 207b is connected
Between capacitance change.
The technique etching described sacrifice layer 202 is isotropic etching technics, due to isotropic dry
Method etching technics etch rate in all directions is identical, therefore, it is possible to sacrifice layer 202 table certainly exposed
Direction towards the first conductive layer 201 etches, and can carve to be parallel to the direction on substrate 200 surface simultaneously
Erosion is positioned at the sacrifice layer 202 bottom the second conductive layer 207c, thus leads at the first conductive layer 207c and first
Cavity 209 is formed between electric layer 201.When etching sacrificial layer 202, described mask layer 203 can be protected
Protective layer 206 surface, and when the semiconductor device work formed, prevent protective layer 206 to be subject to
Erosion damage；And described first connector 207c and the second connector 207b outer surface have protective layer 206
Protection, it is possible to when removing sacrifice layer 202 and when semiconductor device works, protects described first to insert
Plug 207c and the second connector 207b is from damage.
In the present embodiment, the technique etching described sacrifice layer 202 is anisotropic dry etch process,
The parameter of the dry etch process of the described opposite sex includes: etching gas includes oxygen, and bias power is less than 100
Watt, bias voltage is less than 100 volts, and temperature is more than 100 degrees Celsius.Wherein, due in the present embodiment
Sacrifice layer 202 is amorphous carbon, described oxygen can with amorphous carbon react generation CO (carbon monoxide converter) gas or
Carbon dioxide is discharged.
Owing to described isotropic dry etch process is carried out to exposing the first conductive layer 201 and
Till forming through cavity 209 between two conductive layer 207c and the first conductive layer 201, therefore described
After isotropic dry etch process, around described cavity 209, still remain with what part was not etched
Sacrifice layer 202；The described sacrifice layer 202 not being etched can be used in supporting the second conductive layer 207c, guarantor
Sheath 206 and mask layer 203 are suspended on the first conductive layer 201 surface.
In the forming method of the present embodiment, after forming the first opening and the second opening in sacrifice layer,
Described mask layer surface, the first opening and the sidewall of the second opening and lower surface form conducting film.Wherein,
Be positioned at the conducting film of the first opening for forming the first connector, be positioned at the conducting film of the second opening for
Form the second connector, owing to the first opening and the second opening are formed by etching sacrificial layer, and etch described
Sacrifice layer is not likely to produce etch by-products, and the interface that the most described conducting film and the first conductive layer contact is not
Easily quality is good, connecing between the most described first connector or the contact interface of the second connector and the first conductive layer
Resistance of getting an electric shock reduces.Secondly, it is positioned at the conducting film on mask layer surface for forming the second conductive layer, described the
Two conductive layers and the electrical connection of the first connector, owing to described first connector and the second conductive layer are by conducting film shape
Becoming, the contact resistance between the most described first connector and the second conductive layer is low, electrical connection properties is good.
Owing to the contact resistance of described first connector and the top of the second connector or bottom is all reduced, therefore institute
The operating current of the semiconductor device formed improves, so that the stable performance of the semiconductor device formed.
Accordingly, embodiments of the invention also provide for a kind of semiconductor device using said method to be formed,
Please continue to refer to Fig. 7, including: substrate 200, first conductive layer 201 on described substrate 200 surface；Position
In the sacrifice layer 202 on described first conductive layer 201 surface, described sacrifice layer 202 surface has mask layer
203, there is in described sacrifice layer 202 and mask layer 203 the first opening exposing the first conductive layer 201
With the second opening；It is positioned at the first connector 207a of the first opening；It is positioned at the second connector of the second opening
207b, described first connector 207a and the second connector 207b and the second conductive layer 207c electricity open circuit；Position
In the second conductive layer 207c on mask layer 203 surface, described second conductive layer 207c and the first connector 207b
Electrical connection.
In the structure of the present embodiment, have in described sacrifice layer and mask layer and expose the of the first conductive layer
One opening and the second opening, have the first connector in described first opening, has in described second opening
Two connectors, second conductive layer on described mask layer surface, and described second conductive layer and the first connector are electrically connected
Connect.The interface contact resistance that the bottom of described first connector and the second connector contacts with the first conductive layer is relatively
Low, and the electrical connection properties between the first connector and the second conductive layer is good.The most described semiconductor device
The operating current of part improves, stable performance.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art,
Without departing from the spirit and scope of the present invention, all can make various changes or modifications, therefore the guarantor of the present invention
The scope of protecting should be as the criterion with claim limited range.
Claims (18)
1. the forming method of a semiconductor device, it is characterised in that including:
Thering is provided substrate, described substrate surface has the first conductive layer, and described first conductive layer surface has sacrificial
Domestic animal layer, described sacrificial layer surface has mask layer, and described mask layer exposes partial sacrificial layer surface；
With described mask layer as mask, etch described sacrifice layer, till exposing the first conductive layer,
The first opening and the second opening is formed in sacrifice layer；
Conducting film is formed at described mask layer surface, the first opening and the sidewall of the second opening and lower surface；
Formed on described conducting film surface and fill full first opening and the dielectric layer of the second opening；
After forming dielectric layer, remove the partially electronically conductive film on mask layer surface, graphically change described conduction
Film, forms the first connector in the first opening, forms the second connector in the second opening, at mask layer table
Face forms the second conductive layer, described second connector and the second conductive layer electricity open circuit, described second conductive layer
Electrically connect with the first connector.
2. the forming method of semiconductor device as claimed in claim 1, it is characterised in that lead forming second
Before electric layer, in described sacrificial layer surface, the first opening and the sidewall of the second opening and lower surface shape
Becoming protective layer, described conducting film is formed at described protective layer.
3. the forming method of semiconductor device as claimed in claim 2, it is characterised in that described protective layer
Material is titanium nitride.
4. the forming method of semiconductor device as claimed in claim 2, it is characterised in that described protective layer
Thickness is 100 angstroms～200 angstroms.
5. the forming method of semiconductor device as claimed in claim 1, it is characterised in that described conducting film
Material is titanium, tungsten, aluminum or copper.
6. the forming method of semiconductor device as claimed in claim 1, it is characterised in that described conducting film
Thickness is 50 angstroms～150 angstroms.
7. the forming method of semiconductor device as claimed in claim 1, it is characterised in that bottom the second connector
The first conductive layer and the first connector bottom the first conductive layer electricity open circuit.
8. the forming method of semiconductor device as claimed in claim 7, it is characterised in that at the bottom of the second connector
The first conductive layer that portion connects is as bottom electrode, and described second conductive layer is top electrodes, and described the
One conductive layer, the second conductive layer, the first connector and the second connector constitute sensor.
9. the forming method of semiconductor device as claimed in claim 1, it is characterised in that described first opening
It it is 200 angstroms～300 angstroms with second opening parallel width in substrate surface direction.
10. the forming method of semiconductor device as claimed in claim 1, it is characterised in that described sacrifice layer
The material of material and the first conductive layer, the second conductive layer and mask layer is different.
The forming method of 11. semiconductor device as claimed in claim 10, it is characterised in that described sacrifice layer
Material is amorphous carbon.
The forming method of 12. semiconductor device as claimed in claim 1, it is characterised in that described dielectric layer
Forming method includes: at conducting film surface deposition medium film, and described deielectric-coating is filled full described second and opened
Mouthful；Polish described deielectric-coating, till exposing the conducting film on mask layer surface.
The forming method of 13. semiconductor device as claimed in claim 1, it is characterised in that also include: going
After the partially electronically conductive film on mask layer surface, the mask layer that etching is exposed by described second conductive layer,
Till exposing sacrifice layer；After etching described mask layer, with the second conductive layer and mask layer
For mask, isotropic etching technics is used to etch described sacrifice layer, until exposing the first conduction
Till Ceng, between described first conductive layer and the second conductive layer, form cavity.
The forming method of 14. semiconductor device as claimed in claim 1, it is characterised in that described mask layer
Material is one or more combinations in silicon oxide, silicon nitride, silicon oxynitride.
The forming method of 15. semiconductor device as claimed in claim 1, it is characterised in that described substrate includes:
Semiconductor base, it is positioned at semiconductor substrate surface or the semiconductor device of semiconductor base, electrical connection
The electric interconnection structure of described semiconductor device and electrically insulate described electric interconnection structure and semiconductor device
Insulating barrier.
The forming method of 16. semiconductor device as claimed in claim 15, it is characterised in that described first conduction
Layer is electrically connected with described semiconductor device by described electric interconnection structure.
The forming method of 17. semiconductor device as claimed in claim 15, it is characterised in that described insulating barrier
Material includes humidity sensitive dielectric material.
18. 1 kinds use the semiconductor device formed such as claim 1 to 17 any one method, it is characterised in that
Including:
Substrate, the first conductive layer of described substrate surface；
Being positioned at the sacrifice layer of described first conductive layer surface, described sacrificial layer surface has mask layer, described
There is in sacrifice layer and mask layer the first opening and the second opening exposing the first conductive layer；
It is positioned at the first connector of the first opening；
It is positioned at the second connector of the second opening, described second connector and the second conductive layer electricity open circuit；
It is positioned at second conductive layer on mask layer surface, described second conductive layer and the electrical connection of the first connector.
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| CN105645349B (en) * | 2014-12-04 | 2017-09-22 | 中芯国际集成电路制造(上海)有限公司 | The forming method of MEMS |
| CN106365110A (en) * | 2015-07-24 | 2017-02-01 | 上海丽恒光微电子科技有限公司 | Detection sensor and production method thereof |
| US10273148B2 (en) * | 2015-08-14 | 2019-04-30 | Taiwan Semiconductor Manufacturing Company Ltd. | Micro-electro-mechanical system and manufacturing method thereof |
| CN106932138B (en) * | 2015-12-31 | 2019-09-27 | 中芯国际集成电路制造(上海)有限公司 | A kind of MEMS pressure sensor and preparation method thereof, electronic device |
| CN107086253B (en) * | 2016-02-15 | 2019-02-22 | 中芯国际集成电路制造（天津）有限公司 | The manufacturing method of semiconductor devices |
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| US7326629B2 (en) * | 2004-09-10 | 2008-02-05 | Agency For Science, Technology And Research | Method of stacking thin substrates by transfer bonding |
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| KR20010065797A (en) * | 1999-12-30 | 2001-07-11 | 박종섭 | Method for forming capacitor in high capacitance memory device |
| KR20020058412A (en) * | 2000-12-30 | 2002-07-12 | 박종섭 | A method for forming capacitor in semiconductor device |
| CN101335261A (en) * | 2007-06-27 | 2008-12-31 | 台湾积体电路制造股份有限公司 | Formation of through via before contact processing |
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