CN104734504A - DC-DC converter control method and system - Google Patents
DC-DC converter control method and system Download PDFInfo
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Abstract
The invention discloses a DC-DC converter control method and system. A set value is fast reached through a single-step forecasting method by adopting forecasting function control to achieve the control of a DC-DC converter. The invention further provides a DC-DC converter control system. According to the DC-DC converter control method, large numbers of on-line rolling optimizing calculations needed by a model forecasting control algorithm itself are effectively reduced through the single-step forecasting method, and the set value is fast reached to achieve the control of the DC-DC converter.
Description
Technical field
The present invention relates to the PREDICTIVE CONTROL field in DC-DC circuit in power electronics and advanced control method, be specifically related to a kind of DC-DC converter control method and system.
Background technology
The generation of fuel cell power energy depends on fuel endlessly to be provided, the fluctuation of fuel supply often causes the output voltage instability of fuel cell even to occur wide fluctuations, in actual life, various operating load has different rated operational voltages in addition, and how to be matched by the output voltage of fuel cell is a problem.So a design safe and reliable efficient DC-DC converter is most important.Fuel battery voltage is risen to DC bus voltage by it, then is load supplying by each reduction voltage circuit step-down, when fluctuation occurs battery input voltage, still can ensure the stable of DC bus voltage.
Model Predictive Control Algorithm has the advantage that can solve Multi-variables optimum design problem, uses widely so obtain at the process industry that tradition is complicated.But its algorithm itself needs a large amount of online rolling optimizations to calculate, which has limited algorithm is used in quick controlled device, adopt the point-to-point one-step prediction of algorithm of predictive functional control, can set point be rapidly converged to, thus Fast Process and object can be controlled.
In the present invention's design, control algolithm and circuit sampling input and output realize by universal frequency converter controller (GPIC), wherein control algolithm parameter is transmitted by host computer, and field programmable gate array (FPGA) is used for calculating and duty ratio changed into PWM ripple by multiple interfaces and export thus the object reaching control voltage.
Summary of the invention
For the defect that model predictive control method in prior art itself needs a large amount of online rolling optimizations to calculate, the invention provides a kind of DC-DC converter control method, adopt the way of one-step prediction, reach set point fast.
A control method for DC-DC converter, comprising:
(1) obtain the feedback voltage level of DC-DC circuit output and compare with setting voltage value and obtain correction error △ u;
(2) described correction error △ u is judged:
If correction error △ is u=0, then maintain the pwm control signal controlling DC-DC converter main switch constant;
If correction error △ u ≠ 0, then calculate expectation increment Delta p=△ u (the 1-λ of future time instance
h), utilize transfer function u (n)=a simultaneously
1u (n-1)+a
2u (n-2)+k
1d (n-1)+k
2d (n-2) carries out the prediction increment Delta m of iterative computation future time instance, makes that Δ m is equal with Δ p calculates duty ratio d, and is converted to the pwm control signal of subsequent time DC-DC converter main switch;
Wherein
h is the number of times of iterative computation, and Ts is the sampling time, and CLTR is the closed loop response time, and Tr is the parameter determined by closed loop response time CLTR, a
1, a
2, k
1and k
2for the coefficient correlation of transfer function, described current time was the n-th moment, and described future time instance is (n+h) moment.
The magnitude of voltage of the magnitude of voltage-current time of prediction increment Delta m=future time instance, it should be noted that the magnitude of voltage of current time is not the feedback voltage level that current time collects, but obtains the theoretic magnitude of voltage of current time by transfer function calculating.
Described transfer function is obtained through discretization by the constant frequency dynamic model of DC-DC circuit, the coefficient correlation a of transfer function
1, a
2, k
1and k
2relevant with constant frequency dynamic model, the coefficient correlation that different models is corresponding is different.
Described n refers to current time, and (n-1) refers to previous moment, and (n+1) refers to a rear moment, and (n-2), (n+2) wait the like.Such as (n+h) is h the rear corresponding moment of current past pusher, u (n) represents the magnitude of voltage of current time, d (n) represents the duty ratio of current time, u (n-1) represents the magnitude of voltage of previous moment, and d (n-1) represents the duty ratio of previous moment.
In addition increment Delta p=△ u (1-λ is expected
h)=△ u-△ u λ
h, λ
hcorresponding is a reference locus function, λ and h gives timing, λ
hfor constant, Δ p also can be understood as the correction error in n moment and the correction error in n+h moment and makes comparisons and obtain expecting increment, wherein △ u λ
hfor the correction error in the n+h moment under given reference track.
As preferably, the predicted voltage u (n+h) that described prediction increment Delta m equals future time instance deducts the theoretical voltage u (n) of current time,
The theoretical voltage u (n) of current time is calculated in conjunction with the first two moment (n-1) and voltage corresponding to (n-2) and duty ratio by described transfer function;
The computational process of the predicted voltage u (n+h) of future time instance comprises free response part and Children abused part, and for free response part, resolution principle is make the input of duty ratio be 0, namely
u
m(n+1)＝a
1u
m(n)+a
2u
m(n-1)+0+0
u
m(n+2)＝a
1u
m(n+1)+a
2u
m(n)+0+0
…
u
m(n+h)＝a
1u
m(n+h-1)+a
2u
m(n+h-2)+0+0
Its equation of n th order n following can be write out according to transfer function:
u
ml(p)＝a
1u
ml(p-1)+a
2u
ml(p-2)+0+0
For known h, u
mlonly need to iterate to h-1 from 3, initial condition is:
u
ml(2)＝u
m(n-1)
u
ml(1)＝u
m(n-2)
Wherein, u
mand u (n-1)
m(n-2) respectively by the transfer function iterative computation in corresponding moment,
The iteration result of free response is u
l(n)=u
ml(h-1),
And Children abused reason is similar, the n in transfer function is replaced with n+1 and obtain u (n+1)=a
1u (n)+a
2u (n-1)+k
1d (n)+k
2d (n-1), make the initial condition of voltage be 0, all output is all given tacit consent to equal, namely
d(n-1)＝d(n)＝d(n+1)＝…＝d(n+h)，
u(n+1)＝a
1u(n)+a
2u(n-1)+k
1d(n)+k
2d(n-1)＝0+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)d(n)，
u(n+2)＝a
1u(n+1)+a
2u(n)+k
1d(n+1)+k
2d(n)＝a
1(k
1+k
2)d(n)+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)(a
1+1)d(n)，……
The result obtaining Children abused part is by that analogy the product of a constant operator and duty ratio d (n),
Obtain u (n+h) by the iterative computation of free response part and Children abused part, u (n+h) and u (n) are made difference and obtains Δ m.
Following duty ratio result of calculation is drawn according to the formula of Predictive function control,
Wherein unit forced output is the constant operator of Children abused part iteration result, and free output increment=free output-model output, Desired increment expect increment Delta p.
Above-mentioned iterative computation is for the second order process containing complex poles.
Preferably, the number of times h of described iterative computation is more than or equal to 2.
The number of times h of iterative computation is larger, and corresponding prediction time domain is longer, then export response (voltage) more close to the open loop characteristic of system, and input change (duty ratio) then shows certain step response; The number of times h of iterative computation is less, then still inputting change (duty ratio) shows certain dynamic characteristic to export response relative smooth.And when hardware circuit power is lower, load variations is larger on circuit characteristic impact.
H also can be subject to the impact of closed loop response time simultaneously, and therefore the value of h can not be excessive, can not get 1, all can produce vibration to a certain degree.
For the load of the overwhelming majority, when the number of times h of iterative computation is 3, preferably effect can be arrived.
Preferably, the load of DC-DC circuit is 5 ~ 20 Ω, and the number of times h of described iterative computation is 2 ~ 15.
Further preferably, the number of times h of described iterative computation is 3 or 10 ~ 15.When load is less, the number of times h span of iterative computation is larger, and h can get higher value, and the number of times h of iterative computation is 10 ~ 15 better.
Preferably, the load of DC-DC circuit is greater than 20 Ω, and the number of times h of described iterative computation is 2 ~ 5.
Further preferably, the number of times h of described iterative computation is 3.
The invention also discloses a kind of DC-DC converter control system, comprise the first module and the second module,
Described first module is for obtaining the feedback voltage level of DC-DC circuit output and comparing with setting voltage value and obtain correction error △ u;
Described second module is for calculating the pwm control signal of subsequent time DC-DC converter main switch, and computational process is as follows,
Described correction error △ u is judged:
If correction error △ is u=0, then maintain the pwm control signal controlling DC-DC converter main switch constant;
If correction error △ u ≠ 0, then calculate expectation increment Delta p=△ u (the 1-λ of future time instance
h), utilize transfer function u (n)=a simultaneously
1u (n-1)+a
2u (n-2)+k
1d (n-1)+k
2d (n-2) carries out the prediction increment Delta m of iterative computation future time instance, makes that Δ m is equal with Δ p calculates duty ratio d, and is converted to the pwm control signal of subsequent time DC-DC converter main switch;
Wherein
h is the number of times of iterative computation, and Ts is the sampling time, and CLTR is the closed loop response time, and Tr is the parameter wherein a determined by closed loop response time CLTR
1, a
2, k
1and k
2for the coefficient correlation of transfer function, described current time was the n-th moment, and described future time instance is (n+h) moment.
The hardware implemented process of the control method of DC-DC converter of the present invention comprises the steps:
1) input/output terminal of I/O port to circuit provided by GPIC FPGA is connected, realize voltage acquisition and A/D D/A change and duty ratio to the conversion of PWM ripple and output;
2) Labview is utilized to carry out sampling and duty ratio is converted into the programming of PWM in computer end;
3) combining the read-write program write utilizes Labview to carry out writing of predictive control algorithm in computer end;
4) utilize Labview to be triggered by the clock in above-mentioned steps to set, ensure the synchronism that parallel logic calculates;
5) utilize Labview to carry out host computer in computer end to write, the observation of implementation model, control, time isoparametric typing and corresponding data.
6) DC-DC circuit after above step being completed connects power source loads and has carried out whole design.
The invention has the beneficial effects as follows:
1, adopting predictive functional control algorithm can effectively decrease Model Predictive Control Algorithm itself by the way of one-step prediction needs a large amount of online rolling optimizations to calculate, and reaches set point fast to realize controlling DC-DC converter.
2, adopt GPIC (universal frequency converter inverter) as the hardware implementing of algorithm, not only can ensure the data acquisition of high-speed, high precision but also the CPU of FPGA can be utilized to carry out computing at a high speed.
3, Labview software is adopted conveniently to carry out the programming of host computer and FPGA in computer end.And for parallelization dismiss provide convenient.
4, real time data is read and write to utilize the transmission rate of Ethernet 40M/s to ensure, simultaneously GPIC provides the data acquisition of 100k/s and A/D conversion ensure that enough samplings.
Accompanying drawing explanation
Fig. 1 is standard Buck type DC-DC converter topological circuit figure.
Fig. 2 is DC-DC converter control procedure simulation drawing.
Fig. 3 is the outside flow chart of DC-DC converter control system of the present invention.
Fig. 4 is DC-DC converter Control system architecture schematic diagram of the present invention.
Fig. 5 is simulated effect schematic diagram of the present invention.
Embodiment
Below in conjunction with specific embodiment, the invention will be further described.
Be illustrated in figure 1 Buck type DC-DC converter topological circuit figure, the topology of Buck type transducer is that voltage source, tandem tap and current loading combine, and it is also referred to as tandem tap transducer.Wherein V
inand V
outbe respectively input voltage and output voltage, L is inductance, and R is load resistance, and C is electric capacity, r
lthe internal driving of outputting inductance, r
cit is the equivalent series resistance of output capacitance.R
dand r
dsbe the parasitic drain impedance of fly-wheel diode and field effect transistor respectively, Q is main switch, and main switch Q place is provided with the input of control signal.
The basic functional principle of Buck type DC-DC converter topological circuit is: main switch Q is by modulator control, and with certain frequency f and duty ratio d alternate conduction, like this, be d by producing duty ratio at the common port place of main switch Q and rectifying tube D, the cycle is T
sthe square wave of=1/f.Inductance and the DC quantity of electric capacity composition low pass filter only by expecting, of ac then reduces greatly.Ideally, the value of output voltage by input voltage and duty ratio given, V
out=V
in* d, d is duty ratio and 0<d<1, so when Buck type DC-DC converter controls, control main switch Q as long as calculate duty ratio d and be converted into control signal, control Buck type DC-DC converter can carry out control voltage.
In fuel cell generation, because fuel cell output voltage is often lower than the operating voltage of actual loading, so need to convert the energy into as stable DC bus voltage by preceding stage DC-DC converter, further step-down provides electric energy for loaded work piece again, but the output voltage excursion of fuel cell is very wide, and lower than the operating voltage of general load.Therefore need to promote fuel cell by DC-DC converter and be depressed into required galvanic current pressure, then convert the operating voltage of all kinds load through DC-DC converter at different levels to.Most DC-DC converter is all that (CCM) analyzes under continuous time pattern.Modeling work of the present invention be exactly based on switching converter operation when the CCM pattern, obtain constant frequency dynamic model by State-space Averaging Principle:
According to the sampling time by constant frequency dynamic model discretization, write as following input/output relation,
u(n)＝a
1u(n-1)+a
2u(n-2)+k
1d(n-1)+k
2d(n-2)
Here to note a bit, this literary style is only limitted to without integral element or stable polar point is just passable invariably, if have integral element or have unstable limit (such as mode) first should adopt the method for decomposition, l fraction is decomposed into stable model and solves again.Tentatively do not consider interference and constraint in the present invention, because interference not external noise, be to survey link on the contrary, so there is no take into account.And the constraint of restricted problem optimized variable for the present invention can be write separately in FPGA program, does not need to be incorporated in optimizing process.
Just can complete the design of controller according to the basic framework of PREDICTIVE CONTROL after having had model.First become or stational system when we need to judge that this model is, need to carry out feed-forward process for time-varying model, choose stational system in the present invention therefore do not need the link that feedovers.Be not that therefore external noise disturbs link also can remove owing to disturbing adjustable in addition.Meanwhile, in view of GPIC is with being converted into PWM mode block by duty ratio, therefore clipped portion be programmed in duty ratio conversion process, do not need to write in control algolithm.
For PREDICTIVE CONTROL, the response in future of a process can be predicted by utilizing the behavioural information in this process past and suitable model.Be exactly that a specific action of a physical process can produce a special response in simple terms, and subsequent time can be extrapolated by the behavior of expection, be illustrated in figure 2 and utilize reference locus to make following behavior rapidly converge to the process of expection.
Generally, this reference locus is adopted to have following reason: first is that initialized process is very simple, and the measured value in past or estimated value are all present in inside a point.Second is that under time domain, equation is simply convenient to calculate.
By Fig. 2, we draw the conclusion of a Δ p=Δ m, then can apply principle of stacking according to inearized model, and the formula can releasing Predictive function control is:
(Setpoint-process output(n))(1-λ
h)＝forced output(n+h)
+free output(n+h)-model output(n)，
The parameter can found out in reference locus by this formula artificially to adjust, and Children abused and free response are all relevant with model itself.Wherein
h is the time point that Δ p=Δ m is corresponding in fig. 2, also referred to as the step number of coincide point or iterative computation.Because model determines that lower post-sampling time Ts also can decide accordingly, so determine that the factor of reference locus is exactly coincide point h and closed loop response time, this formula is empirical equation in addition.
The predicted voltage u (n+h) that prediction increment Delta m equals future time instance deducts the theoretical voltage u (n) of current time,
The theoretical voltage u (n) in front moment is calculated in conjunction with the first two moment (n-1) and magnitude of voltage corresponding to (n-2) and duty ratio by described transfer function;
The computational process of the predicted voltage u (n+h) of future time instance comprises free response part and Children abused part, and for free response part, resolution principle is make the input of duty ratio be 0, namely
u
m(n+1)＝a
1u
m(n)+a
2u
m(n-1)+0+0
u
m(n+2)＝a
1u
m(n+1)+a
2u
m(n)+0+0
…
u
m(n+h)＝a
1u
m(n+h-1)+a
2u
m(n+h-2)+0+0
Its equation of n th order n following can be write out according to transfer function:
u
ml(p)＝a
1u
ml(p-1)+a
2u
ml(p-2)+0+0
For known h, u
mlonly need to iterate to h-1 from 3, initial condition is:
u
ml(2)＝u
m(n-1)
u
ml(1)＝u
m(n-2)
Wherein, u
mand u (n-1)
m(n-2) respectively by the transfer function iterative computation in corresponding moment,
The iteration result of free response is u
l(n)=u
ml(h-1),
And Children abused reason is similar, the n in transfer function is replaced with n+1 and obtain u (n+1)=a
1u (n)+a
2u (n-1)+k
1d (n)+k
2d (n-1), make the initial condition of voltage be 0, all output is all given tacit consent to equal, namely
d(n-1)＝d(n)＝d(n+1)＝…＝d(n+h)，
u(n+1)＝a
1u(n)+a
2u(n-1)+k
1d(n)+k
2d(n-1)＝0+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)d(n)，
u(n+2)＝a
1u(n+1)+a
2u(n)+k
1d(n+1)+k
2d(n)＝a
1(k
1+k
2)d(n)+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)(a
1+1)d(n)，……
The result obtaining Children abused part is by that analogy the product of a constant operator and duty ratio d (n).
Obtain u (n+h) by the iterative computation of free response part and Children abused part, u (n+h) and u (n) are made difference and obtains Δ m.
Following duty ratio result of calculation is drawn according to the formula of Predictive function control,
Wherein unit forced output is the constant operator of Children abused part iteration result, and free output increment=free output-model output, Desired increment expects increment Delta p exactly.
For PREDICTIVE CONTROL, the response in future of a process can be predicted by utilizing the behavioural information in this process past and suitable model.Be exactly that a specific action of a physical process can produce a special response in simple terms, and the behavior of subsequent time can be extrapolated by the behavior of expection, thus, Predictive function control proposes a kind of reference locus and following behavior can be rapidly converged in the process of expection go.
Be illustrated in figure 4 DC-DC converter Control system architecture schematic diagram of the present invention, FPGA be one can the digitization system of high-speed computation.Can by anticipation function (PFC) write wherein.Universal frequency converter controller (the General Purpose InverterController of a loading NI 9683 board, GPIC) coordinate NI single-board RIO 9606 board can independently realize controller and data acquisition, wherein Simutaneous AI interface is used for doing feedback voltage signal collection.This interface comprises the A/D conversion of 12, and maximum reading error is 0.7%.LVTTI Digital I/O interface is used for exporting PWM ripple, and wherein output low level is 0 ~ 0.4V, and high level is 2.7 ~ 3.3V.NIFPGA can carry out programming and communicating in computer end by the graphical Integrated Development Environment of LABVIEW.Complete program will comprise the Hosts file that the FPGA assignment file that makees controller and host computer are write.As can be seen from Figure 4, the input of analog to digital converter is connected with the output of DC-DC circuit, for gathering voltage and carrying out analog-to-digital conversion to the voltage collected; The output of analog to digital converter is connected with the input of controller GPIC, has algorithm of predictive functional control in controller GPIC, but also stores the former magnitude of voltage of current time and duty ratio, so that computational process was called former data; The output of controller GPIC is connected with the input of FPGA, and duty cycle conversion is pwm control signal by FPGA; The output of FPGA is connected with the input of pwm driver, and the output of pwm driver is connected with the pwm control signal input of main switch.
Fig. 5 is simulated effect schematic diagram, illustrate from the start moment play stable state and input voltage from specified 9v to 5v change procedure and load from 5 ohm to 10 ohm change procedure, after start, due to circuit, the switching characteristics such as inductance own, field effect transistor can produce one section of vibration as can be seen from Figure 5, then tending towards stability, is next two groups of dynamic processes.Can know that input voltage and complicated change all can cause interference according to transfer function, need controller to work.But due to the feature of control algolithm own, input voltage is equivalent to the impact on transfer function gain, and PFC effectively can process this, therefore in Fig. 5, reflect that the response time of voltage dynamic response process is only in Millisecond level, just can reach stable.Control with traditional PID and compared with compensating circuit method, all want fast a lot.This is because algorithm self character to a great extent, and for response process due to point-to-point prediction, a step just can realize, then in conjunction with FPGA self computation performance, makes control effects reach a relatively outstanding level.
Claims (8)
1. a control method for DC-DC converter, is characterized in that, comprising: '
(1) obtain the feedback voltage level of DC-DC circuit output and compare with setting voltage value and obtain correction error △ u;
(2) described correction error △ u is judged:
If correction error △ is u=0, then maintain the pwm control signal controlling DC-DC converter main switch constant;
If correction error △ u ≠ 0, then calculate expectation increment Delta p=△ u (the 1-λ of future time instance
h), utilize transfer function u (n)=a simultaneously
1u (n-1)+a
2u (n-2)+k
1d (n-1)+k
2d (n-2) carries out the prediction increment Delta m of iterative computation future time instance, makes that Δ m is equal with Δ p calculates duty ratio d, and is converted to the pwm control signal of subsequent time DC-DC converter main switch;
Wherein
h is the number of times of iterative computation, and Ts is the sampling time, and CLTR is the closed loop response time, and Tr is the parameter determined by closed loop response time CLTR, wherein a
1, a
2, k
1and k
2for the coefficient correlation of transfer function, described current time was the n-th moment, and described future time instance is (n+h) moment.
2. the control method of DC-DC converter as claimed in claim 1, is characterized in that, the predicted voltage u (n+h) that described prediction increment Delta m equals future time instance deducts the theoretical voltage u (n) of current time,
The theoretical voltage u (n) of current time is calculated in conjunction with the first two moment (n-1) and voltage corresponding to (n-2) and duty ratio by described transfer function;
The computational process of the predicted voltage u (n+h) of future time instance comprises free response part and Children abused part, and for free response part, resolution principle is make the input of duty ratio be 0, namely
u
m(n+1)＝a
1u
m(n)+a
2u
m(n-1)+0+0
u
m(n+2)＝a
1u
m(n+1)+a
2u
m(n)+0+0
…
u
m(n+h)＝a
1u
m(n+h-1)+a
2u
m(n+h-2)+0+0
Its equation of n th order n following can be write out according to transfer function:
u
ml(p)＝a
1u
ml(p-1)+a
2u
ml(p-2)+0+0
For known h, u
mlonly need to iterate to h-1 from 3, initial condition is:
u
ml(2)＝u
m(n-1)
u
ml(1)＝u
m(n-2)
Wherein, u
mand u (n-1)
m(n-2) respectively by the transfer function iterative computation in corresponding moment,
The iteration result of free response is u
l(n)=u
ml(h-1),
And Children abused reason is similar, the n in transfer function is replaced with n+1 and obtain u (n+1)=a
1u (n)+a
2u (n-1)+k
1d (n)+k
2d (n-1), make the initial condition of voltage be 0, all output is all given tacit consent to equal, namely
d(n-1)＝d(n)＝d(n+1)＝…＝d(n+h)，
u(n+1)＝a
1u(n)+a
2u(n-1)+k
1d(n)+k
2d(n-1)＝0+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)d(n)，
u(n+2)＝a
1u(n+1)+a
2u(n)+k
1d(n+1)+k
2d(n)＝a
1(k
1+k
2)d(n)+0+k
1d(n)+k
2d(n-1)＝(k
1+k
2)(a
1+1)d(n)，……
The result obtaining Children abused part is by that analogy the product of a constant operator and duty ratio d (n),
Obtain u (n+h) by the iterative computation of free response part and Children abused part, u (n+h) and u (n) are made difference and obtains Δ m.
3. the control method of DC-DC converter as claimed in claim 2, it is characterized in that, the number of times of described iterative computation is more than or equal to 2.
4. the control method of DC-DC converter as claimed in claim 2, it is characterized in that, the load of DC-DC circuit is 5 ~ 20 Ω, and the number of times h of described iterative computation is 2 ~ 15.
5. the control method of DC-DC converter as claimed in claim 4, it is characterized in that, the number of times h of described iterative computation is 10 ~ 15 or 3.
6. the control method of DC-DC converter as claimed in claim 2, it is characterized in that, the load of DC-DC circuit is greater than 20 Ω, and the number of times h of described iterative computation is 2 ~ 5.
7. the control method of DC-DC converter as claimed in claim 6, it is characterized in that, the number of times h of described iterative computation is 3.
8. a DC-DC converter control system, is characterized in that, comprises the first module and the second module,
Described first module is for obtaining the feedback voltage level of DC-DC circuit output and comparing with setting voltage value and obtain correction error △ u;
Described second module is for calculating the pwm control signal of subsequent time DC-DC converter main switch, and computational process is as follows,
Described correction error △ u is judged:
If correction error △ is u=0, then maintain the pwm control signal controlling DC-DC converter main switch constant;
If correction error △ u ≠ 0, then calculate expectation increment Delta p=△ u (the 1-λ of future time instance
h), utilize transfer function u (n)=a simultaneously
1u (n-1)+a
2u (n-2)+k
1d (n-1)+k
2d (n-2) carries out the prediction increment Delta m of iterative computation future time instance, makes that Δ m is equal with Δ p calculates duty ratio d, and is converted to the pwm control signal of subsequent time DC-DC converter main switch;
Wherein
h is the number of times of iterative computation, and Ts is the sampling time, and CLTR is the closed loop response time, and Tr is the parameter determined by closed loop response time CLTR, wherein a
1, a
2, k
1and k
2for the coefficient correlation of transfer function, described current time was the n-th moment, and described future time instance is (n+h) moment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN105634269A (en) * | 2016-01-27 | 2016-06-01 | 浙江大学 | Closed loop dual-mode reduced-order model prediction control method for Buck type DC-DC converter |
| CN105759603A (en) * | 2016-03-23 | 2016-07-13 | 东北大学 | Voltage transformation circuit control system and method based on automatic optimizing model-free controller |
| CN106842958A (en) * | 2017-03-20 | 2017-06-13 | 福州大学 | A kind of distributed model predictive control method of back-to-back converter |
| CN107872166A (en) * | 2017-10-25 | 2018-04-03 | 中国矿业大学 | A kind of Model Predictive Control strategy of discrete inductance formula paralleling and interleaving inverter |
| CN109149936A (en) * | 2018-09-12 | 2019-01-04 | 西安理工大学 | A kind of duty ratio Predictive Control System and control algolithm being applicable in DC/DC converter |
| CN110941302A (en) * | 2019-11-22 | 2020-03-31 | 深圳市元征科技股份有限公司 | Voltage regulator control method and device, voltage regulator and medium |
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| CN110941302A (en) * | 2019-11-22 | 2020-03-31 | 深圳市元征科技股份有限公司 | Voltage regulator control method and device, voltage regulator and medium |
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