CN104733370B - High pressure trap partition method - Google Patents

High pressure trap partition method Download PDF

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Publication number
CN104733370B
CN104733370B CN201310717897.5A CN201310717897A CN104733370B CN 104733370 B CN104733370 B CN 104733370B CN 201310717897 A CN201310717897 A CN 201310717897A CN 104733370 B CN104733370 B CN 104733370B
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trap
well
active area
high pressure
deep
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CN104733370A (en
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赵鹏
张可钢
陈华伦
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention discloses a kind of high pressure trap partition method, the N-type deep high voltage well that traditional P type substrate uses injects the junction depth to be formed due to beneath trenches and injects the junction depth to be formed more than the trap of active area, cause the concentration distribution of deep trap bottom uneven, depletion width in N-type deep trap between p-well is larger, depletion layer tradition easily occurs and leaks electricity, the present invention in isolation well by increasing active area, the concentration impurity ion distribution of deep trap bottom can be made deep or light alternate when N-type deep trap injects, improve the Impurity Distribution of deep trap bottom, depletion width between suppression p-well, improve the isolation performance of high pressure trap.

Description

High pressure trap partition method
Technical field
The present invention relates to field of semiconductor manufacture, particularly relates to a kind of high pressure trap partition method.
Background technology
P-well is commonly used in CMOS technology(PW)Or N traps(NW)To realize the isolation of device, conventional trap partition method is both ends And bottom is isolated using transoid trap.For the high-pressure process using P type substrate, bottom also needs to N-type deep trap (DNW:Deep N Well)To carry out bottom isolation, as shown in Figure 1.In the fabrication process, due to N-type deep trap implanted layer photoetching There is front layer to be directed at active area, while in order to utilize the thermal process after isolated groove etching, therefore N-type deep trap is in isolated groove Ion implanting is carried out after etching, as shown in Fig. 2 wafer surface highly has differences (trench area confronting active area when now injecting It is deeper) so that have that the N traps injection of grooved position is deeper, and the then injection being directly injected into active area is shallower, causes N-type deep trap Bottom concentration distribution is uneven, such as Fig. 3, is contacted in the plane for the generation depletion layer break-through being easiest to, that is, p-well with N-type deep trap Plane on, below isolation N traps(Isolated groove region)Because the injection of N-type deep trap compared with deep causes in this plane that concentration is thin, lead Cause both ends p-well to be broadened to the depletion layer in N-type deep trap, when making alive in p-well, p-well with N-type deep trap depletion layer is wider causes consumption Layer punch-through breakdown to the greatest extent, isolation effect are deteriorated.So isolation effect depends on depletion width of the both ends p-well in deep N-well.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of high pressure trap partition method.
To solve the above problems, high pressure trap partition method of the present invention, N-type deep trap is carried out to the p-well in P type substrate Isolation, is to increase active area in isolated groove region.
Further, described active area increases in the isolated groove in N-type deep trap between p-well.
Further, when progress N-type impurity is injected to form N-type deep trap, increased active area and channel region ion in groove Injection is synchronous to be carried out.
The present invention needs isolation high pressure using the N traps of isolation and possesses enough areas, by increasing in isolated area groove Added with source region, when N traps inject, increased active area is not influenceed by the groove isolated, and improves the concentration distribution of DNW bottoms, So that one piece of denseer region is arranged at bottom, suppress depletion layer and broaden, improve isolation performance.
Brief description of the drawings
Fig. 1 is conventional trap isolation structure schematic diagram.
Fig. 2 is conventional DNW ion implantings schematic diagram.
Fig. 3 is conventional high-pressure trap isolated failure schematic diagram.
Fig. 4 is DNW ion implantings schematic diagram of the present invention.
Fig. 5 is high pressure trap partition method schematic diagram of the present invention.
Fig. 6 is DNW bottoms of the present invention concentration profile.
Embodiment
A kind of high pressure trap partition method of the present invention, N-type deep trap isolation is carried out to the p-well in P type substrate, isolated Increase active area in trench region, described active area increases in the isolated groove in N-type deep trap between p-well, in Fig. 4 Shown in dashed circle, when progress N-type impurity is injected to form N-type deep trap, increased active area and channel region ion implanting in groove Synchronous to carry out, the ion implanting of active area is not influenceed by the groove isolated in isolated area, can improve the concentration point of DNW bottoms Cloth, with reference to shown in Fig. 5, the active area ion implanting effect in the groove between the p-well in DNW on NW, it can be seen that DNW exists Injection depth at isolated groove is more than the depth of active area, and the presence of active area causes trench region bottom to have in isolated groove The larger region of one piece of concentration, trench area concentration deficiency at this caused by injection junction depth is larger is compensate for, makes DNW bottoms Ion concentration distribution is deep or light alternate, it is suppressed that the width of depletion region between the p-well of both sides, improves isolation performance, does not increase extra Cost, solve isolation well area diminution after electrical leakage problems, contribute to the diminution of integral device area.
Fig. 6 is the DNW bottoms concentration profile of trap isolation structure of the present invention, and concentration profile is sharper in rectangle frame in figure It is sharp, then it represents that the concentration of DNW bottoms is more uneven, that is, punctures easier generation.Pass through concentration profile, it can be seen that breakdown Weakness is just in the plane that p-well bottom contacts with DNW.Increase active area can effectively improve isolation well bottom concentration point Cloth so that it is more smooth at the weakness of isolation, so as to reach more preferable isolation effect.
The preferred embodiments of the present invention are these are only, are not intended to limit the present invention.Come for those skilled in the art Say, the present invention there can be various modifications and variations.Within the spirit and principles of the invention, it is any modification for being made, equivalent Replace, improve etc., it should be included in the scope of the protection.

Claims (2)

1. a kind of high pressure trap partition method, N-type deep trap isolation is carried out to the p-well in P type substrate, it is characterised in that:In isolating trenches Groove increases active area in region;Described active area increases in the isolated groove in N-type deep trap between p-well.
2. high pressure trap partition method as claimed in claim 1, it is characterised in that:N-type impurity is carried out to inject to form N-type deep trap When, increased active area is synchronous with channel region ion implanting in groove is carried out.
CN201310717897.5A 2013-12-23 2013-12-23 High pressure trap partition method Active CN104733370B (en)

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Application Number Priority Date Filing Date Title
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CN104733370A CN104733370A (en) 2015-06-24
CN104733370B true CN104733370B (en) 2018-02-06

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6251744B1 (en) * 1999-07-19 2001-06-26 Taiwan Semiconductor Manufacturing Company Implant method to improve characteristics of high voltage isolation and high voltage breakdown
CN1992347A (en) * 2005-12-28 2007-07-04 东部电子股份有限公司 High voltage semiconductor device and method of manufacturing the same
CN103021852A (en) * 2011-09-22 2013-04-03 上海华虹Nec电子有限公司 Method for manufacturing high-voltage P type LDMOS
CN103426759A (en) * 2012-05-16 2013-12-04 上海华虹Nec电子有限公司 PLDMOS manufacturing method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100164018A1 (en) * 2008-12-30 2010-07-01 Ming-Cheng Lee High-voltage metal-oxide-semiconductor device
US20130071994A1 (en) * 2011-09-20 2013-03-21 Alpha And Omega Semiconductor Incorporated Method of integrating high voltage devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6251744B1 (en) * 1999-07-19 2001-06-26 Taiwan Semiconductor Manufacturing Company Implant method to improve characteristics of high voltage isolation and high voltage breakdown
CN1992347A (en) * 2005-12-28 2007-07-04 东部电子股份有限公司 High voltage semiconductor device and method of manufacturing the same
CN103021852A (en) * 2011-09-22 2013-04-03 上海华虹Nec电子有限公司 Method for manufacturing high-voltage P type LDMOS
CN103426759A (en) * 2012-05-16 2013-12-04 上海华虹Nec电子有限公司 PLDMOS manufacturing method

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