CN104731713B - Phase transition internal memory abrasion equilibrium method and system based on Random Maps - Google Patents

Phase transition internal memory abrasion equilibrium method and system based on Random Maps Download PDF

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CN104731713B
CN104731713B CN201510121627.7A CN201510121627A CN104731713B CN 104731713 B CN104731713 B CN 104731713B CN 201510121627 A CN201510121627 A CN 201510121627A CN 104731713 B CN104731713 B CN 104731713B
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memory
memory address
random maps
address
maps table
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CN104731713A (en
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胡事民
刘巍
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Tsinghua University
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention provides a kind of phase transition internal memory abrasion equilibrium method based on Random Maps, including:A memory address Random Maps table is generated as current memory address Random Maps table;There is s/M list item in the current memory Random Maps table;S is the size of phase transition internal memory, and M is the size of a phase transition internal memory row;When internal memory write operation occurs, if it is described write number counter be not up to it is default write frequency threshold value, judge whether the adjustment flag bit of corresponding list item in the current memory address Random Maps table has been set;If being set, address conversion is carried out using the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses;Otherwise, Memory adjustments process is carried out, and changes the physical address values of corresponding list item and adjustment marker bit in current memory address Random Maps table.The present invention can improve phase transition internal memory abrasion equilibrium effect, reach the purpose in lifting phase transition internal memory life-span, while the influence to performance is preferably minimized.

Description

Phase transition internal memory abrasion equilibrium method and system based on Random Maps
Technical field
The present invention relates to field of computer technology, and in particular to a kind of phase transition internal memory abrasion equilibrium side based on Random Maps Method and system.
Background technology
The shortcomings that number is limited is write because phase transition internal memory is present, therefore, can the life-span that lift phase transition internal memory just as it The key technology of practical application.Abrasion equilibrium technology is one of main method for lifting the phase transition internal memory life-span.
Existing abrasion equilibrium technology subject matter is, or each internal storage location of tracking writes number, causes a large amount of Memory space and performance cost, or Memory adjustments mode existence information leakage, malice abrasion program can not be resisted and attacked Hit.
The content of the invention
For in the prior art the defects of, the present invention provides a kind of phase transition internal memory abrasion equilibrium method based on Random Maps And system, phase transition internal memory abrasion equilibrium effect can be improved, reaches the purpose in lifting phase transition internal memory life-span, while to the influence of performance It is preferably minimized.
The present invention provides following technical scheme:
In a first aspect, the invention provides a kind of phase transition internal memory abrasion equilibrium method based on Random Maps, including:
A memory address Random Maps table is generated as current memory address Random Maps table;The current memory is random There is s/M list item in mapping table;S is the size of phase transition internal memory, and M is the size of a phase transition internal memory row;
The current memory address Random Maps table is used to logical memory address being changed into physical memory addresses, described to work as The index value of preceding memory address Random Maps table represents the line number of logical memory, the table of the current memory address Random Maps table Item includes the line number and adjustment two list items of flag bit of physical memory;
When internal memory write operation occurs, judge to pre-set writes number counter and whether reaches default and write number threshold Value, if it is described write number counter be not up to it is default write frequency threshold value, judge the current memory address Random Maps table In the adjustment flag bit of corresponding list item whether be set;If being set, patrolling for current memory address Random Maps table is used The mapping relations for collecting memory address and physical memory addresses carry out address conversion, and will write number counter and add 1;Otherwise, carry out Memory adjustments process, and the physical address values of corresponding list item and adjustment marker bit in current memory address Random Maps table are changed, And number counter will be write and add 1.
Further, the phase transition internal memory abrasion equilibrium method based on Random Maps also includes:
Number counter is write when internal memory write operation occurs, described in judgement whether reach default and write frequency threshold value, if institute State to write number counter and reach default and write frequency threshold value, be then updated operation:
Current memory address Random Maps table is copied in the Random Maps table pre-set, forms last time memory address Random Maps table;
Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
New memory address Random Maps table is generated as current memory address Random Maps table;
The number counter of writing is reset;
Wherein, the reverse address mapping table of the last time memory address Random Maps table is last time memory address Random Maps The mapping table that the index value and physical memory line number list item of table are formed after exchanging.
Further, the progress Memory adjustments process includes:
Current memory address Random Maps table and last time memory address Random Maps table are inquired about according to logical address, reflected The current physical address and last time physical address penetrated;The content in current physical address and last time physical address is exchanged, and is changed The physical address values of two corresponding list items, set their adjustment flag bit in current memory address Random Maps table;
Logic corresponding to last time physical address is inquired about in the reverse address mapping table of last time memory address Random Maps table Address, if logical address logical address corresponding with last time physical address after exchange is consistent, complete this adjustment process; Otherwise, with logical address after adjustment and physical address inconsistent internal memory behavior beginning, circulate and physical memory is adjusted, and The adjustment flag bit of current memory address mapping table immediately is changed, until the number corresponding with logical address of the data in physical address Untill consistent.
Further, the phase transition internal memory abrasion equilibrium method based on Random Maps also includes:
When internal memory read operation occurs, the adjustment mark of corresponding list item in the current memory address Random Maps table is judged Whether position is set;If being set, logical memory address and thing using the corresponding list item of current memory address Random Maps table The mapping relations for managing memory address carry out address conversion;Otherwise, patrolling using the last time memory address Random Maps corresponding list item of table The mapping relations for collecting memory address and physical memory addresses carry out address conversion.
Further, the phase transition internal memory abrasion equilibrium method based on Random Maps also includes:
N phase transition internal memory row is divided into a region, whole phase transition internal memory is divided into s/ (n*M) individual region, if by institute Elementary cell of the region as memory address Random Maps is stated, then has s/ (n*M) individual table in the current memory Random Maps table .
Wherein, the size for writing frequency threshold value is more than 20 times of areal of the division.
Second aspect, the invention provides a kind of phase transition internal memory architecture system based on Random Maps, including memory address Random Maps controller and memory mapping table memory;
The memory address Random Maps controller, for generating a memory address Random Maps table as current memory Address Random Maps table;There is s/M list item in the current memory Random Maps table;S is the size of phase transition internal memory, and M is one The size of phase transition internal memory row;The current memory address Random Maps table is used for logical memory address with being changed into physical memory Location, the line number of the index value expression logical memory of the current memory address Random Maps table, the current memory address are random The list item of mapping table includes the line number and adjustment two list items of flag bit of physical memory;
The memory address Random Maps controller, it is additionally operable to when internal memory write operation occurs, judge to pre-set writes Whether number counter, which reaches default, is write frequency threshold value, it is described write number counter and be not up to default write frequency threshold value When, judge whether the adjustment flag bit of corresponding list item in the current memory address Random Maps table is set;Described current When the adjustment flag bit of corresponding list item is set in memory address Random Maps table, current memory address Random Maps table is used The mapping relations of logical memory address and physical memory addresses carry out address conversion, and will write number counter and add 1;Work as described When the adjustment flag bit of corresponding list item is not set in preceding memory address Random Maps table, Memory adjustments process is carried out, and change The physical address values of corresponding list item and adjustment marker bit in current memory address Random Maps table, and number counter will be write and add 1;
The memory mapping table memory, for storing current memory address Random Maps table.
Further, the memory address Random Maps controller is additionally operable to, when internal memory write operation occurs, judge institute State to write number counter and whether reach default and write frequency threshold value, it is described write number counter and reach default write frequency threshold value When, it is updated operation:
Current memory address Random Maps table is copied in the Random Maps table pre-set, forms last time memory address Random Maps table;
Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
New memory address Random Maps table is generated as current memory address Random Maps table;
The number counter of writing is reset;
Wherein, the reverse address mapping table of the last time memory address Random Maps table is last time memory address Random Maps The mapping table that the index value and physical memory line number list item of table are formed after exchanging;
The memory mapping table memory, it is additionally operable to store the last time memory address Random Maps table and in the last time Deposit the reverse memory address Random Maps table of address Random Maps table.
Further, the memory address Random Maps controller is additionally operable to when internal memory read operation occurs, described in judgement Whether the adjustment flag bit of corresponding list item is set in current memory address Random Maps table;It is random in the current memory address When the adjustment flag bit of corresponding list item is set in mapping table, the logic of the corresponding list item of current memory address Random Maps table is used The mapping relations of memory address and physical memory addresses carry out address conversion;The phase in the current memory address Random Maps table When answering the adjustment flag bit of list item not to be set, the logical memory address of the corresponding list item of last time memory address Random Maps table is used Address conversion is carried out with the mapping relations of physical memory addresses.
Wherein, the progress Memory adjustments process includes:
Current memory address Random Maps table and last time memory address Random Maps table are inquired about according to logical address, reflected The current physical address and last time physical address penetrated;The content in current physical address and last time physical address is exchanged, and is changed The physical address values of two corresponding list items, set their adjustment flag bit in current memory address Random Maps table;
Logic corresponding to last time physical address is inquired about in the reverse address mapping table of last time memory address Random Maps table Address, when logical address logical address corresponding with last time physical address after exchange is consistent, terminate this adjustment process; When logical address logical address corresponding with last time physical address after exchange is inconsistent, with logical address after adjustment and physically At the location inconsistent internal memory behavior beginning, circulate and physical memory is adjusted, and change current memory address mapping table immediately Flag bit is adjusted, untill the data corresponding with logical address of the data in physical address are consistent.
Wherein, the memory mapping table memory is SDRAM memory.
As shown from the above technical solution, phase transition internal memory abrasion equilibrium method of the present invention based on Random Maps and it is System, at least has the advantages that:By write operation, frequently memory block is evenly distributed to whole phase transition internal memory space, reaches mill Balanced purpose is damaged, so as to improve the life-span of phase transition internal memory, meanwhile, using whole memory headroom address Random Maps mechanism, disappear Except the information leakage of abrasion equilibrium technology, so as to resist the attack that malice wears program.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are the present invention Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis These accompanying drawings obtain other accompanying drawings.
Fig. 1 is the flow chart for the phase transition internal memory abrasion equilibrium method based on Random Maps that the embodiment of the present invention one provides;
Fig. 2 is the structural representation for the phase transition internal memory abrasion equilibrium system based on Random Maps that the embodiment of the present invention four provides Figure;
Fig. 3 is the concrete structure for the phase transition internal memory abrasion equilibrium system based on Random Maps that the embodiment of the present invention four provides Schematic diagram.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention In accompanying drawing, clear, complete description is carried out to the technical scheme in the embodiment of the present invention, it is clear that described embodiment is Part of the embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
Fig. 1 shows the phase transition internal memory abrasion equilibrium method flow chart based on Random Maps that embodiment one provides, such as Fig. 1 Shown, the phase transition internal memory abrasion equilibrium method based on Random Maps of the present embodiment one is based on memory address Random Maps mechanism, Specifically include:
Step 101:A memory address Random Maps table is generated as current memory address Random Maps table;It is described current There is s/M list item in internal memory Random Maps table;S is the size of phase transition internal memory, and M is the size of a phase transition internal memory row;
The current memory address Random Maps table is used to logical memory address being changed into physical memory addresses, described to work as The index value of preceding memory address Random Maps table represents the line number of logical memory, the table of the current memory address Random Maps table Item includes the line number and adjustment two list items of flag bit of physical memory;
Step 102:When internal memory write operation occurs, judge to pre-set writes number counter and whether reaches default and write Frequency threshold value, if it is described write number counter be not up to it is default write frequency threshold value, perform step 102a;Otherwise, perform 102b。
Step 102a:Judge corresponding list item in the current memory address Random Maps table adjustment flag bit whether by Set;If being set, the logical memory address of current memory address Random Maps table and the mapping of physical memory addresses are used Relation carries out address conversion, and will write number counter and add 1;Otherwise, Memory adjustments process is carried out, and changes current memory address The physical address values of corresponding list item and adjustment marker bit in Random Maps table, and number counter will be write and add 1.
Step 102b:Carry out following renewal operation:
Current memory address Random Maps table is copied in the Random Maps table pre-set, forms last time memory address Random Maps table;
Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
New memory address Random Maps table is generated as current memory address Random Maps table;
The number counter of writing is reset;
Wherein, the reverse address mapping table of the last time memory address Random Maps table is last time memory address Random Maps The mapping table that the index value and physical memory line number list item of table are formed after exchanging.
Wherein, the progress Memory adjustments process includes:
Current memory address Random Maps table and last time memory address Random Maps table are inquired about according to logical address, reflected The current physical address and last time physical address penetrated;The content in current physical address and last time physical address is exchanged, and is changed The physical address values of two corresponding list items, set their adjustment flag bit in current memory address Random Maps table;
Logic corresponding to last time physical address is inquired about in the reverse address mapping table of last time memory address Random Maps table Address, if logical address logical address corresponding with last time physical address after exchange is consistent, complete this adjustment process; Otherwise, with logical address after adjustment and physical address inconsistent internal memory behavior beginning, circulate and physical memory is adjusted, and The adjustment flag bit of current memory address mapping table immediately is changed, until the number corresponding with logical address of the data in physical address Untill consistent.
Here it may be noted that when mapping first, only current Random Maps table, the data stored in internal memory need not be entered Row adjustment.Above-mentioned Memory adjustments process is non-Memory adjustments process generally first.
Wherein, the memory address Random Maps table list item mentioned includes mapping of the logical address to physical address, and adjusts Integral denotation position.
Further, when internal memory read operation occurs, corresponding list item in the current memory address Random Maps table is judged Adjustment flag bit whether be set;If being set, in the logic using the corresponding list item of current memory address Random Maps table The mapping relations for depositing address and physical memory addresses carry out address conversion;Otherwise, using last time memory address Random Maps table phase The logical memory address of list item and the mapping relations of physical memory addresses are answered to carry out address conversion.
Preferably, the phase transition internal memory abrasion equilibrium method based on Random Maps also includes:
N phase transition internal memory row is divided into a region, whole phase transition internal memory is divided into s/ (n*M) individual region, if by institute Elementary cell of the region as memory address Random Maps is stated, then has s/ (n*M) individual table in the current memory Random Maps table .
The processing mode that phase transition internal memory is divided into region is a preferable place for bigger phase transition internal memory Reason scheme.
Wherein, the size for writing frequency threshold value is more than 20 times of areal of the division.
For example, it is 20 to write frequency threshold value, then increased internal memory write operation expense accounts for the n/ (n+20*n) of all write operations, small In 4%.
The phase transition internal memory abrasion equilibrium method based on Random Maps that the present embodiment provides, at least have below beneficial to effect Fruit:
By write operation, frequently memory block is evenly distributed to whole phase transition internal memory space, reaches the purpose of abrasion equilibrium, from And the life-span of phase transition internal memory is improved, meanwhile, using whole memory headroom address Random Maps mechanism, eliminate abrasion equilibrium technology Information leakage, so as to resist malice wear program attack.
The present embodiment two is with a specific embodiment to the phase transition internal memory abrasion equilibrium method based on Random Maps It is explained, it is specific as follows:
S1:Using one or more phase transition internal memory rows as a fundamental region, using region as memory address Random Maps Elementary cell, set internal memory write number counter.
S2:Initialize memory address Random Maps table collection, if internal memory write number counter write more than or equal to internal memory it is secondary Number threshold value, then update memory address Random Maps table collection.
S3:For the access process of internal memory read operation.
S4:For the access process of internal memory write operation.
Wherein, the step S1 further comprises:S11:One phase transition internal memory row (row) size is 4096 bytes, one Fundamental region includes n (n >=1) individual row, and the size of phase transition internal memory is s bytes, then whole phase transition internal memory is divided into s/ (n*4096) Individual region, memory address Random Maps table have s/ (n*4096) individual list item;S12:Internal memory is set to write number counter, type is whole Type, when being operated every time to internal memory traveling row write, the value of internal memory write operation number counter is just incremented by 1.
Wherein, the step S2 further comprises:S21:Copy current address mapping table to last time address mapping table Storage location;S22:Generate the reverse address mapping table of last time memory address Random Maps table;S23:According to modern shuffling algorithm, New address mapping table is generated, and copies the storage location of current address mapping table to;S24:Update memory address Random Maps After table collection, internal memory write operation counter O reset.During initialization, S21 and S22 is omitted.
Wherein, the step S3 further comprises:S31:If corresponding list item in current memory address Random Maps table Adjustment flag bit has been set, then the logical memory address using current address mapping table corresponding list item and physical memory addresses Mapping relations carry out address conversion;S32:If in current memory address Random Maps table the adjustment flag bit of corresponding list item not by Set, then closed using the logical memory address of the corresponding list item of last time memory address Random Maps table and the mapping of physical memory addresses System carries out address conversion.
Wherein, the step S4 further comprises:S41:Frequency threshold value is write if writing number counter value and reaching, is performed Update memory address Random Maps table collection process S2;S42:If the adjustment flag bit of corresponding list item is in the mapping table of current address It is set, then is carried out using the logical memory address of the corresponding list item of current address mapping table and the mapping relations of physical memory addresses Address conversion;S43:If the adjustment flag bit of corresponding list item is not set in the mapping table of current address, Memory adjustments are carried out Process, and change the physical address values of corresponding list item and adjustment flag bit in the mapping table of current address;S44:Counting how many times will be write Device value is incremented by 1.
Specifically, the step S43 further comprises:S431:Inquire about current memory address Random Maps table and in last time Deposit address Random Maps table, the current physical address mapped and last time physical address.Exchange current physical address and last time Memory content in physical address, and the physical address values of two corresponding list items in current memory address Random Maps table are changed, Their adjustment flag bit is set;S432:Last time is inquired about in the reverse address mapping table of last time memory address Random Maps table Logical address corresponding to physical address.If logical address logical address corresponding with last time physical address after exchange is consistent, Then complete this adjustment process;Otherwise, S433:The logical address memory line inconsistent with physical address is as opening using after adjustment End, circulates and physical memory is adjusted, and changes the line number and adjustment mark of the corresponding list item of current memory address Random Maps table Will position, untill logical address is consistent with the mapping of physical address.
Wherein, the memory address Random Maps table collection includes current memory address Random Maps table, last time memory address The back mapping table of Random Maps table and last time address Random Maps table.
Wherein, current memory address Random Maps table, for logical memory address to be changed into physical memory addresses, index The line number of value expression logical memory, mapping value element includes the line number and adjustment two list items of flag bit of physical memory, current interior Deposit the address of cache that address Random Maps table was used in this Random Maps cycle;Last time memory address Random Maps table, is used for The address mapping table that the upper a cycle in this memory address Random Maps cycle uses, indicate bit entry not comprising adjustment;On The reverse address mapping table of secondary memory address Random Maps table be last time mapping table index value and line number element value exchange after The mapping table of formation, i.e. the index of back mapping table is the physical memory line number element value of last time mapping table, back mapping table Element value is the index value of last time mapping table.
Wherein, the areal that the size for writing frequency threshold value mentioned in the present embodiment is divided by phase transition internal memory determined, General value is 20 times or more of areal.For example, it is 20 to write frequency threshold value, then increased internal memory write operation expense accounts for institute There is the n/ (n+20*n) of write operation, less than 4%.
The phase transition internal memory abrasion equilibrium method based on Random Maps that the present embodiment provides, at least have below beneficial to effect Fruit:
By write operation, frequently memory block is evenly distributed to whole phase transition internal memory space, reaches the purpose of abrasion equilibrium, from And the life-span of phase transition internal memory is improved, meanwhile, using whole memory headroom address Random Maps mechanism, eliminate abrasion equilibrium technology Information leakage, so as to resist malice wear program attack.
The present embodiment three is further worn equal with another specific embodiment to the phase transition internal memory based on Random Maps Weighing apparatus method is explained, specific as follows:
S11:Using one or more phase transition internal memory rows as a fundamental region, using region as memory address Random Maps Elementary cell, set internal memory write number counter.
Specifically, first, it is 4096 bytes to define phase transition internal memory row (row) size, and a fundamental region includes n (n >=1) individual row, the size of phase transition internal memory is s bytes, then whole phase transition internal memory is divided into s/ (n*4096) individual region, memory address Random Maps table has s/ (n*4096) individual list item.Then, internal memory write operation number counter is set, and type is integer.It is right every time When memory line carries out write operation, the value of internal memory write operation number counter is just incremented by 1.
S12:Initialization/renewal memory mapping table.
Specifically, first to, current address mapping table is copied to the storage location of last time address mapping table.Then, generate The reverse address mapping table of last time memory address Random Maps table.During initialization, the first two steps are omitted.Finally, according to modern Shuffling algorithm, new address mapping table is generated, and copy the storage location of current address mapping table to.In addition, renewal internal memory After the Random Maps table collection of location, internal memory write operation counter O reset.
S13:The memory address mappings process of read operation.
Specifically, first, if the adjustment flag bit of corresponding list item has been set in the mapping table of current address, uses and work as The logical memory address of the corresponding list item of preceding address mapping table and the mapping relations of physical memory addresses carry out address conversion.Then, If the adjustment flag bit of corresponding list item is not set in the mapping table of current address, the corresponding list item of last time address mapping table is used Logical memory address and physical memory addresses mapping relations carry out address conversion.
S14:The memory address mappings process of write operation.
Specifically, first, frequency threshold value is write if writing number counter value and reaching, perform renewal memory address and reflect at random Firing table collection process S12.Then, if the adjustment flag bit in the mapping table of current address has been set, reflected using current address The logical memory address of firing table and the mapping relations of physical memory addresses carry out address conversion.Then, if current address maps Adjustment flag bit in table is not set, then carries out Memory adjustments process, and change corresponding physics in the mapping table of current address Address value and adjustment flag bit.Finally, number counter value will be write and be incremented by 1.
More specifically, in S14, if the adjustment flag bit in the mapping table of current address is not set, first, look into Ask current address mapping table and last time address mapping table, the current physical address mapped and last time physical address.Exchange and work as Memory content in preceding physical address and last time physical address, and change the physics of two corresponding list items in the mapping table of current address Address value, their adjustment flag bit is set.Then, looked into the reverse address mapping table of last time memory address Random Maps table Ask logical address corresponding to last time physical address.If logical address logical address corresponding with last time physical address after exchange Unanimously, then this adjustment process is completed.Otherwise, using after adjustment the logical address memory line inconsistent with physical address as opening End, circulates and physical memory is adjusted, and changes the line number and adjustment flag bit of the corresponding list item of current address mapping table, until Untill logical address is consistent with the mapping of physical address.
Wherein, the memory address Random Maps table collection includes current memory address Random Maps table, last time memory address The back mapping table of Random Maps table and last time address Random Maps table.
More specifically, current memory address Random Maps table is used to logical memory address being changed into physical memory addresses, Index value represents the line number of logical memory, and list item includes the line number and adjustment two list items of flag bit of physical memory, current memory The address of cache that address Random Maps table was used in this Random Maps cycle;Last time memory address Random Maps table, for this The address mapping table that the upper a cycle in secondary memory address Random Maps cycle uses, indicate bit entry not comprising adjustment;Last time The reverse address mapping table of memory address Random Maps table is the exchange of last time mapping table index value and physical memory line number list item The mapping table formed afterwards, the i.e. index of back mapping table are the physical memory line numbers of last time mapping table, the member of direction mapping table Plain value is the index value of last time mapping table.
A kind of phase transition internal memory abrasion equilibrium method based on Random Maps according to embodiments of the present invention, by by write operation Frequently memory block is evenly distributed to whole phase transition internal memory space, reaches the purpose of abrasion equilibrium, so as to improve phase transition internal memory Life-span, meanwhile, using whole memory headroom address Random Maps mechanism, the information leakage of abrasion equilibrium technology is eliminated, so as to The attack that malice wears program can be resisted.
Fig. 2 and Fig. 3 shows the structure for the phase transition internal memory abrasion equilibrium system based on Random Maps that example IV provides Schematic diagram, referring to Fig. 2 and Fig. 3, the present embodiment four provides a kind of phase transition internal memory architecture system based on Random Maps, including: Memory address Random Maps controller 10 and memory mapping table memory 20;
The memory address Random Maps controller 10, for generating a memory address Random Maps table as current interior Deposit address Random Maps table;There is s/M list item in the current memory Random Maps table;S be phase transition internal memory size, M mono- The size of individual phase transition internal memory row;The current memory address Random Maps table is used to logical memory address being changed into physical memory Address, the index value of the current memory address Random Maps table represent the line number of logical memory, the current memory address with The list item of machine mapping table includes the line number and adjustment two list items of flag bit of physical memory;
The memory address Random Maps controller 10, it is additionally operable to, when internal memory write operation occurs, judge what is pre-set Write number counter and whether reach default and write frequency threshold value, it is described write number counter and be not up to default write frequency threshold value When, judge whether the adjustment flag bit of corresponding list item in the current memory address Random Maps table is set;Described current When the adjustment flag bit of corresponding list item is set in memory address Random Maps table, current memory address Random Maps table is used The mapping relations of logical memory address and physical memory addresses carry out address conversion, and will write number counter and add 1;Work as described When the adjustment flag bit of corresponding list item is not set in preceding memory address Random Maps table, Memory adjustments process is carried out, and change The physical address values of corresponding list item and adjustment marker bit in current memory address Random Maps table, and number counter will be write and add 1;
The memory mapping table memory 20, for storing current memory address Random Maps table.
Further, the memory address Random Maps controller 10 is additionally operable to, when internal memory write operation occurs, judge It is described write number counter and whether reach default write frequency threshold value, it is described write number counter and reach default write number threshold During value, operation is updated:
Current memory address Random Maps table is copied in the Random Maps table pre-set, forms last time memory address Random Maps table;
Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
New memory address Random Maps table is generated as current memory address Random Maps table;
The number counter of writing is reset;
Wherein, the reverse address mapping table of the last time memory address Random Maps table is last time memory address Random Maps The mapping table that the index value and physical memory line number list item of table are formed after exchanging;
The memory mapping table memory 20, it is additionally operable to store the last time memory address Random Maps table and the last time The reverse memory address Random Maps table of memory address Random Maps table.
Further, the memory address Random Maps controller 10 is additionally operable to, when internal memory read operation occurs, judge institute Whether the adjustment flag bit for stating corresponding list item in current memory address Random Maps table is set;The current memory address with When the adjustment flag bit of corresponding list item is set in machine mapping table, patrolling for the current memory address corresponding list item of Random Maps table is used The mapping relations for collecting memory address and physical memory addresses carry out address conversion;In the current memory address Random Maps table When the adjustment flag bit of corresponding list item is not set, the logical memory of the corresponding list item of last time memory address Random Maps table is used The mapping relations of location and physical memory addresses carry out address conversion.
Wherein, the progress Memory adjustments process includes:
Current memory address Random Maps table and last time memory address Random Maps table are inquired about according to logical address, reflected The current physical address and last time physical address penetrated;The content in current physical address and last time physical address is exchanged, and is changed The physical address values of two corresponding list items, set their adjustment flag bit in current memory address Random Maps table;
Logic corresponding to last time physical address is inquired about in the reverse address mapping table of last time memory address Random Maps table Address, when logical address logical address corresponding with last time physical address after exchange is consistent, terminate this adjustment process; When logical address logical address corresponding with last time physical address after exchange is inconsistent, with logical address after adjustment and physically At the location inconsistent internal memory behavior beginning, circulate and physical memory is adjusted, and change current memory address mapping table immediately Flag bit is adjusted, untill the data corresponding with logical address of the data in physical address are consistent.
Preferably, the memory mapping table memory 20 is SDRAM memory.
Specifically, when the memory address mappings controller 10 judges that internal memory writes number and reaches a certain threshold value, in renewal Deposit each mapping table stored in map store.
Specifically, the memory address mappings controller 10 judge an internal memory physical address be last time address reflect During the result penetrated, must according to current address mapping table mapping relations carry out physical memory adjustment, including the adjustment of content with And the adjustment of correlation table and list item.
Specifically, memory address Random Maps controller 10 is used for audit memory mapping table, internal memory write operation number is recorded, And memory mapping table is updated.Memory mapping table memory 20 be used for store current memory address Random Maps table, The reverse address mapping table of secondary memory address Random Maps table and last time memory address Random Maps table.More specifically, internal memory After location map controller 10 receives internal memory logical address, the corresponding mapping table in audit memory map store 20, obtain Internal memory physical address.When memory address mappings controller 10 judges that internal memory writes number and reaches a certain threshold value, memory mapping table is updated The each mapping table stored in memory 20.Memory address mappings controller 10 judges that internal memory physical address is last time During the result of location mapping, the adjustment of physical memory must be carried out according to the mapping relations of current address mapping table, includes the tune of content The adjustment of whole and correlation table and list item.
The phase transition internal memory architecture system based on Random Maps provided according to the present embodiment, it is above-mentioned available for performing or realizing The phase transition internal memory framework method based on Random Maps described in embodiment one to three, its realization principle is similar with beneficial effect, this Place repeats no more.
Above example is merely to illustrate technical scheme, rather than its limitations;Although with reference to the foregoing embodiments The present invention is described in detail, it will be understood by those within the art that:It still can be to foregoing each implementation Technical scheme described in example is modified, or carries out equivalent substitution to which part technical characteristic;And these are changed or replaced Change, the essence of appropriate technical solution is departed from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (6)

  1. A kind of 1. phase transition internal memory abrasion equilibrium method based on Random Maps, it is characterised in that including:
    A memory address Random Maps table is generated as current memory address Random Maps table;N phase transition internal memory row is divided For a region, whole phase transition internal memory is divided into s/ (n*M) individual region, the base using the region as memory address Random Maps This unit, there is s/ (n*M) individual list item in the current memory address Random Maps table, s is the size of phase transition internal memory, and M is one The size of phase transition internal memory row, n >=1;
    The current memory address Random Maps table is used to logical memory address being changed into physical memory addresses, described current interior The index value for depositing address Random Maps table represents the line number of logical memory, the list item bag of the current memory address Random Maps table Include the line number and adjustment two list items of flag bit of physical memory;
    When internal memory write operation occurs, judge to pre-set writes number counter and whether reaches default and write frequency threshold value, if It is described write number counter be not up to it is default write frequency threshold value, then judge in the current memory address Random Maps table corresponding Whether the adjustment flag bit of list item has been set;If being set, the logical memory of current memory address Random Maps table is used The mapping relations of address and physical memory addresses carry out address conversion, and will write number counter and add 1;Otherwise, internal memory tune is carried out Journey is had suffered, and changes the physical memory addresses value of corresponding list item and adjustment flag bit in current memory address Random Maps table, and Number counter will be write and add 1;
    Number counter is write when internal memory write operation occurs, described in judgement whether reach default and write frequency threshold value, if described write Number counter reaches default and writes frequency threshold value, then is updated operation:
    Current memory address Random Maps table is copied in the Random Maps table pre-set, it is random to form last time memory address Mapping table;
    Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
    New memory address Random Maps table is generated as current memory address Random Maps table;
    The number counter of writing is reset;
    Wherein, the reverse memory address Random Maps table of the last time memory address Random Maps table is that last time memory address is random The mapping table that the index value and physical memory line number list item of mapping table are formed after exchanging;
    Wherein, the progress Memory adjustments process includes:
    According to logical memory address lookup current memory address Random Maps table and last time memory address Random Maps table, reflected The present physical memory address and last time physical memory addresses penetrated;Exchange present physical memory address and last time physical memory addresses In content, and change the physical memory addresses value of two corresponding list items in current memory address Random Maps table, they be set Adjustment flag bit;
    Last time physical memory addresses pair are inquired about in the reverse memory address Random Maps table of last time memory address Random Maps table The logical memory address answered, if logical memory address logical memory address corresponding with last time physical memory addresses after exchange Unanimously, then this adjustment process is completed;Otherwise, with logical memory address after adjustment and the inconsistent memory line of physical memory addresses For the beginning, circulate and physical memory is adjusted, and change the adjustment flag bit of current memory address Random Maps table, until thing Manage memory address in data data corresponding with logical memory address it is consistent untill.
  2. 2. according to the method for claim 1, it is characterised in that also include:
    When internal memory read operation occurs, judging the adjustment flag bit of corresponding list item in the current memory address Random Maps table is It is no to be set;If being set, in the logical memory address and physics using the corresponding list item of current memory address Random Maps table The mapping relations for depositing address carry out address conversion;Otherwise, in the logic using the corresponding list item of last time memory address Random Maps table The mapping relations for depositing address and physical memory addresses carry out address conversion.
  3. 3. according to the method for claim 1, it is characterised in that the size for writing frequency threshold value is the region of the division More than 20 times of number.
  4. 4. a kind of phase transition internal memory architecture system based on Random Maps, it is characterised in that controlled including memory address Random Maps Device and memory mapping table memory;
    The memory address Random Maps controller, for generating a memory address Random Maps table as current memory address Random Maps table;N phase transition internal memory row is divided into a region, whole phase transition internal memory is divided into s/ (n*M) individual region, by institute Elementary cell of the region as memory address Random Maps is stated, has s/ (n*M) individual in the current memory address Random Maps table List item, s are the size of phase transition internal memory, and M is the size of phase transition internal memory row, n >=1;
    The current memory address Random Maps table is used to logical memory address being changed into physical memory addresses, described current interior The index value for depositing address Random Maps table represents the line number of logical memory, the list item bag of the current memory address Random Maps table Include the line number and adjustment two list items of flag bit of physical memory;
    The memory address Random Maps controller, it is additionally operable to when internal memory write operation occurs, judge to pre-set writes number Whether counter, which reaches default, is write frequency threshold value, it is described write number counter be not up to it is default write frequency threshold value when, sentence Whether the adjustment flag bit of corresponding list item is set in the disconnected current memory address Random Maps table;In the current memory When the adjustment flag bit of corresponding list item is set in the Random Maps table of location, in the logic using current memory address Random Maps table The mapping relations for depositing address and physical memory addresses carry out address conversion, and will write number counter and add 1;In the current memory When the adjustment flag bit of corresponding list item is not set in the Random Maps table of address, Memory adjustments process is carried out, and change in current The physical memory addresses value of corresponding list item and adjustment flag bit in the Random Maps table of address are deposited, and number counter will be write and add 1;
    The memory mapping table memory, for storing current memory address Random Maps table;
    Wherein, the memory address Random Maps controller is additionally operable to, when internal memory write operation occurs, number be write described in judgement Whether counter, which reaches default, is write frequency threshold value, it is described write number counter reach it is default write frequency threshold value when, carry out Renewal operation:
    Current memory address Random Maps table is copied in the Random Maps table pre-set, it is random to form last time memory address Mapping table;
    Generate the reverse memory address Random Maps table of the last time memory address Random Maps table;
    New memory address Random Maps table is generated as current memory address Random Maps table;
    The number counter of writing is reset;
    Wherein, the reverse memory address Random Maps table of the last time memory address Random Maps table is that last time memory address is random The mapping table that the index value and physical memory line number list item of mapping table are formed after exchanging;
    The memory mapping table memory, it is additionally operable to storing the last time memory address Random Maps table and the last time internal memory The reverse memory address Random Maps table of location Random Maps table;
    The progress Memory adjustments process includes:
    Current memory address Random Maps table and last time memory address Random Maps table are inquired about according to logical address, mapped Present physical memory address and last time physical memory addresses;Exchange in present physical memory address and last time physical memory addresses Content, and the physical memory addresses value of two corresponding list items in current memory address Random Maps table is changed, their tune is set Integral denotation position;
    Last time physical memory addresses pair are inquired about in the reverse memory address Random Maps table of last time memory address Random Maps table The logical memory address answered, in logical memory address logical memory address one corresponding with last time physical memory addresses after exchange During cause, terminate this adjustment process;In logical memory address logical memory corresponding with last time physical memory addresses after exchange When address is inconsistent, with logical memory address after adjustment and physical memory addresses inconsistent internal memory behavior beginning, circulate to thing Reason internal memory is adjusted, and changes the adjustment flag bit of current memory address Random Maps table, until in physical memory addresses Untill data data corresponding with logical memory address are consistent.
  5. 5. system according to claim 4, it is characterised in that the memory address Random Maps controller is additionally operable to when hair During raw internal memory read operation, judge whether the adjustment flag bit of corresponding list item in the current memory address Random Maps table is set Put;When the adjustment flag bit of corresponding list item is set in the current memory address Random Maps table, using current memory The logical memory address of the corresponding list item of location Random Maps table and the mapping relations of physical memory addresses carry out address conversion;Described When the adjustment flag bit of corresponding list item is not set in current memory address Random Maps table, reflected at random using last time memory address The logical memory address of the corresponding list item of firing table and the mapping relations of physical memory addresses carry out address conversion.
  6. 6. the system according to claim 4 or 5, it is characterised in that the memory mapping table memory stores for SDRAM Device.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10452560B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
US9921969B2 (en) 2015-07-14 2018-03-20 Western Digital Technologies, Inc. Generation of random address mapping in non-volatile memories using local and global interleaving
US10445232B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Determining control states for address mapping in non-volatile memories
US10445251B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
US10452533B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Access network for address mapping in non-volatile memories
CN105678196B (en) * 2015-12-31 2018-12-25 上海交通大学 A kind of malice read-write program monitoring device and method towards nonvolatile memory
WO2019222381A1 (en) * 2018-05-18 2019-11-21 Micron Technology, Inc. Host accelerated operations in managed nand devices
CN111475429B (en) * 2019-01-24 2023-08-29 爱思开海力士有限公司 memory access method
CN116755638B (en) * 2023-08-17 2023-10-13 北京大学 Wear balancing method for memristor durability with low resource consumption

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542624A (en) * 2003-04-29 2004-11-03 大唐移动通信设备有限公司 Method for quickening logic block mapping speed in Flash file system
CN102841852A (en) * 2011-06-24 2012-12-26 华为技术有限公司 Wear leveling method, storing device and information system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102067029B1 (en) * 2012-12-13 2020-01-16 삼성전자주식회사 Semiconductor memory devices and memory systems

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542624A (en) * 2003-04-29 2004-11-03 大唐移动通信设备有限公司 Method for quickening logic block mapping speed in Flash file system
CN102841852A (en) * 2011-06-24 2012-12-26 华为技术有限公司 Wear leveling method, storing device and information system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
一种基于代数映射的相变内存矩阵磨损均衡方法;杜雨阳等;《计算机研究与发展》;20121215;第49卷(第12期);第2713-2720页 *

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