CN104731713A - Phase change memory abrasion balancing method and system based on random mapping - Google Patents

Phase change memory abrasion balancing method and system based on random mapping Download PDF

Info

Publication number
CN104731713A
CN104731713A CN201510121627.7A CN201510121627A CN104731713A CN 104731713 A CN104731713 A CN 104731713A CN 201510121627 A CN201510121627 A CN 201510121627A CN 104731713 A CN104731713 A CN 104731713A
Authority
CN
China
Prior art keywords
memory
address
random maps
memory address
maps table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201510121627.7A
Other languages
Chinese (zh)
Other versions
CN104731713B (en
Inventor
胡事民
刘巍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tsinghua University
Original Assignee
Tsinghua University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tsinghua University filed Critical Tsinghua University
Priority to CN201510121627.7A priority Critical patent/CN104731713B/en
Publication of CN104731713A publication Critical patent/CN104731713A/en
Application granted granted Critical
Publication of CN104731713B publication Critical patent/CN104731713B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages

Abstract

The invention provides a phase change memory abrasion balancing method based on random mapping. The method includes the steps that a memory address random mapping table is generated to serve as a current memory address random mapping table; s/M table items are included in the current memory address random mapping table; s represents the size of a phase change memory, and M represents the size of a phase change memory row; when memory writing operation occurs, if a writing time counter does not reach a preset writing time threshold value, whether adjustment zone bits of corresponding table items in the current memory address random mapping table have been set is judged; if the adjustment zone bits of corresponding table items in the current memory address random mapping table have been set, a mapping relation between a logical memory address and a physical memory address of the current memory address random mapping table is utilized for address conversion; otherwise, a memory adjustment process is conducted, and physical address values and the adjustment zone bits of corresponding table items in the current memory address random mapping table are corrected. According to the method, the phase change memory abrasion balancing effect can be improved, the service life of a phase change memory is prolonged, and influences on performance are reduced to minimum.

Description

Based on phase transition internal memory abrasion equilibrium method and the system of Random Maps
Technical field
The present invention relates to field of computer technology, be specifically related to a kind of phase transition internal memory abrasion equilibrium method based on Random Maps and system.
Background technology
Write the limited shortcoming of number of times because phase transition internal memory exists, therefore, promote life-span of phase transition internal memory just become it can the gordian technique of practical application.Abrasion equilibrium technology is one of main method promoting the phase transition internal memory life-span.
Existing abrasion equilibrium technology subject matter is, or follow the tracks of each internal storage location write number of times, cause a large amount of storage spaces and performance cost, or there is information leakage in Memory adjustments mode, the attack of malice wearing and tearing program cannot be resisted.
Summary of the invention
For defect of the prior art, the invention provides a kind of phase transition internal memory abrasion equilibrium method based on Random Maps and system, phase transition internal memory abrasion equilibrium effect can be improved, reach the object promoting the phase transition internal memory life-span, drop to minimum on the impact of performance simultaneously.
The invention provides following technical scheme:
First aspect, the invention provides a kind of phase transition internal memory abrasion equilibrium method based on Random Maps, comprising:
Generate a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable;
Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
When there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, if described in write number counter and do not reach default and write frequency threshold value, then judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; Otherwise, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1.
Further, the described phase transition internal memory abrasion equilibrium method based on Random Maps also comprises:
When there is internal memory write operation, writing number counter described in judgement and whether reaching default and write frequency threshold value, if described in write number counter and reach default and write frequency threshold value, then carry out renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed.
Further, carry out Memory adjustments process described in comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, if this logical address and after exchanging logical address corresponding to physical address last time consistent, then complete this adjustment process; Otherwise, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revises the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
Further, the described phase transition internal memory abrasion equilibrium method based on Random Maps also comprises:
When there is internal memory read operation, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; Otherwise, use the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses to carry out address conversion.
Further, the described phase transition internal memory abrasion equilibrium method based on Random Maps also comprises:
A region is divided into by capable for n phase transition internal memory, whole phase transition internal memory is divided into s/ (n*M) individual region, if using the elementary cell of described region as memory address Random Maps, then there is s/ (n*M) individual list item in described current memory Random Maps table.
Wherein, the size writing frequency threshold value described in is more than 20 times of the areal of described division.
Second aspect, the invention provides a kind of phase transition internal memory architecture system based on Random Maps, comprises memory address Random Maps controller and memory mapping table storer;
Described memory address Random Maps controller, for generating a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable; Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
Described memory address Random Maps controller, also for when there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, described write number counter do not reach default write frequency threshold value time, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; When in described current memory address Random Maps table, the adjustment zone bit of corresponding list item is not set up, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1;
Described memory mapping table storer, for storing current memory address Random Maps table.
Further, described memory address Random Maps controller is also for when when generation internal memory write operation, write number counter described in judgement whether to reach default and write frequency threshold value, described write number counter reach default write frequency threshold value time, carry out renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed;
Described memory mapping table storer, also for store described last time memory address Random Maps table and described last time memory address Random Maps table reverse memory address Random Maps table.
Further, described memory address Random Maps controller also for when there is internal memory read operation, judges whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; When the adjustment zone bit of corresponding list item is not set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses are used to carry out address conversion.
Wherein, carry out Memory adjustments process described in comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, this logical address with exchange after logical address corresponding to physical address last time consistent time, terminate this adjustment process; When the logical address corresponding with exchange physical address rear last time in this logical address is inconsistent, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revise the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
Wherein, described memory mapping table storer is SDRAM storer.
As shown from the above technical solution, phase transition internal memory abrasion equilibrium method based on Random Maps of the present invention and system, at least there is following beneficial effect: by write operation frequently memory block be evenly distributed to whole phase transition internal memory space, reach the object of abrasion equilibrium, thus improve the life-span of phase transition internal memory, meanwhile, adopt whole memory headroom address Random Maps mechanism, eliminate the information leakage of abrasion equilibrium technology, thus the attack of malice wearing and tearing program can be resisted.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the process flow diagram of the phase transition internal memory abrasion equilibrium method based on Random Maps that the embodiment of the present invention one provides;
Fig. 2 is the structural representation of the phase transition internal memory abrasion equilibrium system based on Random Maps that the embodiment of the present invention four provides;
Fig. 3 is the concrete structure schematic diagram of the phase transition internal memory abrasion equilibrium system based on Random Maps that the embodiment of the present invention four provides.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, clear, complete description is carried out to the technical scheme in the embodiment of the present invention, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Fig. 1 shows the phase transition internal memory abrasion equilibrium method process flow diagram based on Random Maps that embodiment one provides, and as shown in Figure 1, the phase transition internal memory abrasion equilibrium method based on Random Maps of the present embodiment one, based on memory address Random Maps mechanism, specifically comprises:
Step 101: generate a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable;
Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
Step 102: when there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, if described in write number counter and do not reach default and write frequency threshold value, then perform step 102a; Otherwise, perform 102b.
Step 102a: judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; Otherwise, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1.
Step 102b: carry out following renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed.
Wherein, carry out Memory adjustments process described in comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, if this logical address and after exchanging logical address corresponding to physical address last time consistent, then complete this adjustment process; Otherwise, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revises the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
Here should be noted, when mapping first, only have current Random Maps table, the data stored in internal memory do not need to adjust.Above-mentioned Memory adjustments process is non-Memory adjustments process generally first.
Wherein, the memory address Random Maps table list item mentioned comprises the mapping of logical address to physical address, and adjustment zone bit.
Further, when there is internal memory read operation, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; Otherwise, use the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses to carry out address conversion.
Preferably, the described phase transition internal memory abrasion equilibrium method based on Random Maps also comprises:
A region is divided into by capable for n phase transition internal memory, whole phase transition internal memory is divided into s/ (n*M) individual region, if using the elementary cell of described region as memory address Random Maps, then there is s/ (n*M) individual list item in described current memory Random Maps table.
Processing mode phase transition internal memory being divided into region, for larger phase transition internal memory, is a preferred processing scheme.
Wherein, the size writing frequency threshold value described in is more than 20 times of the areal of described division.
Such as, writing frequency threshold value is 20, then the internal memory write operation expense increased accounts for the n/ (n+20*n) of all write operations, is less than 4%.
The phase transition internal memory abrasion equilibrium method based on Random Maps that the present embodiment provides, at least has following beneficial effect:
By write operation frequently memory block be evenly distributed to whole phase transition internal memory space, reach the object of abrasion equilibrium, thus improve the life-span of phase transition internal memory, simultaneously, adopt whole memory headroom address Random Maps mechanism, eliminate the information leakage of abrasion equilibrium technology, thus the attack of malice wearing and tearing program can be resisted.
The present embodiment two explains the described phase transition internal memory abrasion equilibrium method based on Random Maps with a specific embodiment, specific as follows:
S1: using capable for one or more phase transition internal memory as a fundamental region, using the elementary cell of region as memory address Random Maps, internal memory be set and write number counter.
S2: initialization memory address Random Maps table collection, is more than or equal to internal memory writes frequency threshold value if internal memory writes number counter, then upgrade memory address Random Maps table collection.
S3: for the access process of internal memory read operation.
S4: for the access process of internal memory write operation.
Wherein, described step S1 comprises further: S11: one phase transition internal memory capable (row) size is 4096 bytes, a fundamental region comprises n (n >=1) individual row, the size of phase transition internal memory is s byte, then whole phase transition internal memory is divided into s/ (n*4096) individual region, and memory address Random Maps table has s/ (n*4096) individual list item; S12: arrange internal memory and write number counter, type is integer, and when carrying out write operation to internal memory is capable, the value of internal memory write operation number counter just increases progressively 1 at every turn.
Wherein, described step S2 comprises further: S21: memory location current address mapping table being copied to address mapping table last time; S22: the reverse address mapping table generating memory address Random Maps table last time; S23: according to modern shuffling algorithm, generates new address mapping table, and copies the memory location of current address mapping table to; S24: after upgrading memory address Random Maps table collection, the counter O reset of internal memory write operation.During initialization, omit S21 and S22.
Wherein, described step S3 comprises further: S31: if the adjustment zone bit of corresponding list item is set up in current memory address Random Maps table, then use the logical memory address of the corresponding list item of current address mapping table and the mapping relations of physical memory addresses to carry out address conversion; S32: if the adjustment zone bit of corresponding list item is not set up in current memory address Random Maps table, then use the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses to carry out address conversion.
Wherein, described step S4 comprises further: S41: reach write frequency threshold value if write number counter value, then perform and upgrade memory address Random Maps table collection process S2; S42: if the adjustment zone bit of corresponding list item is set up in the mapping table of current address, then use the logical memory address of the corresponding list item of current address mapping table and the mapping relations of physical memory addresses to carry out address conversion; S43: if the adjustment zone bit of corresponding list item is not set up in the mapping table of current address, then carry out Memory adjustments process, and physical address values and the adjustment zone bit of revising corresponding list item in the mapping table of current address; S44: number counter value will be write and increase progressively 1.
Particularly, described step S43 comprises further: S431: inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address.Exchange the memory content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set; S432: inquire about logical address corresponding to physical address last time in the reverse address mapping table of memory address Random Maps table last time.If this logical address and after exchanging logical address corresponding to physical address last time consistent, then complete this adjustment process; Otherwise, S433: to adjust rear logical address and the inconsistent memory line of physical address as the beginning, circulation adjusts physical memory, and revises line number and the adjustment zone bit of the corresponding list item of current memory address Random Maps table, until logical address is consistent with the mapping of physical address.
Wherein, described memory address Random Maps table collection comprise current memory address Random Maps table, last time memory address Random Maps table and last time address Random Maps table back mapping table.
Wherein, current memory address Random Maps table, for changing logical memory address into physical memory addresses, the line number of index value presentation logic internal memory, mapping value element comprises line number and adjustment zone bit two list items of physical memory, and current memory address Random Maps table is used for the address maps in this Random Maps cycle; Last time, memory address Random Maps table, for the address mapping table of the upper one-period use in this memory address Random Maps cycle, did not comprise adjustment zone bit list item; Last time memory address Random Maps table reverse address mapping table be last time mapping table index value and line number element value exchange after the mapping table that formed, namely the index of back mapping table is the physical memory line number element value of mapping table last time, and the element value of back mapping table is the index value of mapping table last time.
Wherein, the areal that the size writing frequency threshold value mentioned in the present embodiment is divided by phase transition internal memory determined, general value is 20 times of areal or more.Such as, writing frequency threshold value is 20, then the internal memory write operation expense increased accounts for the n/ (n+20*n) of all write operations, is less than 4%.
The phase transition internal memory abrasion equilibrium method based on Random Maps that the present embodiment provides, at least has following beneficial effect:
By write operation frequently memory block be evenly distributed to whole phase transition internal memory space, reach the object of abrasion equilibrium, thus improve the life-span of phase transition internal memory, simultaneously, adopt whole memory headroom address Random Maps mechanism, eliminate the information leakage of abrasion equilibrium technology, thus the attack of malice wearing and tearing program can be resisted.
The present embodiment three explains the described phase transition internal memory abrasion equilibrium method based on Random Maps further with another specific embodiment, specific as follows:
S11: using capable for one or more phase transition internal memory as a fundamental region, using the elementary cell of region as memory address Random Maps, internal memory be set and write number counter.
Concrete, first, defining phase transition internal memory capable (row) size is 4096 bytes, a fundamental region comprises n (n >=1) individual row, the size of phase transition internal memory is s byte, then whole phase transition internal memory is divided into s/ (n*4096) individual region, and memory address Random Maps table has s/ (n*4096) individual list item.Then, arrange internal memory write operation number counter, type is integer.When carrying out write operation to internal memory is capable, the value of internal memory write operation number counter just increases progressively 1 at every turn.
S12: initialization/renewal memory mapping table.
Concrete, first, current address mapping table is copied to the memory location of address mapping table last time.Then, the reverse address mapping table of memory address Random Maps table last time is generated.During initialization, omit the first two step.Finally, according to modern shuffling algorithm, generate new address mapping table, and copy the memory location of current address mapping table to.In addition, after upgrading memory address Random Maps table collection, the counter O reset of internal memory write operation.
S13: the memory address mappings process of read operation.
Concrete, first, if the adjustment zone bit of corresponding list item is set up in the mapping table of current address, then use the logical memory address of the corresponding list item of current address mapping table and the mapping relations of physical memory addresses to carry out address conversion.Then, if the adjustment zone bit of corresponding list item is not set up in the mapping table of current address, then use the logical memory address of the corresponding list item of address mapping table last time and the mapping relations of physical memory addresses to carry out address conversion.
S14: the memory address mappings process of write operation.
Concrete, first, reach write frequency threshold value if write number counter value, then perform and upgrade memory address Random Maps table collection process S12.Then, if the adjustment zone bit in the mapping table of current address is set up, then use the logical memory address of current address mapping table and the mapping relations of physical memory addresses to carry out address conversion.Then, if the adjustment zone bit in the mapping table of current address is not set up, then carry out Memory adjustments process, and revise corresponding physical address values and adjustment zone bit in the mapping table of current address.Finally, number counter value will be write and increase progressively 1.
More specifically, in S14, if the adjustment zone bit in the mapping table of current address is not set up, then, first, inquiry current address mapping table and last time address mapping table, obtain map current physical address and last time physical address.Exchange the memory content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in the mapping table of current address, their adjustment zone bit is set.Then, in the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time.If this logical address and after exchanging logical address corresponding to physical address last time consistent, then complete this adjustment process.Otherwise, to adjust rear logical address and the inconsistent memory line of physical address as the beginning, circulation adjusts physical memory, and revises line number and the adjustment zone bit of the corresponding list item of current address mapping table, until logical address is consistent with the mapping of physical address.
Wherein, described memory address Random Maps table collection comprise current memory address Random Maps table, last time memory address Random Maps table and last time address Random Maps table back mapping table.
More specifically, current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of index value presentation logic internal memory, list item comprises line number and adjustment zone bit two list items of physical memory, and current memory address Random Maps table is used for the address maps in this Random Maps cycle; Last time, memory address Random Maps table, for the address mapping table of the upper one-period use in this memory address Random Maps cycle, did not comprise adjustment zone bit list item; Last time memory address Random Maps table reverse address mapping table be last time mapping table index value and physical memory line number list item exchange after the mapping table that formed, namely the index of back mapping table is the physical memory line number of mapping table last time, and the element value of direction mapping table is the index value of mapping table last time.
According to a kind of phase transition internal memory abrasion equilibrium method based on Random Maps of the embodiment of the present invention, by by write operation frequently memory block be evenly distributed to whole phase transition internal memory space, reach the object of abrasion equilibrium, thus improve the life-span of phase transition internal memory, simultaneously, adopt whole memory headroom address Random Maps mechanism, eliminate the information leakage of abrasion equilibrium technology, thus the attack of malice wearing and tearing program can be resisted.
Fig. 2 and Fig. 3 shows the structural representation of the phase transition internal memory abrasion equilibrium system based on Random Maps that embodiment four provides, see Fig. 2 and Fig. 3, the present embodiment four provides a kind of phase transition internal memory architecture system based on Random Maps, comprising: memory address Random Maps controller 10 and memory mapping table storer 20;
Described memory address Random Maps controller 10, for generating a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable; Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
Described memory address Random Maps controller 10, also for when there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, described write number counter do not reach default write frequency threshold value time, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; When in described current memory address Random Maps table, the adjustment zone bit of corresponding list item is not set up, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1;
Described memory mapping table storer 20, for storing current memory address Random Maps table.
Further, described memory address Random Maps controller 10 is also for when when generation internal memory write operation, write number counter described in judgement whether to reach default and write frequency threshold value, described write number counter reach default write frequency threshold value time, carry out renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed;
Described memory mapping table storer 20, also for store described last time memory address Random Maps table and described last time memory address Random Maps table reverse memory address Random Maps table.
Further, described memory address Random Maps controller 10 also for when there is internal memory read operation, judges whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; When the adjustment zone bit of corresponding list item is not set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses are used to carry out address conversion.
Wherein, carry out Memory adjustments process described in comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, this logical address with exchange after logical address corresponding to physical address last time consistent time, terminate this adjustment process; When the logical address corresponding with exchange physical address rear last time in this logical address is inconsistent, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revise the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
Preferably, described memory mapping table storer 20 is SDRAM storer.
Concrete, described memory address mappings controller 10 judge internal memory write number of times reach a certain threshold value time, upgrade each mapping table stored in memory mapping table storer.
Concrete, described memory address mappings controller 10 judge an internal memory physical address be last time address maps result time, the adjustment of physical memory must be carried out according to the mapping relations of current address mapping table, comprise the adjustment of content and the adjustment of correlation table and list item.
Concrete, memory address Random Maps controller 10, for audit memory mapping table, records internal memory write operation number of times, and upgrades memory mapping table.Memory mapping table storer 20 for store current memory address Random Maps table, last time memory address Random Maps table and last time memory address Random Maps table reverse address mapping table.More specifically, after memory address mappings controller 10 receives internal memory logical address, the corresponding mapping table in audit memory map store 20, obtains internal memory physical address.Memory address mappings controller 10 judges that internal memory writes number of times when reaching a certain threshold value, upgrades each mapping table stored in memory mapping table storer 20.Memory address mappings controller 10 judge an internal memory physical address be last time address maps result time, the adjustment of physical memory must be carried out according to the mapping relations of current address mapping table, comprise the adjustment of content and the adjustment of correlation table and list item.
According to the phase transition internal memory architecture system based on Random Maps that the present embodiment provides, can be used for the phase transition internal memory framework method based on Random Maps performing or realize described in above-described embodiment one to three, it realizes principle and beneficial effect is similar, repeats no more herein.
Above embodiment only for illustration of technical scheme of the present invention, is not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (11)

1., based on the phase transition internal memory abrasion equilibrium method of Random Maps, it is characterized in that, comprising:
Generate a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable;
Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
When there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, if described in write number counter and do not reach default and write frequency threshold value, then judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; Otherwise, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1.
2. method according to claim 1, is characterized in that, also comprises:
When there is internal memory write operation, writing number counter described in judgement and whether reaching default and write frequency threshold value, if described in write number counter and reach default and write frequency threshold value, then carry out renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed.
3. method according to claim 2, is characterized in that, described in carry out Memory adjustments process and comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, if this logical address and after exchanging logical address corresponding to physical address last time consistent, then complete this adjustment process; Otherwise, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revises the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
4. method according to claim 1, is characterized in that, also comprises:
When there is internal memory read operation, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; If be set up, then the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; Otherwise, use the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses to carry out address conversion.
5., according to the arbitrary described method of Claims 1 to 4, it is characterized in that, also comprise:
A region is divided into by capable for n phase transition internal memory, whole phase transition internal memory is divided into s/ (n*M) individual region, if using the elementary cell of described region as memory address Random Maps, then there is s/ (n*M) individual list item in described current memory Random Maps table.
6. method according to claim 5, is characterized in that, described in write frequency threshold value size be more than 20 times of the areal of described division.
7. based on a phase transition internal memory architecture system for Random Maps, it is characterized in that, comprise memory address Random Maps controller and memory mapping table storer;
Described memory address Random Maps controller, for generating a memory address Random Maps table as current memory address Random Maps table; S/M list item is had in described current memory Random Maps table; S is the size of phase transition internal memory, and M is the size that a phase transition internal memory is capable; Described current memory address Random Maps table is used for changing logical memory address into physical memory addresses, the line number of the index value presentation logic internal memory of described current memory address Random Maps table, the list item of described current memory address Random Maps table comprises line number and adjustment zone bit two list items of physical memory;
Described memory address Random Maps controller, also for when there is internal memory write operation, what judge to pre-set writes number counter and whether reaches default and write frequency threshold value, described write number counter do not reach default write frequency threshold value time, judge whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, use the logical memory address of current memory address Random Maps table and the mapping relations of physical memory addresses to carry out address conversion, and number counter will be write add 1; When in described current memory address Random Maps table, the adjustment zone bit of corresponding list item is not set up, carry out Memory adjustments process, and revise physical address values and the adjustment marker bit of corresponding list item in current memory address Random Maps table, and number counter will be write add 1;
Described memory mapping table storer, for storing current memory address Random Maps table.
8. system according to claim 7, it is characterized in that, described memory address Random Maps controller is also for when when generation internal memory write operation, write number counter described in judgement whether to reach default and write frequency threshold value, described write number counter reach default write frequency threshold value time, carry out renewal rewards theory:
Current memory address Random Maps table is copied in the Random Maps table pre-set, form memory address Random Maps table last time;
Generate the reverse memory address Random Maps table of memory address Random Maps table described last time;
Generate new memory address Random Maps table as current memory address Random Maps table;
Described number counter of writing is reset;
Wherein, described last time memory address Random Maps table reverse address mapping table be last time memory address Random Maps table index value and physical memory line number list item exchange after the mapping table that formed;
Described memory mapping table storer, also for store described last time memory address Random Maps table and described last time memory address Random Maps table reverse memory address Random Maps table.
9. system according to claim 7, is characterized in that, described memory address Random Maps controller also for when there is internal memory read operation, judges whether the adjustment zone bit of corresponding list item in described current memory address Random Maps table is set up; When the adjustment zone bit of corresponding list item is set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of current memory address Random Maps table and the mapping relations of physical memory addresses are used to carry out address conversion; When the adjustment zone bit of corresponding list item is not set up in described current memory address Random Maps table, the logical memory address of the corresponding list item of memory address Random Maps table last time and the mapping relations of physical memory addresses are used to carry out address conversion.
10. system according to claim 7, is characterized in that, described in carry out Memory adjustments process and comprise:
According to logical address inquiry current memory address Random Maps table and last time memory address Random Maps table, obtain map current physical address and last time physical address; Exchange the content in current physical address and last time physical address, and revise the physical address values of two corresponding list items in current memory address Random Maps table, their adjustment zone bit is set;
In the reverse address mapping table of memory address Random Maps table last time, inquire about logical address corresponding to physical address last time, this logical address with exchange after logical address corresponding to physical address last time consistent time, terminate this adjustment process; When the logical address corresponding with exchange physical address rear last time in this logical address is inconsistent, to adjust rear logical address and physical address inconsistent internal memory behavior beginning, circulation adjusts physical memory, and revise the adjustment zone bit of current memory address mapping table immediately, until the data consistent that data in physical address are corresponding with logical address.
11. according to the arbitrary described system of claim 7 ~ 10, and it is characterized in that, described memory mapping table storer is SDRAM storer.
CN201510121627.7A 2015-03-18 2015-03-18 Phase transition internal memory abrasion equilibrium method and system based on Random Maps Active CN104731713B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510121627.7A CN104731713B (en) 2015-03-18 2015-03-18 Phase transition internal memory abrasion equilibrium method and system based on Random Maps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510121627.7A CN104731713B (en) 2015-03-18 2015-03-18 Phase transition internal memory abrasion equilibrium method and system based on Random Maps

Publications (2)

Publication Number Publication Date
CN104731713A true CN104731713A (en) 2015-06-24
CN104731713B CN104731713B (en) 2018-02-09

Family

ID=53455621

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510121627.7A Active CN104731713B (en) 2015-03-18 2015-03-18 Phase transition internal memory abrasion equilibrium method and system based on Random Maps

Country Status (1)

Country Link
CN (1) CN104731713B (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105678196A (en) * 2015-12-31 2016-06-15 上海交通大学 Malicious read-write program monitoring device and method facing nonvolatile memory
US9921969B2 (en) 2015-07-14 2018-03-20 Western Digital Technologies, Inc. Generation of random address mapping in non-volatile memories using local and global interleaving
US10445251B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
US10445232B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Determining control states for address mapping in non-volatile memories
US10452533B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Access network for address mapping in non-volatile memories
US10452560B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
CN111475429A (en) * 2019-01-24 2020-07-31 爱思开海力士有限公司 Memory access method
CN116755638A (en) * 2023-08-17 2023-09-15 北京大学 Wear balancing method for memristor durability with low resource consumption

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542624A (en) * 2003-04-29 2004-11-03 大唐移动通信设备有限公司 Method for quickening logic block mapping speed in Flash file system
CN102841852A (en) * 2011-06-24 2012-12-26 华为技术有限公司 Wear leveling method, storing device and information system
US20140173234A1 (en) * 2012-12-13 2014-06-19 Samsung Electronics Co., Ltd. Semiconductor memory device and memory system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542624A (en) * 2003-04-29 2004-11-03 大唐移动通信设备有限公司 Method for quickening logic block mapping speed in Flash file system
CN102841852A (en) * 2011-06-24 2012-12-26 华为技术有限公司 Wear leveling method, storing device and information system
US20140173234A1 (en) * 2012-12-13 2014-06-19 Samsung Electronics Co., Ltd. Semiconductor memory device and memory system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
杜雨阳等: "一种基于代数映射的相变内存矩阵磨损均衡方法", 《计算机研究与发展》 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9921969B2 (en) 2015-07-14 2018-03-20 Western Digital Technologies, Inc. Generation of random address mapping in non-volatile memories using local and global interleaving
US10445251B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
US10445232B2 (en) 2015-07-14 2019-10-15 Western Digital Technologies, Inc. Determining control states for address mapping in non-volatile memories
US10452533B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Access network for address mapping in non-volatile memories
US10452560B2 (en) 2015-07-14 2019-10-22 Western Digital Technologies, Inc. Wear leveling in non-volatile memories
CN105678196A (en) * 2015-12-31 2016-06-15 上海交通大学 Malicious read-write program monitoring device and method facing nonvolatile memory
CN105678196B (en) * 2015-12-31 2018-12-25 上海交通大学 A kind of malice read-write program monitoring device and method towards nonvolatile memory
CN111475429A (en) * 2019-01-24 2020-07-31 爱思开海力士有限公司 Memory access method
CN111475429B (en) * 2019-01-24 2023-08-29 爱思开海力士有限公司 memory access method
CN116755638A (en) * 2023-08-17 2023-09-15 北京大学 Wear balancing method for memristor durability with low resource consumption
CN116755638B (en) * 2023-08-17 2023-10-13 北京大学 Wear balancing method for memristor durability with low resource consumption

Also Published As

Publication number Publication date
CN104731713B (en) 2018-02-09

Similar Documents

Publication Publication Date Title
CN104731713A (en) Phase change memory abrasion balancing method and system based on random mapping
CN102667736B (en) Memory management device and memory management method
CN104750625B (en) Data memory device and method for controlling flash memory
CN102622306B (en) Bad block management method for storage device
CN103092766B (en) A kind of loss equalizing implementation method for NAND FLASH
CN100524249C (en) Storage apparatus using non-volatile memory as cache and method of managing the same
CN104714894A (en) Layered phase-change memory abrasion equilibrating method and system based on random mapping
US9189420B2 (en) Wear-leveling method, storage device, and information system
TWI398770B (en) Data accessing method for flash memory and storage system and controller using the same
CN109783017B (en) Storage device bad block processing method and device and storage device
CN104423894B (en) Data memory device and method for controlling flash memory
US10528268B2 (en) System and method for channel time management in solid state memory drives
CN102135942B (en) Method for realizing wear-leveling in storage equipment as well as the storage equipment
CN105242871A (en) Data writing method and apparatus
CN101719099B (en) Method and device for reducing write amplification of solid state disk
KR20090105143A (en) Memory system and wear leveling method thereof
CN104346290A (en) Storage device, computer system and methods of operating same
TWI434175B (en) Method for performing block management, and associated memory device and controller thereof
CN103019888A (en) Backup method and device
JP6008325B2 (en) Data storage system and control method thereof
CN106990926A (en) A kind of processing method of solid state hard disc abrasion equilibrium
CN104794063A (en) Method for controlling solid state drive with resistive random-access memory
CN110389712B (en) Data writing method and device, solid state disk and computer readable storage medium
KR100624973B1 (en) An Efficient Wear-leveling Scheme for Flash MemoryK-leveling
CN103714010A (en) Storage device write-in method and storage device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant