CN104714621A - DVS scheduling algorithm based on partitioning operation system - Google Patents

Abstract

The invention provides a DVS scheduling algorithm based on a partitioning operation system. According to the method, free time of a processor is dynamically estimated, and power consumption is effectively reduced at a small cost on the condition of ensuring high response speed of the processor; a data item of free task operation time t1 recorded according to partitioning before voltage reduction is additionally arranged in a task control block of a free task; whether the free task operation time t1 before voltage reduction meets a voltage switching condition is judged; when the free task operation time t1 meets the voltage switching condition, frequency reduction operation is executed until partitioning is finished; when partitioning is finished, frequency raising operation is executed. The problem of overheating, caused by high-speed computation, of the onboard embedded processor is solved, the service life of the processor is prolonged, and the fault rate of the processor is reduced.

Description

Based on the DVS dispatching algorithm of partition operating system

Technical field

The invention belongs to embedded OS field, relate to a kind of dynamic electric voltage grade for partition operating system and regulate DVS method for scheduling task.

Background technology

Along with the development of avlomcs system integration, the requirement of computer system arithmetic capability is also more and more higher.For this reason, airborne computer system adopts high performance hardware system thus reaches the target improving processing speed.Meanwhile, the reliability of computing system is increasingly important, and airborne computer is with the target of the hardware and software redundancy of each level for cost realization raising reliability.Unfortunately, no matter be that high performance hardware system or redundancy backup have all increased substantially system energy consumption.The system power dissipation of great number adds the burden of electric power system, and the heat of generation becomes severe by hardware running environment, thus reduces the overall life of system.DVS task scheduling is the important content of operating system power managed, the power management of processor when Study system runs.It, by reducing DVS processor clock frequency when processor execution load is lower, reaches the object reducing system power dissipation.DVS task scheduling not only needs the different qualities according to task, designs corresponding dispatching algorithm, as real-time and un-real time job, and cycle and aperiodic task etc.DVS task scheduling also needs to meet the difference restriction of original dispatching algorithm, as seized and can not seize, dynamically and fixed priority etc.The DVS dispatching method of un-real time job is relatively simple, and task does not have clear and definite restriction closing time, and the target that un-real time job DVS dispatches ensures lowest power consumption is pursued on the basis that task can complete according to the dispatching algorithm of current employing.Current un-real time job DVS model can be classified as three classes substantially: 1) state algorithm; 2) based on the algorithm of averaging time; 3) based on the algorithm of power consumption material time.The DVS of real-time task dispatches the execution time predictability that the most important condition is guarantee system.Common real-time task scheduling method has two kinds: RMS(based on the Rate-Monotonic Scheduling Algorithm of priority) and EDF(off period priority algorithm the earliest).But traditional two kinds of methods are all too complicated, computing cost is large, is not suitable for the airborne embedded system very high to requirement of real-time.

Summary of the invention

The object of the invention is: the invention provides a kind of DVS dispatching algorithm based on partition operating system, dynamic estimation processor free time, under the condition ensureing processor high response speed, effectively reduce power consumption with very little cost.

Technical solution of the present invention is:

1, based on the DVS dispatching algorithm of partition operating system, it is characterized in that: comprise the following steps:

1] in the task control block (TCB) of idle task, the data item that one is pressed idle task t1 working time before partitioned record step-down is increased;

2] before judging step-down, whether idle task t1 working time meets voltage-switching conditions: when idle task working time before step-down $t1>\frac{\frac{\mathrm{Echange}}{k*({\mathrm{Vl}\arg e}^2-{\mathrm{Vsmall}}^2)}+2*\mathrm{tchange}}{1-\frac{\mathrm{Vsmall}}{\mathrm{Vl}\arg e}}$ Time, meet voltage-switching conditions, perform frequency reducing operation, until point end of extent;

Wherein Echange is the voltage switching energy consumption of chip, and Vlarge is voltage before step-down, and Vsmall is voltage after step-down, and tchange is the voltage switching time of chip, and k is the scale factor of energy consumption and voltage relationship;

3] at the end of subregion, raising frequency operation is performed.

In above-mentioned steps 2, before step-down, idle task t1 working time meets voltage-switching conditions continuous 5 times, performs frequency reducing operation.

Above-mentioned steps 1] also comprise following link: for various chip, by various chip value calculates, and is made into MAP table; Step 2] also comprise, query steps 1] MAP that makes table, before judging step-down, whether idle task t1 working time meets voltage-switching conditions.

Advantage of the present invention is: in the algorithm complex of the method and subregion, the quantity, execution time etc. of task is irrelevant; In subregion, the increase of task amount can not cause the increase of algorithm complex, and thus this dispatching method effectively can ensure the real-time of system.Because algorithm complex is low, the cost this algorithm being embedded into partition operating system is also very low, and based on this algorithm, function partition operating system realizing reduce power consumption is feasible.Under the development trend of airborne computer synthesization, multiple processor reduces to consume energy simultaneously and effectively extends lifetime of system, has great practical value.Solve the problems of excessive heat that airborne flush bonding processor brings due to high-speed computation, extend the processor life-span, reduce processor fault rate.

Embodiment

Basis based on the DVS dispatching algorithm of partition operating system is partition operating system, and space isolation task time between subregion, the task in subregion is based on priority scheduling.Subregion free time is to processor speed not requirement.

In subregion, adopt the method for " collection ", the free time dynamically recording of each subregion is got off, adopts certain algorithm to assess it, when the conditions are met, carry out voltage and lower switching.Before subregion execution terminates, recovery voltage value, ensures that the operation of next subregion is unaffected.

Condition is the voltage switching time be less than slack time, and the energy ezpenditure that voltage switching brings is less than the power consumption that other slack times reduce voltage " earning ".

The voltage switching time of chip is tchange, obtains by searching chip handbook;

Before step-down, voltage is that the value of Vlarge, Vlarge sets in advance with reference to chip handbook;

After step-down, voltage is Vsmall; The value of Vsmall sets in advance with reference to chip handbook;

Slack time is trelax;

The voltage switching energy consumption of chip is Echange, obtains by searching chip handbook;

The scale factor of energy consumption and voltage relationship is: power consumption/Vlarge that k, k=Vlarge are corresponding ², the power consumption that Vlarge is corresponding can be inquired about chip handbook and be obtained;

Saving energy consumption Es is:

Es=(Vlarge ²-Vsmall ²)(trelax–2*tchange)*k-Echange；(1)

When Es is greater than 0, represent that the method by reducing supply voltage minimizing energy consumption is feasible.

Formula (1) is by becoming after conversion:

trelax=(Es+Echange)/(k*(Vlarge ²-Vsmall ²))+2*tchange；(2)

Value in formula (2) on the right of equation is all determined except Es, and therefore, the condition that voltage changes becomes

trelax>(Echange)/(k*(Vlarge ²-Vsmall ²))+2*tchange；(3)

The free time of partition operating system " collection " and the pass of slack time are:

trelax=t2–t1；(4)

T1 is the idle task working time before step-down, and t2 is the idle task working time after step-down, there is proportionate relationship between t1 and t2, t2=t1 (Vsmall/Vlarge) (5);

Formula (4), (5) are brought into (3):

$t1>\frac{\frac{\mathrm{Echange}}{k*({\mathrm{Vl}\arg e}^2-{\mathrm{Vsmall}}^2)}+2*\mathrm{tchange}}{1-\frac{\mathrm{Vsmall}}{\mathrm{Vl}\arg e}}---\left(6\right)$

Time the critical value of subregion voltage switching, if this value can calculate at the beginning of system, as long as whether idle task t1 working time and switch threshold value can obtain voltage and can reduce compare step-down in system operation before.Calculate simple, the switching time of task can not be increased, also can not the real-time of influential system.

Below based on certain partition operating system of ARINC653, the present invention is described in further detail.

The ARINC653 application programming interfaces standard that to be American Electronic engineering association define for the modularization comprehensive avionics system of aviation civil aircraft is the important evidence designing multi partition operating system in the world.A lot of ripe operating system is had at present based on this standard.

DVS dispatching algorithm based on partition operating system is made up of following steps:

1, in task control block (TCB), the data item that one is pressed idle task t1 working time before partitioned record step-down is increased.

Task control block (TCB) is the unique data structure of logger task information in operating system, a kind of high efficiency method that free time records is exactly the working time of recording idle task, using the data item of this time as task control block (TCB), can quick obtaining and this information of amendment.

2, before judging step-down, whether idle task t1 working time meets voltage-switching conditions.

Voltage-switching conditions is: idle task t1> working time before step-down if meet voltage-switching conditions, perform frequency reducing operation, until point end of extent;

The fast frequency fluctuation of idle task in subregion, assess the degree of stability of free time, before step-down, idle task t1 working time meets voltage-switching conditions continuous 5 times, performs frequency reducing operation.

In partition operating system, do not adopt the operation mixing down to park mode, because the switching power consumption of this operation is large, the time is long, and the overhead brought reduces the real-time of system, therefore, only adopts frequency reducing and raising frequency operation.For different processors, frequency reducing is different with the time of raising frequency, different current voltage and expection voltage needed for power consumption make in advance MAP table, voltage-switching conditions is by acquisition of tabling look-up.

3, at the end of subregion, raising frequency operation is performed.

In subregion insulation request subregion, the execution of task can not affect the operation of other subregions, and frequency reducing operation also will ensure not impact other subregions, thus, completes raising frequency operation in subregion finishing scheduling.

Claims (3)

1., based on the DVS dispatching algorithm of partition operating system, it is characterized in that: comprise the following steps:

1] in the task control block (TCB) of idle task, the data item that one is pressed idle task t1 working time before partitioned record step-down is increased;

2] before judging step-down, whether idle task t1 working time meets voltage-switching conditions: when idle task working time before step-down $t1>\frac{\frac{\mathrm{Echange}}{k*({\mathrm{Vl}\arg e}^2-{\mathrm{Vsmall}}^2)}+2*\mathrm{tchange}}{1-\frac{\mathrm{Vsmall}}{\mathrm{Vl}\arg e}}$ Time, meet voltage-switching conditions, perform frequency reducing operation, until point end of extent;

Wherein Echange is the voltage switching energy consumption of chip, and Vlarge is voltage before step-down, and Vsmall is voltage after step-down, and tchange is the voltage switching time of chip, and k is the scale factor of energy consumption and voltage relationship;

3] at the end of subregion, raising frequency operation is performed.

2. the DVS dispatching algorithm based on partition operating system according to claim 1, is characterized in that: in step 2, and before step-down, idle task t1 working time meets voltage-switching conditions continuous 5 times, performs frequency reducing operation.

3. the DVS dispatching algorithm based on partition operating system according to claim 1 and 2, is characterized in that: step 1] also comprise following link: for various chip, by various chip value calculates, and is made into MAP table; Step 2] also comprise, query steps 1] MAP that makes table, before judging step-down, whether idle task t1 working time meets voltage-switching conditions.