CN108984292B - Fixed priority periodic task energy consumption optimization method for hybrid key system - Google Patents

Fixed priority periodic task energy consumption optimization method for hybrid key system Download PDF

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CN108984292B
CN108984292B CN201810921498.3A CN201810921498A CN108984292B CN 108984292 B CN108984292 B CN 108984292B CN 201810921498 A CN201810921498 A CN 201810921498A CN 108984292 B CN108984292 B CN 108984292B
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张忆文
蒋文贤
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/329Power saving characterised by the action undertaken by task scheduling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
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    • G06F2209/484Precedence
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention relates to a fixed priority periodic task energy consumption optimization method of a hybrid key system, which comprises the following steps of establishing a hybrid key periodic task model comprising a plurality of hybrid key periodic tasks; determining the priority of the mixed key period task by using a key hierarchy dividing method; calculating the lowest speed S of feasible scheduling of the tasks in the mixed key period; calculating the idle time ST generated by the high key level task in the low mode, and determining the execution speed S of the processor by using the idle timei(ii) a Low key hierarchy tasks and high key hierarchy tasks are always at speed S in low modeiExecuting; the extra load of the high key level task is executed at the maximum processor speed in the high mode; and the energy consumption of the processor is reduced by utilizing a dynamic power consumption management technology. The method of the invention effectively reduces the energy consumption of the system by utilizing the idle time generated by the high key level task and the dynamic power consumption management technology.

Description

Fixed priority periodic task energy consumption optimization method for hybrid key system
Technical Field
The invention relates to low-energy-consumption real-time scheduling of a hybrid key system, in particular to a fixed priority periodic task energy consumption optimization method of the hybrid key system.
Background
The hybrid critical system is an embedded real-time system which can complete multiple functions on the same platform and meet the limitations of power consumption, cost and volume. The hybrid critical system may perform different levels of critical functionality. These functions can be broadly divided into safety-critical functions and task-critical functions. Unmanned aerial vehicles are a typical application of hybrid critical systems, whose trajectory calculation and flight control functions are considered safety critical functions; while its object tracking function for monitoring purposes is considered a mission critical function. Since the system is limited by weight and volume, and is powered by batteries, and the rapid development of processor technology, the problem of energy consumption has become an important factor restricting the development of the system.
At present, research aiming at a hybrid key system mainly focuses on feasibility analysis of the system, relatively few researches aiming at energy consumption of the hybrid key system are carried out, only a few researches mainly adopt a system scheduled by a dynamic priority strategy, and the system cannot be suitable for a system scheduled by a fixed priority strategy, and the energy consumption of the researches is high.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for optimizing the energy consumption of a fixed priority periodic task of a hybrid key system, which effectively reduces the energy consumption of the system by utilizing the idle time generated by a high key level task and a dynamic power consumption management technology.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a fixed priority periodic task energy consumption optimization method for a hybrid critical system comprises the following steps:
establishing a mixed key period task model comprising a plurality of mixed key period tasks;
determining the priority of the mixed key period task by using a key hierarchy dividing method;
calculating the lowest speed S of feasible scheduling of the mixed key period task;
calculating the idle time ST generated by the high key level task in the low mode, and determining the execution speed S of the processor by using the idle timei(ii) a If the execution speed of the processor SiGreater than the minimum speed S, let Si=S;
Low key hierarchy tasks and high key hierarchy tasks are always at speed S in low modeiExecuting, the high key level task with its extra load executing at maximum processor speed in high mode;
the energy consumption of the processor is reduced by utilizing a dynamic power consumption management technology;
the method for reducing the energy consumption of the processor by using the dynamic power consumption management technology specifically comprises the following steps:
when the processor is in an idle state, comparing the idle time of the processor at the moment with the switching overhead of the processor speed; if the idle time of the processor is larger than the switching overhead of the processor state, switching the processor to a low power consumption state until a new periodic task is released; if the processor idle time is less than or equal to the processor state switching overhead, the processor remains in the idle state.
Preferably, the establishing of the mixed key cycle task model including the plurality of mixed key cycle tasks specifically includes:
the mixed key period task model is a set of n mixed key period tasks, wherein the set is gamma and tau12,…,τnEach mixed key-cycle task τi(1. ltoreq. i. ltoreq. n, i is an integer) from a quadruple { Ti,Dii,CiIs composed of (i) wherein TiRepresenting mixed key-cycle tasks τiA period of (a); diRepresenting mixed key-cycle tasks τiAnd it is equal to Ti;ξiRepresenting mixed key-cycle tasks τiKey hierarchy of (1), which may be expressed as ξiMixed critical period task τ ═ { LO, HI }iIs LO, it is a low key level task, a mixed key period task τiWhen the key level is HI, the task is a high key level task; ciRepresenting mixed key-cycle tasks τiThe worst case execution time in the different modes; ci(LO) and Ci(HI) denotes the mixed critical periodic task τ, respectivelyiExecution time in low mode and high mode; if mixing the critical period task τiFor low key hierarchy tasks, then Ci(HI)=Ci(LO); if mixing the critical period task τiFor high key level tasks, then Ci(HI)>=Ci(LO)。
Preferably, the determining the priority of the mixed key cycle task by using the key hierarchy dividing method includes the following processing steps:
firstly, determining the priority of tasks according to the key hierarchy of the tasks in the mixed key cycle: the higher the key hierarchy, the higher its priority; the lower the key hierarchy, the lower its priority;
on the basis, the priority of the tasks is further confirmed according to the period of the mixed key cycle tasks: the shorter the period, the higher its priority; the longer the period, the lower its priority; if the period of the task is the same, the lower the subscript of the task, the higher the priority of the task.
Preferably, the lowest speed S of the feasible scheduling of the mixed key cycle task is calculated as follows:
Figure BDA0001764351830000021
wherein, F (n) represents the utilization rate upper bound of the task set of the monotonic rate strategy scheduling period; UEX represents the utilization rate of extra load of the high key level task;
Figure BDA0001764351830000022
representing the utilization rate of the low-key level task in the low mode;
Figure BDA0001764351830000023
and the utilization rate of the high-key-level task in the low mode is shown.
Preferably, the idle time ST generated by the high key hierarchy task in the low mode is calculated, and the execution speed S of the processor is determined by using the idle timei(ii) a If the execution speed of the processor SiGreater than the minimum speed S, let Si(ii) S; the method specifically comprises the following steps:
the idle time ST is calculated as follows:
Figure BDA0001764351830000024
wherein Γ represents mixingSet of mission of critical period, ζiRepresenting mixed key-cycle tasks τiThe key hierarchy of (1);
execution speed S of processoriThe calculation method of (c) is as follows:
Figure BDA0001764351830000031
wherein if Si>S,Si=S。
Preferably, the low key level tasks and the high key level tasks are always at speed S in the low modeiExecuting, the high key level task with its extra load executing at maximum processor speed in high mode; the processing steps are as follows:
if task τiIs a low key hierarchy task, which is at speed SiExecuting; if task τiIs a high key hierarchy task that starts at speed SiExecute when its execution time exceeds
Figure BDA0001764351830000032
When the system switches from low mode to high mode, all low key level tasks will be cancelled and the extra load of high key level tasks will be executed at maximum processor speed.
As can be seen from the above description of the present invention, compared with the prior art, the present invention has the following advantages:
(1) compared with the conventional method for scheduling the periodic tasks of the hybrid key system, the method disclosed by the invention saves the energy consumption by about 15.69%;
(2) the method can ensure that the periodic task is executed within the deadline of the periodic task;
(3) the reduction of the energy consumption of the hybrid key system can reduce the production cost of products, prolong the service time of equipment and reduce the replacement period of batteries.
The present invention is described in further detail with reference to the drawings and the embodiments, but the method for optimizing the energy consumption of the fixed priority periodic task of the hybrid critical system according to the present invention is not limited to the embodiments.
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FIG. 1 is a schematic flow chart of the method of the present invention;
fig. 2 is a simulation experiment result diagram of normalized energy consumption and utilization rate of a high-key-level task in a high mode according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described and discussed in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, the method for optimizing the energy consumption of a fixed priority periodic task of a hybrid critical system of the present invention includes the following steps:
step 101: a mixed key period task model comprising a plurality of mixed key period tasks is established.
The mixed key period task model is a set of n mixed key period tasks, wherein the set is gamma and tau12,…,τnEach mixed key-cycle task τi(1. ltoreq. i. ltoreq. n, i is an integer) from a quadruple { Ti,Dii,CiIs composed of (i) wherein TiIs mixing of critical period tasks tauiA period of (a); diIs mixing of critical period tasks tauiAnd it is equal to Ti;ξiIs mixing of critical period tasks tauiKey hierarchy of (1), which may be expressed as ξiMixed critical period task τ ═ { LO, HI }iIs LO, it is a low key level task, a mixed key period task τiWhen the key level is HI, the task is a high key level task; ciFor mixing critical-period tasks τiThe worst case execution time in the different modes; ci(LO) and Ci(HI) Mixed Critical cycle tasks τ, respectivelyiExecution time in low mode and high mode; if mixing the critical period task τiFor low key hierarchy tasks, Ci(HI)=Ci(LO); if mixing of critical period tasksτiWhen it is a high key level task, Ci(HI)>=Ci(LO)。
Step 102: and determining the priority of the tasks in the mixed key period by using a key hierarchical division method.
Firstly, determining the priority of a task according to the key hierarchy of the task; the higher the key hierarchy, the higher its priority; the lower the key hierarchy, the lower its priority; on the basis, the priority of the task is further confirmed according to the period of the task; the shorter the period, the higher its priority; the longer the period, the lower its priority; if the period of the task is the same, the lower the subscript of the task, the higher the priority of the task.
Step 103: and calculating the lowest speed S of feasible scheduling of the mixed key period task.
The lowest speed S of the feasible scheduling of the mixed key period task is calculated as follows:
Figure BDA0001764351830000041
wherein F (n) is the upper utilization bound of the monotonic rate policy scheduling cycle task set; it is calculated by the following formula:
Figure BDA0001764351830000042
wherein n is the number of the periodic tasks of the mixed key period task set; UEX is the utilization of extra load of the high key level task; the calculation method is as follows:
Figure BDA0001764351830000043
where Γ is the set of mixed key-cycle tasks, ζiIs mixing of critical period tasks tauiHI represents a high key hierarchy task, Ci(LO) and Ci(HI) Mixed Critical cycle tasks τ, respectivelyiExecution time in low mode and high mode; t isiIs a mixture ofSynthetic critical periodic task tauiA period of (a);
Figure BDA0001764351830000044
the utilization rate of the low-key level task in the low mode is calculated as follows:
Figure BDA0001764351830000045
where Γ is the set of mixed key-cycle tasks, ζiIs mixing of critical period tasks tauiLO represents a low key hierarchy task, Ci(LO) is a mixed critical period task τiExecution time in low mode; t isiIs mixing of critical period tasks tauiA period of (a);
Figure BDA0001764351830000051
the utilization rate of the high key level task in the low mode is calculated as follows:
Figure BDA0001764351830000052
where Γ is the set of mixed key-cycle tasks, ζiIs mixing of critical period tasks tauiHI represents a high key hierarchy task, Ci(HI) Mixed Critical cycle tasks τ, respectivelyiExecution time in high mode; t isiIs mixing of critical period tasks tauiThe period of (c).
Step 104: calculating the idle time ST generated by the high key level task in the low mode, and determining the execution speed S of the processor by using the idle timei(ii) a If the execution speed of the processor SiGreater than the minimum speed S, let Si=S。
The idle time ST is calculated as follows:
Figure BDA0001764351830000053
where Γ is the set of mixed key-cycle tasks, ζiIs mixing of critical period tasks tauiHI represents a high key hierarchy task, Ci(LO) and Ci(HI) Mixed Critical cycle tasks τ, respectivelyiExecution time in low mode and high mode; execution speed S of processoriThe calculation method of (c) is as follows:
Figure BDA0001764351830000054
wherein ST is idle time; if S isi>S,Si=S。
Step 105: low key hierarchy tasks and high key hierarchy tasks are always at speed S in low modeiExecuting, the high key level task with its extra load executing at maximum processor speed in high mode; the processing steps are as follows:
if task τiIs a low key hierarchy task, which is at speed SiExecuting; if task τiIs a high key hierarchy task that starts at speed SiExecute when its execution time exceeds
Figure BDA0001764351830000055
When the system is switched from the low mode to the high mode, all low key level tasks are cancelled, and the extra load of the high key level tasks is executed at the maximum processor speed; the extra load of the high key level task is Ci(HI)-Ci(LO)。
Step 106: and the energy consumption of the processor is reduced by utilizing a dynamic power consumption management technology.
When the processor is in an idle state, comparing the idle time of the processor at the moment with the switching overhead of the processor speed; if the idle time of the processor is larger than the switching overhead of the processor state, switching the processor to a low power consumption state until a new periodic task is released; if the processor idle time is less than or equal to the processor state switching overhead, the processor remains in the idle state.
Referring to fig. 2, in the present embodiment, each mixed key-cycle task set includes 11 cycle tasks, of which 7 are high key-level cycle tasks and 4 are low key-level cycle tasks. The period of the high key level and low key level periodic tasks is [1000,5000 ]]To select. Low key hierarchy periodic tasks τiC of (A)i(LO) and Ci(HI) selects between 1 and its period. High-low key level period task tauiC of (A)i(LO) selecting between 1 and its period; high-low key level period task tauiC of (A)i(HI) at Ci(LO) to its period. By adjusting C of taski(LO) and Ci(HI) to ensure that the utilization of the mixed critical period task set does not exceed a given value. The simulation time for the experiment was set to 1000000 time slices and the time for the system mode switch was set to 500000. Setting the utilization rate of a low mode of the low key level task set to be 0.3 and the utilization rate of a high mode of the low key level task set to be 0.18, and investigating the influence of the utilization rate of the high key level task set on the energy consumption of the system.
Three methods are compared in fig. 2. First, PCS (no critical hierarchical partitioning method that utilizes power saving techniques) methods, tasks are always executed at maximum processor speed. Second, OSS (tasks are always executed at the lowest speed, but cannot take advantage of dynamic idle time to reduce energy consumption). Thirdly, the method of the invention (energy is saved by using DVS technology and DPM technology, and the idle time generated by high key level tasks can be used for reducing energy consumption). It can be seen from fig. 2 that the normalized energy consumption of all methods is affected by the utilization rate in the high key hierarchy high mode. As the utilization rate increases in the high key level and high mode, the normalized energy consumption of all methods rises. This is because the system power consumption increases because the execution time of the task and its minimum speed increase due to the increased utilization rate in the high key hierarchy and high mode. The normalized energy consumption of the method of the invention is lower than that of the PCS and OSS methods. The process of the present invention saves energy consumption by about 50.23% and 15.69% compared to the PCS and OSS processes, respectively.
The above is only one preferred embodiment of the present invention. However, the present invention is not limited to the above embodiments, and any equivalent changes and modifications made according to the present invention, which do not bring out the functional effects beyond the scope of the present invention, belong to the protection scope of the present invention.

Claims (5)

1. A fixed priority periodic task energy consumption optimization method for a hybrid critical system is characterized by comprising the following steps:
establishing a mixed key period task model comprising a plurality of mixed key period tasks;
determining the priority of the mixed key period task by using a key hierarchy dividing method;
calculating the lowest speed S of feasible scheduling of the mixed key period task;
calculating the idle time ST generated by the high key level task in the low mode, and determining the execution speed S of the processor by using the idle timei(ii) a If the execution speed of the processor SiGreater than the minimum speed S, let Si=S;
Low key hierarchy tasks and high key hierarchy tasks are always at speed S in low modeiExecuting, the high key level task with its extra load executing at maximum processor speed in high mode;
the energy consumption of the processor is reduced by utilizing a dynamic power consumption management technology;
the method for reducing the energy consumption of the processor by using the dynamic power consumption management technology specifically comprises the following steps:
when the processor is in an idle state, comparing the idle time of the processor at the moment with the switching overhead of the processor speed; if the idle time of the processor is larger than the switching overhead of the processor state, switching the processor to a low power consumption state until a new periodic task is released; if the idle time of the processor is less than or equal to the switching overhead of the processor state, the processor still keeps the idle state;
the method for determining the priority of the tasks in the mixed key period by using the key hierarchy division method comprises the following processing steps:
firstly, determining the priority of tasks according to the key hierarchy of the tasks in the mixed key cycle: the higher the key hierarchy, the higher its priority; the lower the key hierarchy, the lower its priority;
on the basis, the priority of the tasks is further confirmed according to the period of the mixed key cycle tasks: the shorter the period, the higher its priority; the longer the period, the lower its priority; if the period of the task is the same, the lower the subscript of the task, the higher the priority of the task.
2. The method for optimizing energy consumption of fixed priority periodic tasks of a hybrid critical system according to claim 1, wherein the establishing of the hybrid critical periodic task model including a plurality of hybrid critical periodic tasks specifically includes:
the mixed key period task model is a set of n mixed key period tasks, wherein the set is gamma and tau12,…,τnEach mixed key-cycle task τiI is more than or equal to 1 and less than or equal to n, i is an integer and is composed of quadruple { T [)i,Dii,CiIs composed of (i) wherein TiRepresenting mixed key-cycle tasks τiA period of (a); diRepresenting mixed key-cycle tasks τiAnd it is equal to Ti;ξiRepresenting mixed key-cycle tasks τiKey hierarchy of (1), which may be expressed as ξiMixed critical period task τ ═ { LO, HI }iIs LO, it is a low key level task, a mixed key period task τiWhen the key level is HI, the task is a high key level task; ciRepresenting mixed key-cycle tasks τiThe worst case execution time in the different modes; ci(LO) and Ci(HI) denotes the mixed critical periodic task τ, respectivelyiExecution time in low mode and high mode; if mixing the critical period task τiFor low key hierarchy tasks, then Ci(HI)=Ci(LO); if mixing the critical period task τiFor high key level tasks, then Ci(HI)>=Ci(LO)。
3. The method for optimizing energy consumption of fixed priority periodic tasks of a hybrid critical system according to claim 2, wherein the lowest speed S of feasible scheduling of the hybrid critical periodic tasks is calculated as follows:
Figure FDA0003335706080000021
wherein, F (n) represents the utilization rate upper bound of the task set of the monotonic rate strategy scheduling period; UEX represents the utilization rate of extra load of the high key level task;
Figure FDA0003335706080000022
representing the utilization rate of the low-key level task in the low mode;
Figure FDA0003335706080000023
and the utilization rate of the high-key-level task in the low mode is shown.
4. The method as claimed in claim 3, wherein the idle time ST generated by the high key hierarchy task in the low mode is calculated, and the idle time is used to determine the execution speed S of the processori(ii) a If the execution speed of the processor SiGreater than the minimum speed S, let Si(ii) S; the method specifically comprises the following steps:
the idle time ST is calculated as follows:
Figure FDA0003335706080000024
execution speed S of processoriThe calculation method of (c) is as follows:
Figure FDA0003335706080000025
wherein if Si>S,Si=S。
5. The method of claim 4, wherein the low key hierarchy tasks and the high key hierarchy tasks are always at speed S in the low modeiExecuting, the high key level task with its extra load executing at maximum processor speed in high mode; the processing steps are as follows:
if task τiIs a low key hierarchy task, which is at speed SiExecuting; if task τiIs a high key hierarchy task that starts at speed SiExecute when its execution time exceeds
Figure FDA0003335706080000026
When the system switches from low mode to high mode, all low key level tasks will be cancelled and the extra load of high key level tasks will be executed at maximum processor speed.
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