CN104701242B - The lithographic method of contact hole - Google Patents
The lithographic method of contact hole Download PDFInfo
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- CN104701242B CN104701242B CN201310654703.1A CN201310654703A CN104701242B CN 104701242 B CN104701242 B CN 104701242B CN 201310654703 A CN201310654703 A CN 201310654703A CN 104701242 B CN104701242 B CN 104701242B
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- barrier layer
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Abstract
The present invention provides a kind of lithographic method of contact hole.The lithographic method of the contact hole includes：Semiconductor substrate is provided, the semiconductor substrate includes stop-layer, barrier layer and dielectric layer successively from bottom to up；Through-hole is formed in the dielectric layer；Along barrier layer described in the via etch to the upper surface for exposing the stop-layer, etching the barrier layer includes：The barrier layer will be etched it is divided into and carry out at least twice, and polymer treatment is removed between adjacent twice etching.The present invention can improve the etching effect of contact hole, ensure the validity of semiconductor devices.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to a kind of lithographic methods of contact hole.
Background technology
The making of semiconductor integrated circuit is extremely complex process, it is therefore intended that by the various electronics needed for particular electrical circuit
Component and circuit, diminution are produced on the chip of small area.Wherein, various components must do electricity by internal connecting line appropriate
Property connection, the desired function of competence exertion.
Since the making of integrated circuit is to super large-scale integration（ULSI）Development, internal current densities are increasingly
Greatly, in chip contained number of elements be continuously increased, actually just reduce the free space of surface line.This problem
Solution is to use multiple layer metal traverse design, is connected with the multilayer that conductive layer is overlapped mutually using multilayer dielectric layer, this its
In just need to make the contact hole of a large amount of small sizes.
It is illustrated for forming contact hole in source region and drain region below.
Refering to what is shown in Fig. 1, providing semiconductor substrate 10, the semiconductor substrate 10 includes source/drain regions（Do not show in figure
Go out）, include gate dielectric layer 31 in the semiconductor substrate 10, the grid 32 on gate dielectric layer 31, be located at gate dielectric layer 31
The side wall 40 of 32 side of side and grid is located at the metal silicide 20 on the source/drain regions and on grid 32, is located at metal
On silicide 20 and side wall 40 on barrier layer 50, the dielectric layer 60 on barrier layer 50.The material on the barrier layer 50 can
Think silicon nitride（SiN）, the material of the dielectric layer 60 can be silica（SiO2）.
Refering to what is shown in Fig. 2, forming contact corresponding with source/drain regions in the dielectric layer 60 using dry etch process
Hole 70.
Refering to what is shown in Fig. 3, along barrier layer 50 described in 70 dry etching of the contact hole, to expose metal silicide 20
Upper surface.
Subsequently metal material can be filled in the contact hole 90 newly formed, to form metal plug, realize source/drain regions
Being electrically connected between other semiconductor elements.
But subsequently had been found that by test, the metal plug formed using the above method can not be with metal below
It is effectively electrically connected between silicide 20, segment thickness is still had between the metal plug and the metal silicide 20
Barrier layer 80, i.e., along 70 dry etching barrier layer 50 of contact hole when it is completely that barrier layer 50 is not etched open, eventually lead to half
Conductor device it is invalid.
Therefore, how to improve the etching effect of contact hole just becomes one of those skilled in the art's urgent problem to be solved.
Invention content
Problems solved by the invention is to provide a kind of lithographic method of contact hole, can improve the etching effect of contact hole,
Ensure the validity of semiconductor devices.
To solve the above problems, the present invention provides a kind of lithographic method of contact hole, including：
Semiconductor substrate is provided, the semiconductor substrate includes stop-layer, barrier layer and dielectric layer successively from bottom to up；
Through-hole is formed in the dielectric layer；
Along barrier layer described in the via etch to the upper surface for exposing the stop-layer, the barrier layer packet is etched
It includes：The barrier layer will be etched it is divided into and carry out at least twice, and polymer treatment is removed between adjacent twice etching.
Optionally, the material on the barrier layer is silicon nitride, and the material of the dielectric layer is silica.
Optionally, carry out every time it is described removal polymer treatment time include：10 seconds~20 seconds.
Optionally, the removal polymer treatment includes：It is passed through removal gas into the through-hole, and is evacuated.
Optionally, the removal gas includes one or more of gas：Nitrogen, hydrogen, oxygen, argon gas.
Optionally, it is described removal polymer treatment air pressure include：The millitorr of 100 millitorrs~200, bias power are less than 200
Watt, gas flow includes：Mark condition ml/min in 400 mark condition ml/mins~700.
Optionally, the thickness range on the barrier layer of etching removal includes every time：75 angstroms~200 angstroms.
Optionally, etching the barrier layer includes：First time etching processing is carried out to remove the barrier layer of first thickness；Into
Row removal polymer treatment；Second of etching processing is carried out to remove the barrier layer of second thickness, the first thickness with it is described
The sum of second thickness is equal to the thickness on the barrier layer.
Optionally, etching the barrier layer includes：First time etching processing is carried out to remove the barrier layer of first thickness；Into
Row removes polymer treatment for the first time；Second of etching processing is carried out to remove the barrier layer of second thickness；It is gone for the second time
Except polymer treatment；Third time etching processing is carried out to remove the barrier layer of third thickness；The first thickness, second thickness
The sum of degree and the third thickness are equal to the thickness on the barrier layer.
Optionally, the lithographic method of the contact hole further includes：After etching the barrier layer, carry out at wet-cleaning
Reason.
Compared with prior art, technical scheme of the present invention has the following advantages：
Technical scheme of the present invention is formed after through-hole in the dielectric layer, will be along the via etch barrier layer to exposing
The etch step of the upper surface of stop-layer is divided into be carried out more than twice, and increases removal polymer between adjacent twice etching
The step of processing, to which the polymer generated during last time etching barrier layer can be removed by removing polymer treatment, with
It hinders etching to carry out so that not having a large amount of polymer when next etching barrier layer, may finally ensure the blocking of full depth
Layer is all etched out, and can completely reveal the upper surface of stop-layer and the through-hole corresponding part, improve the quarter of contact hole
Effect is lost, ensure that the validity of semiconductor devices.
Description of the drawings
Fig. 1 to Fig. 3 is the schematic diagram of the lithographic method of contact hole in the prior art；
Fig. 4 is the flow diagram of the lithographic method of contact hole provided by one embodiment of the present invention；
Fig. 5 to Fig. 9 is the corresponding structural schematic diagram of each step of the lithographic method for the contact hole that Fig. 4 is provided；
Figure 10 is the flow diagram of the lithographic method for the contact hole that another embodiment of the present invention provides.
Specific implementation mode
As described in background, the prior art etches in the dielectric layer of silica material form through-hole after, on edge
Below the via etch dielectric layer when barrier layer of silicon nitride material, it is difficult to the barrier etch of full depth be opened, at once
Erosion can only stop over the barrier layer, to can not just expose stop-layer below barrier layer, can not finally be formed and stop-layer
The metal plug of connection leads to the invalid of semiconductor devices.
Even if carrying out pumping process always in etch media layer and barrier layer, it is still unavoidable from the production of the above problem
It is raw.
Above problem Producing reason is：During etch media layer and barrier layer, many polymerizations are will produce
Object（Polymer）, especially in etching barrier layer, the yield of polymer can more and density bigger.In etch media layer
During, since the yield of polymer is limited and the position of polymer is more top, can be protected by pumping process
Demonstrate,prove the smooth formation of through-hole in dielectric layer.But in etching barrier layer, since the yield of polymer is relatively more, density compares
Big and polymer position is compared on the lower, and pumping process is caused to be difficult to carry out, and only considerably less polymer is extracted, to poly-
The yield for closing object is much larger than the amount that polymer is extracted, therefore has a large amount of polymer to be located at always in etching barrier layer and lead to
In hole, finally can only etched portions thickness barrier layer, and the barrier layer of residual thickness can not then be opened, to also just can not
Expose the upper surface of stop-layer.
In view of the above-mentioned problems, the present invention provides a kind of lithographic method of contact hole, formed after through-hole in the dielectric layer,
The etch step on the barrier layer below the via etch dielectric layer is divided into multiple progress, with adjacent twice etching it
Between the step of increasing removal polymer treatment, to by removing last time etching resistance the step of newly-increased removal polymer treatment
The polymer generated during barrier at least ensures that the cumulant of polymer when next etching barrier layer is less than the extraction of polymer
Amount enables to the barrier layer of gradual etched open full depth, the stop-layer below barrier layer is exposed along the through-hole
Upper surface finally improves the etching effect of contact hole.When subsequently being filled in the contact hole in dielectric layer and barrier layer
After conductive material forms metal plug, which can be effectively electrically connected with stop-layer, that is, ensure that semiconductor
The validity of device.
To make the above purposes, features and advantages of the invention more obvious and understandable, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Refering to what is shown in Fig. 4, an embodiment of the present invention provides a kind of lithographic method of contact hole, may comprise steps of：
Step S11, provides semiconductor substrate, the semiconductor substrate include successively from bottom to up stop-layer, barrier layer and
Dielectric layer；
Step S12 forms through-hole in the dielectric layer；
Step S13 carries out first time etching processing to remove the blocking of first thickness along the through-hole to the barrier layer
Layer；
Step S14, is removed polymer treatment；
Step S15 carries out second of etching processing to remove second thickness along the through-hole to the remaining barrier layer
Barrier layer, the sum of the first thickness and the second thickness be equal to the barrier layer thickness.
The step of etching barrier layer, is divided into and carries out twice by the present embodiment, and increases between twice etching and once go
The step of except polymer treatment, to improve the etching effect of contact hole.
It is described in detail for forming contact hole in source/drain regions below, but it does not limit the protection model of the present invention
It encloses.
Refering to what is shown in Fig. 5, providing semiconductor substrate 100, the semiconductor substrate 100 includes source/drain regions（In figure not
It shows）, include gate dielectric layer 310, the grid 320 on gate dielectric layer 310 in the semiconductor substrate 100, be located at grid and be situated between
The side wall 400 of 320 side of 310 side of electric layer and grid is located at the metal silicide on the source/drain regions and on grid 320
200, the barrier layer 500 on metal silicide 200 and on side wall 400, the dielectric layer 600 on barrier layer 500.
The material of grid 320 described in the present embodiment can be with polysilicon.
It should be noted that in other embodiments of the invention, the grid can also be metal gates, at this time grid
On not necessarily form metal silicide, only on source/drain regions formed metal silicide.
Metal silicide 200 described in the present embodiment can reduce the metal plug being subsequently formed and source/drain regions and grid
Contact resistance between pole 320, material can be nickel SiClx（NiSi）.
Stop-layer of the metal silicide 200 described in the present embodiment as subsequent etching contact hole.
It should be noted that in other embodiments of the invention, the stop-layer can also be other materials layer, root
Depending on specific etching situation, details are not described herein.
The material on barrier layer 500 can be silicon nitride in the present embodiment, the thickness d 1 on barrier layer 500 can be 100 angstroms~
It 400 angstroms, can be formed by chemical vapor deposition method, for being protected to active area.
The material of the present embodiment dielectric layer 600 can be silica, can be formed by chemical vapor deposition method.
The present embodiment also needs to form patterned photoresist layer on dielectric layer 600（PR is not shown in figure）, the light
Photoresist layer is corresponding with the position of source/drain regions, using the mask as subsequent etching dielectric layer 600.
In addition, in order to improve etching quality, it, can also be first in the dielectric layer 600 before forming the photoresist layer
On sequentially form non-type carbon-coating（APF is not shown in figure）And bottom anti-reflection layer（DARC is not shown in figure）.
Refering to what is shown in Fig. 6, forming through-hole 700 in the dielectric layer 600.
The present embodiment etches the dielectric layer using the patterned photoresist layer as mask, using dry etch process
600, the dry etch process may include plasma etching, ion beam milling and reactive ion etching（RIE）Deng.
It specifically, can be with CF in the present embodiment4As etching gas, given an account of using reactive ion etching process etching
Matter layer 600.
It, then can be with patterned photoresist when being formed with non-type carbon-coating and bottom anti-reflection layer on barrier layer 500
Layer is mask, is sequentially etched bottom anti-reflection layer, non-type carbon-coating and dielectric layer, details are not described herein.
Since during using dry etch process etch media layer 600, dielectric layer 600 can occur with etching gas
Reaction, therefore will produce the first polymer of a large amount of elements such as including O, C and F.In order to avoid the yield mistake of first polymer
Mostly to influence etching technics, pumping process can be carried out, while etch media layer 600 to ensure first polymer
Yield is less than or equal to the extraction amount of first polymer, to ensure smooth etch media layer 600.
Refering to what is shown in Fig. 7, first time etching processing is carried out to barrier layer 500 along through-hole 700 described in Fig. 6, to etch the
The barrier layer 500 of one thickness, to form contact hole 910.
Still the resistance can be etched using dry etch process using patterned photoresist layer as mask in the present embodiment
Barrier 500.Specifically, with CF4As etching gas, the barrier layer 500 is etched using reactive ion etching process, it is remaining
The thickness on barrier layer 800 is d2, to which the thickness on the barrier layer 500 being etched in this etching is first thickness d1-d2.
Since during using dry etch process etching barrier layer 500, barrier layer 500 can occur with etching gas
Reaction, therefore will produce the second polymer of a large amount of elements such as including N, C and F.Second polymer is compared to first polymer
Density bigger measures more and position more on the lower, therefore even if carrying out pumping process always during etching barrier layer 500,
Also it can not be always ensured that the yield of second polymer is less than or equal to the extraction amount of second polymer.
The first thickness d1-d2 can be more than, be less than or equal to d2, i.e. the thickness on twice etching barrier layer 500 can be with
It is identical, it can also be different.If at the barrier layer 500 for etching first thickness d1-d2 thickness and the barrier layer of etching d2 thickness,
Second polymer does not all interfere with the progress of etching technics.
Specifically, the thickness range on the barrier layer that etching removes every time（That is the value of first thickness d1-d2 or d2
Value）May include：75 angstroms~200 angstroms, such as：75 angstroms, 100 angstroms, 150 angstroms or 200 angstroms etc..
After forming contact hole 910, a large amount of second polymer may be had existed in contact hole 910, at this time after
Continue if etching remaining barrier layer 800, it is possible that the case where etching can not continue, it is therefore desirable to be removed poly-
The step of closing object processing.
Refering to what is shown in Fig. 8, being passed through removal gas into the through-hole 910, and it is evacuated, to realize removal polymer
Processing.
The removal gas may include one or more of gas：Nitrogen, hydrogen, oxygen, argon gas.
Specifically, it is described removal polymer treatment air pressure may include：100 millitorrs（mTorr）~200 millitorrs, biasing
Power can be less than 200 watts, and gas flow may include：400 mark condition ml/mins（sccm）~700 mark condition ml/mins.
The time of the removal polymer treatment may include 10 seconds~20 seconds, such as：10 seconds, 15 seconds or 20 seconds etc., to
910 at least most of second polymer of through-hole can be removed, it can be completely by resistance at subsequent etching residue barrier layer 800
Barrier is etched open to expose the upper surface of metal silicide 200.
Select nitrogen as removal gas in the present embodiment, to can both take away the polymer in through-hole 910 well,
And will not react again with dielectric layer etc., the generations bombardment such as dielectric layer will not more be acted on.
It should be noted that in other embodiments of the invention, can also use in other manner removal through-hole 910
Second polymer does not limit the scope of the invention.
Refering to what is shown in Fig. 9, second of etching processing is carried out to remaining barrier layer 800 in Fig. 8, to remove second thickness d2
Barrier layer 800, expose the metal silicide 200 on source/drain regions.
The process of second of etching processing can refer to the process of the first time etching processing, no longer superfluous herein
It states.
The step of removing polymer treatment by front, when etching remaining barrier layer 800 at this time, there will be no a large amount of poly-
It closes object to keep off, so as to be smoothed out etching, until forming the through-hole 920 through dielectric layer 600 and barrier layer 500, finally
Improve etching effect.
After carrying out second of etching processing, second polymer is also formed in through-hole 920, it at this time can be by wet
Method cleaning treatment thoroughly removes the impurity such as the polymer, such as：Using diluted hydrofluoric acid, so as to avoid polymer etc. miscellaneous
Matter influences the electric property for the metal plug being subsequently formed.
Subsequently metal material can be filled in through-hole 920 to form metal plug, which can be with metal
It is effectively electrically connected between silicide 200, finally improves the validity of semiconductor devices.
By actual test, it can also prove that the metal plug formed using the present embodiment method really can be with metallic silicon
It is effectively electrically connected between compound, finally improves the yield of semiconductor devices.
Refering to what is shown in Fig. 10, another embodiment of the present invention provides a kind of lithographic method of contact hole, may include following
Step：
Step S21, provides semiconductor substrate, the semiconductor substrate include successively from bottom to up stop-layer, barrier layer and
Dielectric layer；
Step S22 forms through-hole in the dielectric layer；
Step S23 carries out first time etching processing to remove the blocking of first thickness along the through-hole to the barrier layer
Layer；
Step S24 carries out removal polymer treatment for the first time；
Step S25 carries out second of etching processing to remove second thickness along the through-hole to the remaining barrier layer
Barrier layer；
Step S26 carries out second of removal polymer treatment；
Step S27 carries out third time etching processing to remove third thickness along the through-hole to the remaining barrier layer
Barrier layer, the sum of the first thickness, the second thickness and described third thickness be equal to the barrier layer thickness.
The step of etching barrier layer, is divided into and carries out three times by the present embodiment, between adjacent twice etching barrier layer
The step of carrying out removing polymer treatment twice altogether, it is thinner due to each etching barrier layer, to remove at polymer
Preferably the polymer generated in previous etching can be removed when reason, so it is more preferable ensure that rear etching it is smooth into
Row, finally improves the validity of semiconductor devices.
Wherein, the material on the barrier layer can be silicon nitride, and the material of the dielectric layer can be silica.
Wherein, the removal polymer treatment may include：It is passed through removal gas into the through-hole, and is evacuated.
Specifically, it is described removal polymer treatment when air pressure may include：The millitorr of 100 millitorrs~200, bias power can
To be less than 200 watts, gas flow may include：Mark condition ml/min in 400 mark condition ml/mins~700；Described in carrying out every time
Removal polymer treatment time may include：10 seconds~20 seconds；The removal gas may include one or more of gas
Body：Nitrogen, hydrogen, oxygen, argon gas；The thickness range on the barrier layer of etching removal may include every time：75 angstroms~200
Angstrom.
The step of the step of each etching barrier layer and every time removal polymer treatment, can specifically refer to previous implementation
Example, details are not described herein.
In addition, after carrying out third time etching processing, wet clean process can also be carried out.
It should be noted that in other embodiments of the invention, can also the step of etching barrier layer, be divided into three
More than secondary, so that the step of increasing removal polymer treatment more than twice, does not limit the scope of the invention.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (8)
1. a kind of lithographic method of contact hole, which is characterized in that including：
Semiconductor substrate is provided, the semiconductor substrate includes stop-layer, barrier layer and dielectric layer successively from bottom to up；
Through-hole is formed in the dielectric layer；
Along barrier layer described in the via etch to the upper surface for exposing the stop-layer, etching the barrier layer includes：Into
Row first time etching processing is to remove the barrier layer of first thickness；Carry out removal polymer treatment for the first time；Second is carried out to carve
Erosion processing is to remove the barrier layer of second thickness；Carry out second of removal polymer treatment；Third time etching processing is carried out to go
Except the barrier layer of third thickness；The sum of the first thickness, the second thickness and described third thickness are equal to the barrier layer
Thickness.
2. the lithographic method of contact hole as described in claim 1, which is characterized in that the material on the barrier layer is silicon nitride,
The material of the dielectric layer is silica.
3. the lithographic method of contact hole as described in claim 1, which is characterized in that carry out the removal polymer treatment every time
Time include：10 seconds~20 seconds.
4. the lithographic method of contact hole as described in claim 1, which is characterized in that the removal polymer treatment includes：To
It is passed through removal gas in the through-hole, and is evacuated.
5. the lithographic method of contact hole as claimed in claim 4, which is characterized in that the removal gas include it is following a kind of or
Multiple gases：Nitrogen, hydrogen, oxygen, argon gas.
6. the lithographic method of contact hole as claimed in claim 4, which is characterized in that the air pressure packet of the removal polymer treatment
It includes：The millitorr of 100 millitorrs~200, bias power are less than 200 watts, and gas flow includes：Mark condition in 400 mark condition ml/mins~700
Ml/min.
7. the lithographic method of contact hole as described in claim 1, which is characterized in that the barrier layer that etching removes every time
Thickness range includes：75 angstroms~200 angstroms.
8. the lithographic method of contact hole as described in claim 1, which is characterized in that further include：Etch the barrier layer it
Afterwards, wet clean process is carried out.
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| CN109817634B (en) * | 2019-01-31 | 2021-04-13 | 长江存储科技有限责任公司 | 3D NAND memory and forming method thereof |
| CN115881628A (en) * | 2023-03-09 | 2023-03-31 | 合肥晶合集成电路股份有限公司 | Manufacturing method of semiconductor structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237296A (en) * | 2010-04-29 | 2011-11-09 | 中芯国际集成电路制造(上海)有限公司 | Through hole etching method |
| CN103730349A (en) * | 2012-10-10 | 2014-04-16 | 中芯国际集成电路制造(上海)有限公司 | Method for forming contact hole |
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| US6562416B2 (en) * | 2001-05-02 | 2003-05-13 | Advanced Micro Devices, Inc. | Method of forming low resistance vias |
| US6849559B2 (en) * | 2002-04-16 | 2005-02-01 | Tokyo Electron Limited | Method for removing photoresist and etch residues |
| CN101393842B (en) * | 2007-09-20 | 2011-08-17 | 中芯国际集成电路制造(上海)有限公司 | Slot forming method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237296A (en) * | 2010-04-29 | 2011-11-09 | 中芯国际集成电路制造(上海)有限公司 | Through hole etching method |
| CN103730349A (en) * | 2012-10-10 | 2014-04-16 | 中芯国际集成电路制造(上海)有限公司 | Method for forming contact hole |
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