CN104701232A - Electrostatic clamping method and apparatus - Google Patents
Electrostatic clamping method and apparatus Download PDFInfo
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- CN104701232A CN104701232A CN201410737866.0A CN201410737866A CN104701232A CN 104701232 A CN104701232 A CN 104701232A CN 201410737866 A CN201410737866 A CN 201410737866A CN 104701232 A CN104701232 A CN 104701232A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- B23Q3/00—Devices holding, supporting, or positioning work or tools, of a kind normally removable from the machine
- B23Q3/15—Devices for holding work using magnetic or electric force acting directly on the work
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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Abstract
A method of electrostatically clamping a dielectric wafer (30) to a processing table (3) during plasma processing is described. The table (3) has interdigitated electrodes (26,28) embedded therein. The method comprises applying respective voltages of opposite first and second polarities to adjacent electrodes (26,28) wherein polarisation charges are induced in the wafer (30) with opposite polarity to the respective underlying electrodes thereby electrostatically clamping the wafer to the table; and, after a predetermined time (ton), reversing the polarities of the voltages so that the polarisation charges and electrostatic clamping continues. The on time (ton) of each of the first and second polarities is preselected to be a) greater than the time (T1) required to generate sufficient polarisation charge in the wafer such that the wafer is held with a required pressure for at least 2 seconds after withdrawing of clamping voltages, b) less than the time (T2) for the wafer to separate from the table by a first predetermined amount while in the presence of a steady voltage and a plasma, and c) less than the time (T3) for the wafer to separate from the substrate by a second predetermined amount in the absence of a plasma, after an applied voltage has been applied. The time (ts) for switching between the first and second polarities is less than the time (T1) and less than 2 seconds.
Description
Technical field
The present invention relates to for electrostatically by the method and apparatus of dielectric wafer (workpiece) grasping at processing work platform, be typically adapted at using in plasma processing equipment.
Background technology
Plasma etching and depositing technics depend on and are maintained in allowed band by chip temperature.Control by wafer grip is realized chip temperature in support table, the temperature of support table then uses cooling fluid to maintain.Depositing technics uses the chip temperature within the scope of 50 DEG C ~ 500 DEG C usually; Etch process uses-100 DEG C ~+250 DEG C usually.It is desirable that after temperature stabilization, wafer was remained within the scope of the several years of target temperature.Between processing period, by carrying out plasma treatment with the form of Ions Bombardment and/or chemical reaction (especially in etch process), energy is put on the front of wafer.Between processing period, heat can flow to wafer from workbench, or from flow of wafers to workbench, more common with wafer cooling in etching, and, in depositing technics, in general carry out wafer heating.For given maximum chip temperature, by improving the thermo-contact between wafer and workbench, decrease temperature stabilization times, and increase the maximum heat flux pointing to workbench.Both helps the output improving wafer all effectively.Better thermo-contact also reduces the wafer temperature variations because other technique change causes, and is conducive to the repeatability of improving technique.
These techniques under reduced pressure operate usually, are 0.1 ~ 100 handkerchiefs for plasma etching, and, be 100 ~ 1000 handkerchiefs for plasma deposition.Heat transfer between substrate and support table usually with conduction and radiation for feature, as described in formula 1:
H＝h(T
wafer-T
table)+e
12s
sb(T
wafer 4-T
table 4)Wm
-2(1)
Wherein:
H W m
-2it is the heat flux between wafer and workbench
T
waferk is chip temperature
T
tablek is operating temperature
H W m
-2k
-1it is linear conduction thermal transmission coefficient
E
12it is the coefficient of radiosity of the radiant heat transfer of an effects on surface
S
sbw m
-2k
-4it is Stefan-Boltzmann constant
It is known that, thermal transmission coefficient depends on pressure and the character of gas between gap between surface, surface and adjusts coefficient (accommodation coefficient), and this is adjusted coefficient and describes gas particles that to carry out with each surface contacting and this surface reaches thermally equilibrated degree.By improving the pressure (being generally bring by by the operation of wafer grip in workbench) between wafer and workbench, achieve the increase of thermal transmission coefficient.Usually use the helium pressure within the scope of 100 ~ 3000 handkerchiefs in wafer backside, for carrying out heat transfer in semiconductor machining, this is known as " helium backside cooling method ".
When back side pressure is raised to more than tonnage, must by wafer grip in workbench.Can mechanical grip be adopted, but be limited to the permission area and substrate flexibility that contact with substrate front surface.Also there is the shortcoming producing particle, therefore, be not suitable for for large-scale production.The electrostatic of semiconductor wafer grasps and becomes more conventional technology, especially in plasma etching.Many documents both disclose this technology, such as, and US 5,103,367; G A Wardly Rev SciInstruments 44 (10) pp 1506-1509 (1973); US 6,297,274.Electrostatic grasping device or " catching plate " are often abbreviated as ESC.
ESC (electrostatic grasping device) grasping force has the trend reduced in time, it is believed that cause is: the charge migration in ESC (electrostatic grasping device), or, the accumulation on the surface of insulating layer being usually located at electrostatic grasping device top.Usually by this situation of following manner process: as long as there is measure to keep wafer during voltage reversal, between processing period, make to reverse from the charging voltage of wafer to wafer, or make to grasp voltage reversal.A kind of such method proposes (US6947274B2) by Kellerman, utilize the criterion that the inertia of wafer (inertia) reverses opportunity as associated voltage: caused it to accelerate to leave too far in the back side pressure of wafer so that before can not again being captured, again applied this voltage.The shortcoming of the method is to require relatively to switch fast, and increases the wafer when any switching laws transition and to break away the risk of (popping off).Other method uses the multiple districts having independent voltage and control, and make some districts keep wafer, Shi Yige district switches simultaneously.The shortcoming of the method needs multiple power supply and voltage lead.
need the problem solved
Insulating material grasp than conductor or semiconductor more difficult.It depends on the induced polarization of wafer electric dielectric material, uses compact arranged or " interlocking " conductive electrode (US5838529) be embedded in dielectric.Grasp voltage required by this wafer usually apparently higher than nonisulated type wafer, otherwise grasping force is more limited.Electrostatic grasping device conductor is coated with insulating barrier usually, and this insulating barrier is easily impaired because of electrical breakdown.These factor actings in conjunction limit can for improving the maximum pressure that heat transfer applies under the wafer.
Also problem is had when non-insulated layer on insulation wafer is etched.When there is non-insulated layer, electrostatic grasping device electrode can make electric charge at the inner dislocation of non-insulated layer, is separated obtainable power, this enhances grasping force compared to only by polarization charge.Along with this layer is etched, lose additional grasping force, or heat transfer is reduced, or electrostatic grasps and loses completely.
Summary of the invention
According to a first aspect of the invention, a kind of during plasma process for electrostatically by the method for dielectric wafer grip in processing work platform, this workbench has the staggered electrode be embedded at wherein, this method comprises each switched voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with the polarity contrary with the electrode of corresponding below, induced polarization electric charge in the wafer, thus for electrostatically by wafer grip in workbench; And, at the scheduled time (t
on) after, by the polarity inversion of voltage, make polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each first polarity and the second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in the wafer, after making to cancel and grasping voltage, there is required pressure, keep wafer at least 2 second,
B) time (T is less than
2), time (T
2) be make wafer be separated the time used by the first scheduled volume with workbench when having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) make wafer be separated the time used by the second scheduled volume with substrate when being and having there is no plasma after applied voltage has applied; And, be
Ii) time (t used is switched between the first polarity and the second polarity
s) be less than time (T
1) and be less than 2 seconds.
The present invention also provides plasma processing equipment, comprising: plasma generation chamber, arranges processing work platform therein, and this processing work platform has embedded staggered electrode, and, in use by dielectric wafer arrangement on this processing work platform; Voltage source, itself and staggered electrode are linked; And control system, program setting is control voltage source, so that each switched voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with the polarity contrary with the electrode of corresponding below, induced polarization electric charge in the wafer, thus by wafer for electrostatically grasping at this workbench, and, at the scheduled time (t
on) after, make the polarity inversion of voltage become the second polarity, make polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each first polarity and the second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in the wafer, after making to cancel and grasping voltage, there is required pressure, keep wafer at least 2 second,
B) time (T is less than
2), time (T
2) be make wafer be separated the time used by the first scheduled volume with workbench when having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) make wafer be separated the time used by the second scheduled volume with substrate when being and having there is no plasma after applied voltage has applied; And, be
Ii) time (t used is switched between the first polarity and the second polarity
s) be less than time (T
1) and be less than 2 seconds.
According to a third aspect of the invention we, there is provided a kind of be applicable to by the method recording medium used according to the control system of plasma processing equipment of the present invention generating and storing instruction, this method comprises: the corresponding switched voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with the polarity contrary with the electrode of respective below, induced polarization electric charge in the wafer, thus, for electrostatically by wafer grip in this substrate; And, at the scheduled time (t
on) after, make the polarity inversion of voltage, make polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each first polarity and the second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in the wafer, after making to cancel and grasping voltage, there is required pressure, keep wafer at least 2 second,
B) time (T is less than
2), time (T
2) be make wafer be separated the time used by the first scheduled volume with workbench when having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) make wafer be separated the time used by the second scheduled volume with substrate when being and having there is no plasma after applied voltage has applied; And, be
Ii) time (t used is switched between the first polarity and the second polarity
s) be less than time (T
1) and be less than 2 seconds.
Present inventor has carried out probe research to process involved by charge migration, and find to realize more efficiently voltage switching process, this voltage switching process can be prespecified, further, make use of in wafer and directly from plasma enter the charge migration effect at interface between wafer and workbench.
Relatively, attentiveness is seldom placed on the management of interface mobile charge between the surface of electrostatic catching plate (workbench) and wafer backside by this area.The present invention utilizes these electric charges to grasp effect with what maintain wafer during switching in polarity.Inventor finds, grasp voltage reversal by what periodically make staggered electrostatic grasping device, will be able to insulate wafer stable grasp during plasma process.By every 2 ~ 300 second reversal voltage, grasping force can maintain more than one hour, is longer than the actual process time adopted.During voltage reversal, need not reduce dorsal part cooling pressure: inventor finds, the helium leakage flow from wafer backside increases instantaneously and reaches 5%, but wafer can not break away.It is believed that fringe region has the CHARGE DISTRIBUTION different from central authorities because the electric charge from plasma permeates, the electric field between catching plate surface (workbench) and wafer is crossed whole region and is not switched equably.During reversal voltage, because move from a position to the surface charge of another location, always some region has grasping force.Switching time, the migration velocity of interface mobile charge was depended at interval.Electrostatic catching plate only needs a power supply, can relative to ground connection, or plus or minus ground drives every side of two staggered electrodes.Do not require that the independence of multi-region controls, but this technology can be applicable to this design equally.
Be used to provide the gas normally inert gas of back side pressure, such as helium.
Several time constant is depended in minimum interval necessary between voltage switching event, before ESC being used for particular plasma processing, measures each time constant.These time constants are:
T
1: produce enough polarization charge required times in wafer, after making to cancel and grasping voltage, there is required (dorsal part) pressure, keep wafer at least 2 second.
T
2: when using burning voltage, having plasma, grasp and lose the time (feature of edge charges migration) used.
T
3: after applying ESC voltage, when there is no a plasma, grasp and lose the time (feature around the charge migration in the ESC dielectric of ESC electrode) used.
In every case, by making the corresponding increase of backside gas flow to maintain uniform pressure, determine to be caused losing the effect of grasping by the first scheduled volume and the second scheduled volume.This can be gradually, represents to grasp slowly to lose, and in this case, will grasp the increase losing and be defined as certain percentage in gas flow, such as, 20 ~ 25% increase.This also can be very unexpected, represents to grasp to lose completely (" breaking away " event).
T
1determine as follows:
1. grasp wafer when there is no plasma with burning voltage, and set up (dorsal part) gas pressure, be suitable within the scope of 5 ~ 15Torr, there is low helium leakage flow (being suitable for being less than 2sccm).
2., after a time interval, voltage zeroing will be grasped, and, within next minute, observe gas leakage flow.
3. changing the time interval repeats to grasp event, and minimumly grasp voltage on-time until establish, now, after removing grasps voltage, in 2 seconds, gas flow increase is no more than 20%.That define and there is enough polarization charges in the wafer with the time keeping wafer used during voltage switching.The period grasped when there being plasma between period voltage reversal event is equal to or greater than this time interval.
T
2determine as follows, test and enter wafer about because of plasma charge migration
-workbench interface and cause without grasping the time used:
1. grasp wafer when burning voltage and plasma bombardment.Record grasps and loses the time used.
2. with the polarity retest of reversion.Writing time again.
3. select switching time to be used, make it be less than junior (T in two time
2).
T is determined in the following manner in a particular example
3: when plasma, with the gas of such as 10Torr (dorsal part) pressure, apply stable to grasp voltage; And gas-monitoring flow, until wafer is separated with workbench, namely, helium gas flow reaches maximum when not having wafer.
In inventor so far state after tested, T
1can be the several seconds, T
2can in the scope of 5 seconds to 10 minutes, and, T
3can one hour be greater than.
During grasping, the period (t between voltage reversal event is carried out when there being plasma to use
on), this period is less than because plasma charge moves and loses the time (T grasped
2) or lose because of charge migration in ESC dielectric the time (T grasped
3), and be greater than the time (T setting up wafer polarization charge
1).
Compared to the such as people such as Kellerman method (US 6,947,274) disclosed in the wafer attack time or wafer escape the time, in the present invention, become another polarity time used (voltage reversal time t from a polarity transformation
s) longer.Switching time, interval was also obviously longer than disclosed in the alternating voltage method (US5,103,167) of the people such as Kellerman or Horwitz and Boronkay, and thus, in the method for the invention, the most of the time has and lasting grasps voltage.Voltage reversal time t
st should be shorter than
1or T
2, and, the suitable shorter one be significantly shorter than in both.
When etching the non-insulated layer on insulation wafer, inventor finds, can use burning voltage, until this layer has almost been etched to, then, needs to use voltage reversal.Helium leakage amount from wafer backside can indicate as the sensitivity of transition point, because it rises along with the elimination of non-insulated layer reach 10%.Also optical technology can be used as instruction, such as optical emission spectroscopy, reflectrometry, spectral reflectivity or interferometry.If do not adopt voltage reversal, even if back side pressure relatively low (< 400Pa), substrate also can break away.
Voltage can switch by regular fashion, and this is dispensable, and in fact, two kinds of polarity are without the need to applying equal time, although this is preferred actually.
It is known that due to the rectification characteristic (rectifying nature) of plasma, wafer surface can obtain DC offset voltage.The existing means of carrying out this measuring or estimating are, such as, use continuity test wafer, like this, can be biased ESC voltage with close to amount from ground connection.
Inventor has also found to grasp some advantages for the wafer that insulate in conjunction with mechanical grip with in conjunction with electrostatic.Increase backside gas pressure within the scope of mechanical grip permission 1000 ~ 2000 handkerchiefs is for increasing heat transfer, and electrostatic grasping force is tending towards making the smooth subsides workbench of wafer.This makes gap under wafer more even, and on the region making to cross wafer, heat transfer is more even.
By using edge ring alternatively at wafer periphery, enhance the important function of in wafer-catching plate interface surface charge migration, desirably, edge ring protrudes from the distance reaching 0.5 ~ 3 millimeter on wafer surface.When using this ring, the time between handover event can extend, and proves to introduce at least some electric charge at Waffer edge.
Method as described herein also can be applied to the equivalent ESC design that can keep multiple wafer.
Accompanying drawing explanation
Below, with reference to accompanying drawing, some examples according to plasma processing equipment of the present invention and method are described, in accompanying drawing:
Fig. 1 comprises the schematic diagram that electrostatic grasps the plasma processing equipment of workbench;
Fig. 2 more specifically illustrates the structure that electrostatic grasps workbench;
Fig. 3 A diagram typically applies voltage waveform;
Fig. 3 B and Fig. 3 C diagram is applied to the first example of a pair voltage waveform of each group of electrode, illustrates that the electrostatic be varied to for plasma direct current biasing during compensation plasma body is connected grasps voltage;
Fig. 3 D diagram is applied to the second example of a pair voltage waveform of each group of electrode, and it has additional phase shift, makes a voltage relative to the transformation delay of another voltage;
Fig. 4 to Fig. 8 is the schematic diagram of the ESC (electrostatic grasping device) of supporting wafers, and illustrates that the typical case of different phase grasps the position, place of electric charge in the course of processing;
Helium flow velocity in time during Fig. 9 and Figure 10 is shown in the judgement expecting voltage waveform;
Figure 11 to Figure 14 graph mode diagram prior art problem and according to example of the present invention grasp period air-flow and temperature over time; And
Figure 15 and Figure 16 is the figure being similar to Fig. 2, and diagram comprises two examples of the plasma processing equipment of edge ring.
Embodiment
Fig. 1 illustrates the main composition parts of plasma processing chamber 1, comprises airtight housing 2, in airtight housing 2, install processing work platform 3.Gas is supplied by the upper wall 4 of housing 2, and via to connect with power supply 6 and induction coil 5 around housing 2 top is transformed into plasma.
Via the opening 7 in housing 2 lower wall, under pumping action, extract plasma gas out.
Processing work platform 3 is connected with radio frequency (RF) power supply 8 being generally 13.56MHz, and is provided with ESC (electrostatic grasping device) and grasps voltage and for wafer backside heat conducting feedback gas (not shown in Fig. 1, but hereafter describe).
Power supply 6,8 is connected with control system 10.
In using, wafer (not shown) is placed on processing work platform 3.
Processing gas flows through plasma source, carries out ionizing and dissociation at this place, and via with the contact wafers on processing work platform 3 and by arriving outlet 7.Usually with the RF power drives processing work platform of 13.56MHz, and provide ESC (electrostatic grasping device) and grasp voltage and for the heat conducting feedback gas of wafer backside.
Fig. 2 specifically illustrates ESC (electrostatic grasping device) processing work platform 3.This processing work platform comprises conventional RF and drives workbench 20, and this workbench 20 is with setting formula cooling duct 22 and upside dielectric insulation layer 24.Usually be made up of aluminium oxide, quartz, polyimides or similar material for this layer.Two groups of staggered electrodes 26,28 are embedded in layer 24 and (only illustrate and marked some electrodes 26,28).
Dielectric wafer 30 is illustrated on insulating barrier 24, and this dielectric wafer 30 is placed on this layer by retractible lift pin (not shown).By the insulating material of layer 24, electrode 26,28 and wafer 30 are insulated, layer 24 also makes electrode and lower floor's substrate 20 insulate.ESC electrode 26,28 is connected with one or more power supply 34,32 via supply lead (being shown in broken lines), and power supply is controlled successively by control system 10 (Fig. 1).There is the ESC electrode group 26,28 that two independently-powered, there is adjacent conductive path, be normally in opposite potential or polarity.But also can select single power supply, wherein arbitrary terminal just can be relative to ground connection or be negative.
By maintain wafer backside pressure helium via supply pipe 23 for the region entered between wafer 30 and layer 24, supply pipe 23 extends through workbench 20 and layer 24.
In using, a voltage is applied to one group of interconnect electrode, such as electrode 26, and reverses (between+V and-V) with making the polar cycle of this voltage, as shown in fig. 3.Meanwhile, another voltage is applied to another group interconnect electrode, such as electrode 28.The voltage putting on each electrode 28 has identical amplitude usually relative to each electrode 26, but is in contrary polarity.Conveniently discuss, the time-labeling applying steady-state voltage is t
on, and the time-labeling switching to another polarity from a kind of polarity is t
s.
The concrete example putting on a pair opposite voltage waveform of each group of electrode 26,28 is shown in Fig. 3 B and Fig. 3 C.As can be seen, voltage strictly in phase place, but changes in the opposite direction between+3000 volts and-3000 volts.The compensation for direct current biasing during plasma is connected is also show in figure.
When voltage is initially applied to (Fig. 4) between adjacent electrode 26,28, electrode 26 is in positive potential+V, and electrode 28 is in negative potential-V, in the lower surface of wafer 30, occur polarization charge, positive surface charge is close to negative ESC electrode 28, and vice versa.Form grasping force thus.Setting up this time initially grasped is several seconds level, is determined by the character of base material.
Through the time interval usually within the scope of 10 ~ 100 seconds, electric charge starts to migrate to interface (Fig. 5) between wafer 30 and ESC 24 from plasma.Cation can be pulled to the ESC electrode 28 more in negative potential, and electronics is pulled to the electrode 26 more in positive potential.The electric charge of infiltration can be predicted more easily for holding runny electronics (e
-), and accompanying drawing is that the drafting that is dominant of hypothesis electron-osmosis forms.This argument is applicable to arbitrary polarity here.These infiltration electric charges are tending towards sheltering (screen) ESC electric field, make it no longer in wafer 30, produce polarization charge, and if there is enough sheltering, cause and lose the effect of grasping.
At the moment (t of voltage reversal
s, and shown in Fig. 6, be the moment of zero at voltage), during switching, polarization charge keeps their position at least in part with infiltration edge charges.Fringe region grasps inoperative for maintenance, and the grasping force in middle section roughly maintains, this is because wafer polarization is delayed the change of setting electrode band electricity condition.
When ESC polarity is reversed completely (Fig. 7), about grasping force, the rolereversal of edge and middle section.At middle section, residual polarization charge is tending towards the effect weakening local ESC electrode, and grasping force is reduced at this place.But in edge, infiltration electric charge is tending towards strengthening ESC (electrostatic grasping device) voltage, promotes in the wafer to form polarization charge, and be tending towards accelerating to set up grasping force at this place.
After more time (Fig. 8), edge penetration electric charge is evicted from by the ESC polarity changed, and, make polarization reversal in central authorities, set up and be similar to the state after initially grasping state, but there is the polarity of reversion.
Reversed polarity needs to carry out in edge charges infiltration or before continuing that a large amount of both charge migrations are one of any to cause losing the effect of grasping, and, carry out to maintain enough grasping force when temporarily removing at ESC (electrostatic grasping device) voltage after there is the polarization of enough wafers.The increase of dorsal part helium leakage can be utilized to identify as signal and to need switch polarity.Compared to one shorter in the time constant of edge charges or the time constant of wafer polarization characteristic, the duration of polarity inversion must be shorter.
Give above-mentioned discussion, still will determine the form of voltage waveform.In fact, this utilizes testing wafer to determine, obtain about t
onand t
svalue stored by control system, then, control system can control voltage source to produce required waveform.
Determining T1, T as defined above
2and T
3afterwards, t is set
sand t
on.
In order to determine T
1, in an advantageous embodiment, perform the following step:
1., when there is no plasma, grasp wafer with burning voltage, and, set up the pressure in 5 ~ 15 holder (Torr) scopes, be typically back side pressure, there is lower helium leakage flow (lower than 2sccm).
2., after a time interval, voltage zeroing will be grasped, and within next minute, observe helium leakage flow.
3. changing the time interval repeats to grasp event, until determine minimumly to grasp voltage on-time (on time), now, after removing grasps voltage, in 2 seconds, helium gas flow increase is no more than 20%.That define and make in wafer, to there is enough polarization charges (to keep wafer during voltage switching) time used.When grasping in the case that plasma is used, the period between voltage reversal event is equal to or greater than this time interval.
This illustrates in Fig. 10, wherein, applies stable grasp voltage 5 second, then, will grasp voltage and return to zero (in Figure 10, the time is zero place) when not having a plasma.The effect of grasping is lost in two seconds.
In order to determine time T
2, in an advantageous embodiment, carry out the following step:
1. grasp wafer when burning voltage and plasma bombardment.Observe helium gas flow, until it sharply raises (represent and lose the effect of grasping completely) or flow increases above 20% (expression part loses the effect of grasping): writing time.
2. with the polarity retest of reversion.Writing time again.They can be different, because the electrode of electrostatic grasping device can have such polarity in the different piece of edge, it is tending towards the more runny electric charge attracting or repel interface infiltration.
3. select the switching time being applicable to using, make it be less than junior in two kinds of time.
This illustrates in fig .9, and it is about argon plasma (50sccm Ar, 3mTorr, 2000W ICP, 100W RIE).Helium pressure 10Torr.Flow added 25% in 200 seconds in the case.
In order to determine T
3, when there is no plasma, apply stable grasp voltage one hour with the helium backside pressure of 10Torr.Do not observe helium gas flow generation significant change, represent T in the case
3be greater than one hour, and the charge migration in this case in ESC does not limit switching time.
In this particular example, the time (t between voltage switching
on) should T be less than
2, it is less than 200 seconds (part grasping effect loses), and is suitable for being less than 40 seconds (20% of this time), but is greater than 5 seconds (T
1, set up the time of polarization charge).In the case, edge charges transit time constant is than short about losing because of a large amount of charge migration horizontal in insulator the time constant (> 1 hour) grasped.
Time (the t switched between a kind of polarity and another polarity
s) 2 seconds should be less than (losing wafer polarization charge), and be suitable for being less than 0.4 second (20% of this time).In the case, edge charges migration has longer time constant, and the period of not deboost reversion.
Have been found that in some cases, if there is limited charge leakage at Waffer edge place, use as shown in fig. 3 b and fig. 3 c very exactly one change a pair voltage waveform time, may the problem of serving be with.In order to alleviate this problem, the present invention proposes the waveform pair using a kind of amendment, wherein between two waveforms, introduces phase shift.The example of this situation shown in Fig. 3 D.The favourable part of this scheme is, when a passage bridge, another passage does not switch, and thus, during handoff procedure, there is one pole grasping force.The phase shift being longer than switching time is suitable.Such as, in the complete period of 20 seconds, be wherein less than 0.5 second switching time, use the phase shift of 3 seconds.
By at least suitable arranging edge ring for sheltering processing work platform 20 in order to avoid plasma damage around wafer around workbench, especially time expand T2 can be changed.Two examples of these edge ring are shown in Figure 15 and Figure 16 respectively.In fig .15, edge ring 40 extends around insulating barrier 24 and in the groove portion 41 of workbench 20, and has upper surface 42, and this upper surface 42 flushes with the upper surface 43 of insulating barrier 24.Edge ring 40 fits in around insulating barrier 24, and wafer 30 extends across the top of a part for edge ring 40.
In example illustrated in fig. 16, arrange edge ring 42, it has the pressed on ring section 46 protruded from wafer 30 level, and desirably bulge quantity is the scope of 0.5 ~ 3 millimeter.Compared to the mode shown in Figure 15, this form of edge ring gets time extension T
2reach four times.Edge ring decreases entering of Waffer edge place electric charge.
In fact temporal prolongation must balance each other with the uniformity etched Waffer edge, because excessive edge ring height suppresses the etching speed at Waffer edge place.
Edge ring can be conduction or dielectric.
Figure 11 is a kind of curve, uses the problem of prior art under 10Torr He back side pressure is shown.
Initially, higher helium gas flow is seen in the beginning section of processing.This is owing to filling volume below processing work platform (for holding wafer lift mechanism).This and wafer grip have nothing to do.After initial helium gas flow peak value, reach stable state, grasp during this period and meet the requirements.After entering stable state a period of time, helium gas flow starts to increase.This time is defined as the helium leakage time in fig. 11.Afterwards at about 250 seconds, wafer will finally break away.
By utilizing method of the present invention, the operation grasping to keep wafer to carry out a few hours successfully can be carried out.Figure 12 illustrates under 10Torr back side pressure for the helium gas flow of sapphire wafer processing in 30 minutes and the curve of pressure.
In addition, 750 wafers are carried out marathon running 60RF (radio frequency) hour, test the reliability grasped.To depict the average helium gas flow of each wafer at the sample of marathon test period collection in Figure 13.
Can find out, whole test period, helium gas flow maintains well lower than 2sccm.
Figure 14 illustrates the datagram of sapphire wafer temperature as function process time.Can find out, after reaching stable state, the temperature difference between wafer and ESC (electrostatic grasping device) roughly keeps constant.
Claims (18)
1. one kind during plasma process for electrostatically by the method for dielectric wafer grip in processing work platform, described workbench has the staggered electrode be embedded at wherein, described method comprises, the relevant voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with the polar inductive polarization charge contrary with corresponding lower electrode in described wafer, thus, for electrostatically by described wafer grip in described workbench; And, at the scheduled time (t
on) after, by the polarity inversion of described voltage, make described polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each described first polarity and described second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in described wafer, after making to cancel and grasping voltage, there is required pressure, keep described wafer at least 2 second,
B) time (T is less than
2), time (T
2) make described wafer be separated the time used by the first scheduled volume with described workbench when being and having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) be after applied voltage has applied, when there is no plasma, make described wafer be separated the time used by the second scheduled volume with described substrate; And, be
Ii) time (t used is switched between described first polarity and described second polarity
s) be less than described time (T
1) and be less than 2 seconds.
2. method according to claim 1, wherein, described first scheduled volume is roughly the same with described second scheduled volume.
3. according to method according to claim 1 or claim 2, wherein, determine described time T by the test on testing wafer
2with time T
3.
4. the method any one of aforementioned claim described in claim, wherein, by under a constant by between workbench described in gas inject and described wafer or testing wafer, determine described first scheduled volume and described second scheduled volume, described first scheduled volume and described second scheduled volume correspond to gas flow by the state that corresponding scheduled volume increases, such as, increase 20 ~ 25%.
5. method according to claim 4, wherein, carries out the initial condition that gas flow compares and comprises the gas pressure within the scope of 5 ~ 15Torr and be less than the gas flow of 2SCCM.
6. according to claim 4 or method according to claim 5, wherein, described gas comprises helium.
7. the method any one of aforementioned claim described in claim, wherein, described time (T
1) determined by following step:
I. wafer is grasped when not having plasma with burning voltage, and, set up (dorsal part) gas pressure, be suitable within the scope of 5 ~ 15Torr, there is lower gas leakage flow (being suitable for being less than 2sccm),
Ii., after a time interval, grasp voltage zeroing by described, and within next minute, observe described gas leakage flow,
Iii. change the described time interval, repeat to grasp, minimumly grasp voltage on-time until establish, with this time, after grasping voltage described in removing, in 2 seconds, described gas flow increase is no more than 20%.
8. the method any one of aforementioned claim described in claim, wherein, determines described time (T by following step
2):
I) under burning voltage, described wafer or testing wafer is grasped, bombardment plasma, and, record described wafer and separate the very first time used with described first scheduled volume with described substrate;
Ii) step I is repeated), but adopt the voltage of reversed polarity, and record makes described wafer separate the second time used with described first scheduled volume and described substrate; And
Iii) select in the described very first time and described second time less one as T
2.
9. the method any one of aforementioned claim described in claim, wherein, determines described time (T by following step
3): when there is no plasma, with the gas of such as 10Torr (dorsal part) pressure, apply stable to grasp voltage, and gas-monitoring flow is until described wafer separates with described workbench.
10. the method any one of aforementioned claim described in claim, wherein, has phase shift, makes the polarity inversion of described voltage.
11. methods any one of aforementioned claim described in claim, wherein, the base material of described wafer comprises sapphire, quartz, glass or carborundum.
12. methods any one of aforementioned claim described in claim, wherein, described wafer comprises the non-insulated layer be positioned in dielectric base.
13. methods any one of aforementioned claim described in claim, are included in described wafer periphery further and arrange edge ring, and described edge ring is suitable to be protruded from described wafer surface.
14. methods any one of aforementioned claim described in claim, comprise further, determine or estimate the DC offset voltage obtained by described wafer, and, by described bias voltage, the described voltage being applied to described electrode is biased by ground connection.
15. 1 kinds of plasma processing equipments, comprising: plasma generation chamber, are provided with processing work platform therein, and this processing work platform has embedded staggered electrode, and, in use by dielectric wafer arrangement on this processing work platform; Voltage source, it is connected with described staggered electrode; And control system, by programming to control described voltage source, so that the relevant voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with each contrary with lower electrode polar inductive polarization charge in described wafer, thus for electrostatically by described wafer grip in described workbench, and, at the scheduled time (t
on) after, make the polarity inversion of described voltage, thus described polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each described first polarity and described second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in described wafer, after making to cancel and grasping voltage, there is required pressure, keep described wafer at least 2 second,
B) time (T is less than
2), time (T
2) be make described wafer be separated the time used by the first scheduled volume with described workbench when having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) be after applied voltage has applied, when there is no plasma, make described wafer be separated the time used by the second scheduled volume with described substrate; And, be
Ii) time (t used is switched between described first polarity and described second polarity
s) be less than described time (T
1) and be less than 2 seconds.
16. equipment according to claim 15 are suitable for enforcement of rights and require method described in claim any one of 1 to claim 14.
17. 1 kinds are being applicable to by the method recording medium used according to the control system of claim 15 or plasma processing equipment according to claim 16 generating and storing instruction, described method comprises the relevant voltage with the first contrary polarity and the second polarity is put on adjacent electrode, wherein, with the polar inductive polarization charge contrary with the electrode of corresponding below in described wafer, thus, for electrostatically by described wafer grip in described workbench; And, at the scheduled time (t
on) after, the polarity of the described voltage that reverses, makes described polarization charge and electrostatic grasp effect lasts, it is characterized in that:
I) (t turn-on time of each described first polarity and described second polarity
on) be chosen as in advance
A) time (T is greater than
1), seeking time (T
1) to produce enough polarization charges in described wafer, after making to cancel and grasping voltage, there is required pressure, keep described wafer at least 2 second,
B) time (T is less than
2), time (T
2) be make described wafer be separated the time used by the first scheduled volume with described workbench when having burning voltage and plasma, and
C) time (T is less than
3), time (T
3) be after applied voltage has applied, when plasma, make described wafer be separated the time used by the second scheduled volume with described substrate; And, be
Ii) time (t used is switched between described first polarity and described second polarity
s) be less than described time (T
1) and be less than 2 seconds.
18. 1 kinds store by the recording medium of the instruction generated according to method described in claim 17.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB1321463.0A GB201321463D0 (en) | 2013-12-05 | 2013-12-05 | Electrostatic clamping method and apparatus |
| GB1321463.0 | 2013-12-05 |
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| Publication Number | Publication Date |
|---|---|
| CN104701232A true CN104701232A (en) | 2015-06-10 |
| CN104701232B CN104701232B (en) | 2019-02-22 |
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|---|---|---|---|
| CN201410737866.0A Active CN104701232B (en) | 2013-12-05 | 2014-12-05 | Electrostatic grasps method and apparatus |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9793149B2 (en) |
| EP (1) | EP2881981B1 (en) |
| JP (1) | JP6476489B2 (en) |
| KR (1) | KR102237301B1 (en) |
| CN (1) | CN104701232B (en) |
| GB (1) | GB201321463D0 (en) |
| TW (1) | TWI632638B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB201321463D0 (en) * | 2013-12-05 | 2014-01-22 | Oxford Instr Nanotechnology Tools Ltd | Electrostatic clamping method and apparatus |
| JP6861579B2 (en) * | 2017-06-02 | 2021-04-21 | 東京エレクトロン株式会社 | Plasma processing equipment, electrostatic adsorption method and electrostatic adsorption program |
| CN111954852A (en) * | 2018-04-12 | 2020-11-17 | Asml荷兰有限公司 | Apparatus comprising an electrostatic chuck and method for operating the apparatus |
| US20200048770A1 (en) * | 2018-08-07 | 2020-02-13 | Lam Research Corporation | Chemical vapor deposition tool for preventing or suppressing arcing |
| US11875967B2 (en) | 2020-05-21 | 2024-01-16 | Applied Materials, Inc. | System apparatus and method for enhancing electrical clamping of substrates using photo-illumination |
| GB202219448D0 (en) * | 2022-12-21 | 2023-02-01 | Spts Technologies Ltd | Method and apparatus for plasma etching dielectric substrates |
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Also Published As
| Publication number | Publication date |
|---|---|
| TWI632638B (en) | 2018-08-11 |
| JP6476489B2 (en) | 2019-03-06 |
| CN104701232B (en) | 2019-02-22 |
| KR102237301B1 (en) | 2021-04-06 |
| EP2881981B1 (en) | 2020-02-19 |
| EP2881981A1 (en) | 2015-06-10 |
| US9793149B2 (en) | 2017-10-17 |
| KR20150065616A (en) | 2015-06-15 |
| US20150162234A1 (en) | 2015-06-11 |
| GB201321463D0 (en) | 2014-01-22 |
| TW201537671A (en) | 2015-10-01 |
| JP2015122491A (en) | 2015-07-02 |
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