CN104701155A - Gate oxide layer manufacturing method - Google Patents
Gate oxide layer manufacturing method Download PDFInfo
- Publication number
- CN104701155A CN104701155A CN201310660778.0A CN201310660778A CN104701155A CN 104701155 A CN104701155 A CN 104701155A CN 201310660778 A CN201310660778 A CN 201310660778A CN 104701155 A CN104701155 A CN 104701155A
- Authority
- CN
- China
- Prior art keywords
- gate oxide
- oxide layer
- manufacture method
- thickness
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
The invention provides a gate oxide layer manufacturing method. The gate oxide layer manufacturing method includes: placing a semiconductor substrate with a groove into a furnace tube and feeding oxygen into the furnace tube to form a first gate oxide layer on the sidewall and at the bottom of the groove; feeding nitrogen into the furnace tube and heating the furnace tube; feeding the oxygen and catalyzing gas into the furnace tube to form a second gate oxide layer on the first gate oxide layer. The thickness of the first gate oxide layer on the sidewall of the groove is larger than that of the same at the bottom of the groove, due to influences of the catalyzing gas and the formed first gate oxide layer, the thickness of the second gate oxide layer on the sidewall of the groove is smaller than that of the same at the bottom of the groove, and the second gate oxide layer is formed on the first gate oxide layer, so that the thickness difference between the sidewall and the bottom of the groove is reduced, evenness of the gate oxide layers is improved, and reliability of a device is improved.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly a kind of manufacture method of gate oxide.
Background technology
The manufacturing process of gate oxide is the key technology in semiconductor fabrication process, directly affects and determine electrology characteristic and the reliability of device.
The manufacture craft of traditional gate oxide adopts thermal oxidation method, and in high temperature environments, Semiconductor substrate exposed in an oxygen-containing environment, the surface of described Semiconductor substrate forms gate oxide, and described technique realizes in boiler tube.But, if need to grow gate oxide in groove after etching, such as groove power device, need in high temperature environments, to expose in an oxygen-containing environment containing fluted Semiconductor substrate, pass into nitrogen simultaneously, ensure that boiler tube has stable air-flow and Temperature Distribution, thus form gate oxide on the sidewalls and base of the trench.
The manufacture method of traditional gate oxide mainly comprises two stages: (1) temperature rise period, will put into boiler tube, and pass into nitrogen containing fluted Semiconductor substrate, raises the temperature of boiler tube; (2) oxidation stage: pass into oxygen, generates gate oxide at the sidewall of groove and bottom, this phase lasts pass into nitrogen; Then, reduce the temperature of boiler tube, Semiconductor substrate is exited boiler tube.
The silicon atom density had on the crystal face of <100> lattice due to Semiconductor substrate is minimum, oxidation rate is also the slowest, after this substrate etches groove, the atomic density of sidewall can be greater than substrate surface and channel bottom, up to standard in order to ensure the puncture voltage of gate oxide, needs to use higher temperature to be oxidized, and the intensification of boiler tube is slower, in the process heated up, in order to prevent silicon chip nitrogenize, more a small amount of oxygen must be passed into; When oxygen is passed into, due to large bottom the silicon atom density ratio of trenched side-wall, the oxidation rate of sidewall is higher than the oxidation rate of bottom, therefore a small amount of oxygen is nearly all consumed on sidewall, the oxidation rate of bottom can be slowly, finally cause the thickness of the gate oxide of trenched side-wall to be greater than the thickness of the gate oxide of channel bottom, thus affect the uniformity of gate oxide.
Be greater than a depth-to-width ratio growth carrying out gate oxide in the groove of 2:1, adopt the gate oxide that the manufacture method of traditional gate oxide generates, the difference of trenched side-wall thickness and bottom thickness is higher than 49%.
But, along with the develop rapidly of semiconductor fabrication, in order to reach arithmetic speed, larger memory data output and more function faster, semiconductor chip is towards higher device density, high integration future development, therefore, the size of semiconductor device also reduces thereupon.Wherein, dimensions of semiconductor devices is in the process reduced, and the thickness of its gate oxide comprised is also constantly thinning, and therefore, the requirement for the uniformity of gate oxide thickness is more and more stricter.The gate oxide formed in groove, sidewall and bottom difference impact the cut-in voltage of semiconductor device and operating voltage compared with conference, and then affect the reliability of device.
Therefore, how to reduce the difference in thickness of the gate oxide of sidewall and bottom in groove, become the current technical problem needing solution badly.
Summary of the invention
The invention provides a kind of manufacture method of gate oxide, when forming gate oxide to solve in prior art, the problem that the difference in thickness of trenched side-wall and bottom is larger.
The manufacture method of gate oxide provided by the invention, comprising:
Semiconductor substrate is provided, described Semiconductor substrate is formed with groove;
Described Semiconductor substrate is put into boiler tube, passes into oxygen, in sidewall and the bottom formation first grid oxide layer of described groove;
In boiler tube, pass into nitrogen, and raise the temperature of boiler tube;
In boiler tube, pass into oxygen and catalytic gas, first grid oxide layer is formed second gate oxide layer.
Further, the thickness of described first grid oxide layer is
Further, the furnace tube temperature forming first grid oxide layer is 800 DEG C ~ 850 DEG C.
Further, the flow forming the oxygen of first grid oxide layer is more than or equal to 10 Liter Per Minutes.
Further, pass in the step of nitrogen in boiler tube, the final temperature of described boiler tube is 1000 DEG C ~ 1100 DEG C.
Further, described catalytic gas is chlorine-containing gas.
Further, described chlorine-containing gas is hydrogen chloride and/or C
2h
4cl
2.
Further, the flow of described chlorine-containing gas is 0.2 Liter Per Minute ~ 0.8 Liter Per Minute.
Further, the flow forming the oxygen of second gate oxide layer is more than or equal to 10 Liter Per Minutes.
Further, the thickness sum of described first grid oxide layer and second gate oxide layer is greater than
Further, the difference of the thickness of described trenched side-wall and the thickness of channel bottom is less than 30%.
Further, the depth-to-width ratio of described groove is greater than 2:1.
Further, etch described Semiconductor substrate and form groove, the one side be etched is <100> lattice.
Compared with prior art, the present invention has the following advantages:
In sum, the manufacture method of gate oxide provided by the invention, the generation of gate oxide is divided into three main steps, under the normal temperature of boiler tube, first pass into oxygen form first grid oxide layer, then pass into nitrogen and carry out boiler tube intensification, finally pass into oxygen and catalytic gas forms second gate oxide layer in described first grid oxide layer, first grid oxide layer is greater than the thickness of channel bottom at the thickness of trenched side-wall, second gate oxide layer is because the impact of first grid oxide layer having catalytic gas and formed before, it is less than the thickness of channel bottom at the thickness of trenched side-wall, second gate oxide layer is formed on first grid oxide layer, reach the problem reducing trenched side-wall and bottom thickness difference, improve the uniformity of grid oxic horizon, thus improve the reliability of device.
Accompanying drawing explanation
The schematic flow sheet of the manufacture method of the gate oxide that Fig. 1 provides for one embodiment of the invention.
Embodiment
Be described in further details below in conjunction with the manufacture method of the drawings and specific embodiments to the gate oxide that the present invention proposes.According to the following describes and claims, advantages and features of the invention will be clearer, it should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only for object that is convenient, the aid illustration embodiment of the present invention lucidly.
The schematic flow sheet of the manufacture method of the gate oxide that Fig. 1 provides for one embodiment of the invention, as shown in Figure 1, the manufacture method of a kind of gate oxide that the present invention proposes, comprises the following steps:
Step S01: provide Semiconductor substrate, described Semiconductor substrate is formed with groove;
Step S02: described Semiconductor substrate is put into boiler tube, passes into oxygen, in sidewall and the bottom formation first grid oxide layer of described groove;
Step S03: pass into nitrogen in boiler tube, and raise the temperature of boiler tube;
Step S04: pass into oxygen and catalytic gas in boiler tube, first grid oxide layer is formed second gate oxide layer.
Below describe the manufacture method of the gate oxide that the present invention proposes in detail:
In step S01, provide Semiconductor substrate, adopt exposure to form groove on the semiconductor substrate with the method for etching.In the present embodiment, the depth-to-width ratio of described groove is greater than 2:1, the manufacture method of gate oxide provided by the present invention compares the groove being applicable to depth-to-width ratio and being greater than 2:1, it should be noted that, also may be used for the gate oxide that manufacture depth-to-width ratio is less than the groove of 2:1, when but the depth-to-width ratio of groove is smaller, use the manufacture method of traditional gate oxide just can arrive technological requirement; Described Semiconductor substrate is etched and forms the one side of groove is <100> lattice.
In step S02, described Semiconductor substrate being put into boiler tube, now keep the temperature of boiler tube to remain on low-temperature condition, is 800 DEG C ~ 850 DEG C, and such as 800 DEG C, 810 DEG C, 820 DEG C, 830 DEG C, 840 DEG C, 850 DEG C, preferably furnace tube temperature is 830 DEG C.In boiler tube, pass into oxygen, the flow of oxygen is more than or equal to 10 Liter Per Minutes, such as 10 Liter Per Minutes, 20 Liter Per Minutes, 30 Liter Per Minutes, and preferably oxygen flow is 10 Liter Per Minutes.First grid oxide layer is formed at the sidewall of described Semiconductor substrate groove and bottom by oxidation reaction.
Because the temperature of boiler tube is lower, the speed of oxidation is slow, uses air flow can ensure that channel bottom also can obtain sufficient oxygen, avoids the problem pockety of oxygen in prior art, and the thickness of the first grid oxide layer that this stage generates is
such as
preferably the thickness of first grid oxide layer is
it should be noted that, although ensure that channel bottom has sufficient oxygen, but because described Semiconductor substrate uses <100> lattice, therefore the silicon atom density of described channel bottom can be lower than the silicon atom density of trenched side-wall, the speed of oxidation is slow, the thickness of the described first grid oxide layer therefore trenched side-wall formed is greater than the thickness of the described first grid oxide layer that channel bottom is formed, generally, the thickness of the Thickness Ratio channel bottom of trenched side-wall wants thick about 50%.
In step S03, in boiler tube, pass into nitrogen, and raise the temperature of boiler tube.Pass into the steady air current that nitrogen can ensure in boiler tube, make the distribution of temperature more even.In the present embodiment, the temperature of boiler tube needs to be increased to 1000 DEG C ~ 1100 DEG C, such as 1000 DEG C, 1025 DEG C, 1050 DEG C, 1075 DEG C, 1100 DEG C, and preferably furnace tube temperature is 1050 DEG C.Owing to grown first grid oxide layer on the bottom and sidewall of groove, not needing to worry that Semiconductor substrate is by high-temperature ammonolysis again, when not passing into oxygen, the temperature of boiler tube can be increased to the temperature required for next stage.
In step S04, in boiler tube, pass into oxygen and catalytic gas, first grid oxide layer is formed second gate oxide layer.Described catalytic gas is chlorine-containing gas, and in the present embodiment, chlorine-containing gas is hydrogen chloride and/or C
2h
4cl
2, also can be other catalytic gas well known by persons skilled in the art, chlorine-containing gas can promote the oxidation rate of Semiconductor substrate <100> crystal face, make the oxidation rate of described channel bottom higher than the oxidation rate of described trenched side-wall, and the thickness due to the first grid oxide layer on described trenched side-wall is greater than the thickness of the first grid oxide layer of described channel bottom, the diffusion of oxygen can be subject to the suppression of existing first grid oxide layer, therefore described in this stage, the oxidation rate of channel bottom can exceed the oxidation rate of sidewall, the thickness of the second gate oxide layer that trenched side-wall generates is less than the thickness of the upper second gate oxide layer generated in bottom.
The flow of described chlorine-containing gas is 0.2 Liter Per Minute ~ 0.8 Liter Per Minute, such as 0.2 Liter Per Minute, 0.4 Liter Per Minute, 0.6 Liter Per Minute, 0.8 Liter Per Minute, and preferably the flow of chlorine-containing gas is 0.4 Liter Per Minute; The flow of described oxygen is not less than 10 Liter Per Minutes, such as 10 Liter Per Minutes, 20 Liter Per Minutes, 30 Liter Per Minutes, and preferably the flow of oxygen is 10 Liter Per Minutes.The flow of described oxygen is more than or equal to 10 Liter Per Minutes, such as 10 Liter Per Minutes, 20 Liter Per Minutes, 30 Liter Per Minutes, and preferably oxygen flow is 10 Liter Per Minutes.
In the present embodiment, the thickness sum of described first grid oxide layer and described second gate oxide layer is greater than 400
now the difference in thickness of described trenched side-wall and bottom is less than 30%, such as, in the thickness sum of described first grid oxide layer and second gate oxide layer be
when, the difference in thickness of described trenched side-wall and bottom is reduced to about 27%, if the thickness of the first grid oxide layer formed and second gate oxide layer increases, then the difference in thickness of trenched side-wall and bottom will reduce further.
The manufacture method of gate oxide provided by the present invention, the first grid oxide layer generated in step S02, thickness on trenched side-wall is greater than the thickness of channel bottom, the second gate oxide layer generated in step S04, due to the impact of catalytic gas and described first grid oxide layer, thickness on trenched side-wall is less than the thickness of channel bottom, although first grid oxide layer is not identical at the thickness difference of trenched side-wall and bottom with second gate oxide layer with the thickness difference of bottom at trenched side-wall, but the difference in thickness of trenched side-wall and bottom can be reduced to a certain extent.
In sum, the manufacture method of gate oxide provided by the invention, the generation of gate oxide is divided into three main steps, under the normal temperature of boiler tube, first pass into oxygen form first grid oxide layer, then pass into nitrogen and carry out boiler tube intensification, finally pass into oxygen and catalytic gas forms second gate oxide layer in described first grid oxide layer, first grid oxide layer is greater than the thickness of channel bottom at the thickness of trenched side-wall, second gate oxide layer is because the impact of first grid oxide layer having catalytic gas and formed before, it is less than the thickness of channel bottom at the thickness of trenched side-wall, second gate oxide layer is formed on first grid oxide layer, reach the problem reducing trenched side-wall and bottom thickness difference, improve the uniformity of grid oxic horizon, thus improve the reliability of device.
Foregoing description is only the description to present pre-ferred embodiments, any restriction not to the scope of the invention, and any change that the those of ordinary skill in field of the present invention does according to above-mentioned disclosure, modification, all belong to the protection range of claims.
Claims (13)
1. a manufacture method for gate oxide, is characterized in that, comprising:
Semiconductor substrate is provided, described Semiconductor substrate is formed with groove;
Described Semiconductor substrate is put into boiler tube, passes into oxygen, in sidewall and the bottom formation first grid oxide layer of described groove;
In boiler tube, pass into nitrogen, and raise the temperature of boiler tube;
In boiler tube, pass into oxygen and catalytic gas, first grid oxide layer is formed second gate oxide layer.
2. the manufacture method of gate oxide as claimed in claim 1, it is characterized in that, the thickness of described first grid oxide layer is
3. the manufacture method of gate oxide as claimed in claim 2, is characterized in that, the furnace tube temperature forming first grid oxide layer is 800 DEG C ~ 850 DEG C.
4. the manufacture method of gate oxide as claimed in claim 3, is characterized in that, the flow forming the oxygen of first grid oxide layer is more than or equal to 10 Liter Per Minutes.
5. the manufacture method of gate oxide as claimed in claim 1, it is characterized in that, pass in the step of nitrogen in boiler tube, the final temperature of described boiler tube is 1000 DEG C ~ 1100 DEG C.
6. the manufacture method of gate oxide as claimed in claim 1, it is characterized in that, described catalytic gas is chlorine-containing gas.
7. the manufacture method of gate oxide as claimed in claim 6, it is characterized in that, described chlorine-containing gas is hydrogen chloride and/or C
2h
4cl
2.
8. the manufacture method of gate oxide as claimed in claim 7, it is characterized in that, the flow of described chlorine-containing gas is 0.2 Liter Per Minute ~ 0.8 Liter Per Minute.
9. the manufacture method of gate oxide as claimed in claim 1, is characterized in that, the flow forming the oxygen of second gate oxide layer is more than or equal to 10 Liter Per Minutes.
10. the manufacture method of gate oxide as claimed in claim 1, it is characterized in that, the thickness sum of described first grid oxide layer and second gate oxide layer is greater than
The manufacture method of 11. gate oxides as claimed in claim 10, it is characterized in that, the difference of the thickness of described trenched side-wall and the thickness of channel bottom is less than 30%.
12. as the manufacture method of the gate oxide in claim 1 ~ 11 as described in any one, and it is characterized in that, the depth-to-width ratio of described groove is greater than 2:1.
13., as the manufacture method of the gate oxide in claim 1 ~ 11 as described in any one, is characterized in that, etch described Semiconductor substrate and form groove, the one side be etched is <100> lattice.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310660778.0A CN104701155A (en) | 2013-12-09 | 2013-12-09 | Gate oxide layer manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310660778.0A CN104701155A (en) | 2013-12-09 | 2013-12-09 | Gate oxide layer manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104701155A true CN104701155A (en) | 2015-06-10 |
Family
ID=53348155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310660778.0A Pending CN104701155A (en) | 2013-12-09 | 2013-12-09 | Gate oxide layer manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104701155A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117096012A (en) * | 2023-08-22 | 2023-11-21 | 中环领先半导体材料有限公司 | Oxide film, silicon wafer and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6150234A (en) * | 1999-12-16 | 2000-11-21 | Vlsi Technology, Inc. | Trench-diffusion corner rounding in a shallow-trench (STI) process |
| US20030001159A1 (en) * | 1997-06-10 | 2003-01-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film and semiconductor device |
| US20090275183A1 (en) * | 2008-05-01 | 2009-11-05 | Renesas Technology Corp. | Method of manufacturing semiconductor device |
| CN102208336A (en) * | 2010-03-31 | 2011-10-05 | 上海华虹Nec电子有限公司 | Technical method for forming alternately arranged P type and N type semiconductor thin layers |
| CN102646603A (en) * | 2012-04-24 | 2012-08-22 | 上海宏力半导体制造有限公司 | Grooved MOS (metal oxide semiconductor) forming method |
-
2013
- 2013-12-09 CN CN201310660778.0A patent/CN104701155A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030001159A1 (en) * | 1997-06-10 | 2003-01-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film and semiconductor device |
| US6150234A (en) * | 1999-12-16 | 2000-11-21 | Vlsi Technology, Inc. | Trench-diffusion corner rounding in a shallow-trench (STI) process |
| US20090275183A1 (en) * | 2008-05-01 | 2009-11-05 | Renesas Technology Corp. | Method of manufacturing semiconductor device |
| CN102208336A (en) * | 2010-03-31 | 2011-10-05 | 上海华虹Nec电子有限公司 | Technical method for forming alternately arranged P type and N type semiconductor thin layers |
| CN102646603A (en) * | 2012-04-24 | 2012-08-22 | 上海宏力半导体制造有限公司 | Grooved MOS (metal oxide semiconductor) forming method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117096012A (en) * | 2023-08-22 | 2023-11-21 | 中环领先半导体材料有限公司 | Oxide film, silicon wafer and preparation method thereof |
| CN117096012B (en) * | 2023-08-22 | 2024-03-26 | 中环领先半导体科技股份有限公司 | Oxide film, silicon wafer and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102959731B (en) | For the method manufacturing the solaode with tunnel dielectric layer | |
| CN102870225B (en) | The manufacture method of back contact solar cell | |
| CN103632935B (en) | The Boron diffusion method of N type silicon chip, crystal silicon solar energy battery and preparation method thereof | |
| TWI594448B (en) | Ion implantation of dopants for forming spatially located diffusion regions of solar cells | |
| CN103632934B (en) | The Boron diffusion methods of N type silicon chips, crystal silicon solar energy battery and preparation method thereof | |
| TW202027286A (en) | Solar cell emitter region fabrication using ion implantation | |
| CN103928320B (en) | The preparation method of trench gate carborundum insulated gate bipolar transistor | |
| CN105304753A (en) | N-type cell boron diffusion technology | |
| CN109166794A (en) | A kind of multiple step format phosphorous doping methods of high efficiency, low cost crystal silicon battery | |
| JP2008311291A (en) | Method of manufacturing solar cell | |
| CN110911528A (en) | TOPCon battery and manufacturing method thereof | |
| CN107591461A (en) | A kind of diffusion technique for preparing solar cell | |
| CN107534070B (en) | Solar battery emitter region is manufactured using substrate grade ion implanting | |
| CN117497626B (en) | Solar cell and method for manufacturing solar cell | |
| CN114899097A (en) | Shielding gate trench device field oxide and manufacturing method of shielding gate trench device | |
| JP5726134B2 (en) | Method for manufacturing solar battery cell | |
| CN104701155A (en) | Gate oxide layer manufacturing method | |
| JP2024119744A (en) | Solar cell and its manufacturing method, solar power generation module | |
| CN103715300B (en) | A kind of method spreading rear low square resistance silicon chip and doing over again | |
| CN103094418A (en) | Solar cell preparation method | |
| CN114256383A (en) | Process for manufacturing PERC battery piece | |
| CN105225957B (en) | Slot type power device production method and slot type power device | |
| CN115377243A (en) | Preparation method of photosensitive diode and semiconductor device | |
| CN107425092A (en) | The doping method of double-side cell | |
| CN105226002A (en) | Autoregistration slot type power device and manufacture method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20150610 |
|
| RJ01 | Rejection of invention patent application after publication |