CN104685846B - Digital pre-distortion - Google Patents
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- CN104685846B CN104685846B CN201380034243.0A CN201380034243A CN104685846B CN 104685846 B CN104685846 B CN 104685846B CN 201380034243 A CN201380034243 A CN 201380034243A CN 104685846 B CN104685846 B CN 104685846B
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- 238000003702 image correction Methods 0.000 claims abstract description 23
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03343—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03878—Line equalisers; line build-out devices
- H04L25/03885—Line equalisers; line build-out devices adaptive
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/06—A balun, i.e. balanced to or from unbalanced converter, being present at the input of an amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/09—A balun, i.e. balanced to or from unbalanced converter, being present at the output of an amplifier
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Signal Processing (AREA)
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- Amplifiers (AREA)
Abstract
By determining the harmonic signal for the signal being output and the predistortion circuit of the introducing pre-distorted signals in communication channel.It can determine that the one or more image correction signals for the signal that will be output.One or more image correction signals can be the complex conjugate signal change for the signal that will be output.Harmonic signal, the correction signal of one or more images and the output signal that the signal being output can be combined into combination.The output signal of combination may be sent to that digital analog converter.The predistortion circuit can be realized in FPGA, ASIC, digital analog converter and/or single IC package.
Description
Background technology
The application is that submitting, entitled " the Digital Pre-Distortion " U.S. was special in August in 2011 22 days
The part of sharp patent application serial numbers 13/214852 (hereinafter referred to as " 852 application ") continues, and it is complete that disclosure of which is incorporated to its herein
Text." 852 application " is asked in the priority of the 16 days 2 months Provisional U.S. Patent Application sequence numbers 61/443605 submitted in 2011,
Its full text is incorporated herein in its content.
Background technology
The distortion of digital-analog convertor (DAC) can result in the ghost effect of DAC part.Due to DAC parasitism
Effect, harmonic signal and picture signal can be generated, therefore the distortion of the signal sent from DAC downstreams.The distortion introduced by DAC
It can be classified as linearly or nonlinearly.Can decay the influence of linear distortion in the balanced device of receiver.It is however, non-linear
Distortion (such as, harmonic signal and picture signal) is more difficult to solve.Picture signal can be above those letters of DAC sample frequencys
Number, or can be from signal caused by DAC defects, for example, the parasitism in DAC, it causes scaled and in random frequency
The spurious frequency com-ponents of the input signal of rate.
In Digital Media wire communication embodiment, mutually exist with standard (such as, DOCSIS/DRFI standards), with right
The data mode for being sent to receiver provides guidance.DOCSIS standards are more strict for less channel, and with the number of channel
Amount increase, standard become less stringent.Specifically, as the number of channel rises, to without spuious-dynamic range (SFDR) and neighboring trace
Leaking the requirement than (ACLR) becomes less strict.Therefore, being input to DAC data signal can need further to handle, with reality
The harmonic wave and picture signal for causing distorted signals are eliminated in matter.
Field programmable gate array (FPGA) equipment and/or ASIC (ASIC) are used to change by DAC
The forward direction data signal of downlink transfer applies digital processing technology.Fig. 1 shows conventional FPGA or ASIC configurations, for radio frequency
(RF) DAC provides numerical data.
Data signal is treated as including the compositum signal with real part and the empty component represented.Complex field data-signal
Combined by frequency mixer 105 and digital modulation signals, the digital modulation signals frequency-shift data is the data of general 6 or 8MHz data
Block.6 or 8MHz data are combined into some channels by combiner 120, and keep compound numeric field data.Data after merging are being mixed
Device 107 is mixed with another digital modulation signals from upper conversion digital modulator 130.From upper conversion digital modulator
130 digital modulation signals are the carrier frequency for wherein sending numerical data.
The output of frequency mixer 107 is still compositum signal.The compositum signal exported from frequency mixer 107 is by real domain equipment
140 are transformed into the data-signal for only including real domain data-signal.Real domain equipment 140 exports real domain data-signal to channel combining unit
150.Channel combining unit 150 combines real signal to the block for the up-convert channel for being sent to DAC.Described system 100 only to
DAC provides data and does not attempt decay actively or eliminate by the DAC harmonic waves introduced or picture signal.
The present inventors have realized that input signal to DAC the signal that is transmitted on channel of forward direction introduce predistortion with
The advantage of " elimination " (or decay) nonlinear channel distortion effect.The system and method for the present invention can be used in above-mentioned context,
And need to solve in nonlinear harmonic distortion in the transmission signal and/or the other application of picture signal distortion.For example, this hair
Bright system and method can be used for radio infrastructure (WIFR) base station, wherein needing to meet strict waste gas emission requirement.
Brief description
Fig. 1 shows conventional FPGA or ASIC configurations, for providing numerical data to radio frequency (RF) DAC.
Fig. 2 shows according to embodiments of the present invention, the block diagram of the example system of the transmission of signal data.
Fig. 3 shows according to embodiments of the present invention, the block diagram of FPGA or ASIC exemplary signal chain.
Fig. 4 shows according to embodiments of the present invention, the exemplary reduced block diagram of predistortion circuit.
Fig. 5 shows according to embodiments of the present invention, the illustrative embodiments of the picture signal for producing main signal sum.
Fig. 6 shows according to embodiments of the present invention, the illustrative embodiments of correcting circuit, for modulating picture intelligence to suitable
When frequency location to cancel.
Fig. 7 shows according to embodiments of the present invention, to produce the exemplary implementation that the correcting circuit of item is cancelled in intermodulation distortion (IMD)
Mode.
Fig. 8 shows according to embodiments of the present invention, the illustrative embodiments of correcting circuit, for producing the spuious correction of clock
.
Fig. 9 shows a kind of method according to embodiments of the present invention, to eliminate second and third level harmonic distortion IMD, clock
Image spuious and in frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout.
Figure 10 A-10C provide the illustrative embodiments of predistortion circuit according to an embodiment of the invention.
Figure 11 shows a kind of method according to embodiments of the present invention, to eliminate second and third level harmonic distortion IMD, clock
Image spuious and in frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout.
Figure 12 shows a kind of method according to embodiments of the present invention, to eliminate second and third level harmonic distortion IMD, clock
Image spuious and in frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout.
Detailed description of the invention
Disclosed embodiment provides a kind of pre-distortion system, and the system can introduce pre-distorted signals in communication channel.This is
System can include signal generator, controller and correction module.The signal generator can generate in the preset frequency of input signal
Harmonic signal and picture signal.The controller can select correction system in response to indicating the control signal of input signal types
Number.Correction module can apply correction coefficient in response to control signal and to the harmonic wave and picture signal generated, with generation
Pre-distorted signals.
Alternative embodiment provides the system for eliminating distortion.The example system may include signal processing circuit, pre-
Distortion circuit and digital-analog convertor (DAC).Signal processing circuit can receive input signal, and produce input signal
Distorted signals, for transmitting.Predistortion circuit can apply distortion school in response to being exported by the control code of signal processing circuit
Positive signal.The pre-distorted signals of merging and caused data signal can be converted into reducing distortion by Digital To Analog Converter
Analog output signal.
Also disclose the embodiment that pre-distortion arrangement is provided.Pre-distortion arrangement can include converter, look-up table, modulation
Device, combiner and emitter.The converter can produce the numerical data in complex data domain from input signal, and it is included truly
Data component and dummy data component.The look-up table can include being used for the correction coefficient for correcting harmonic distortion and image fault.Adjust
Device processed can be applicable the correction coefficient retrieved from look-up table to real domain and compositum numerical data, and generate pre-distorted digital
Data are with the Characteristic Distortion for the DAC that decays.Combiner can combine predistortion harmonic correction signal and pre-distorted image correction signal
With the numerical data provided in True Data domain and complex data domain.Emitter can send composite signal to DAC.
Another embodiment is provided for generating pre-distorted signals in the method for pre-distorted signals.The illustrative methods can
With including receiving digital input signals.Based on the estimation harmonic distortion introduced by DAC, can input signal harmonic frequency from
Input signal produces one or more primary signals.Based on the estimation image fault introduced by DAC, input signal can be produced
One or more image correction signals.Main signal and image correction signal can be combined, and composite signal can be output
To DAC.
Fig. 2 is shown according to embodiments of the present invention, for sending the example system block diagram 200 of signal data.It is exemplary
System 200 can also include various circuits, the output signal in the form of voltage or electric current.Example system 200 may include:
FPGA/ASIC 220, RF DAC230, balanced to unbalanced transformer (BALUN) 240, wave filter 250, variable gain amplifier 260, power
Amplifier 270 and balanced to unbalanced transformer 280.
FPGA/ASIC 220 can generate data signal, for transmitting audio and/or video media or data content.
FPGA/ASIC 220 may include digital predistortion circuit (" DPD ") 222, and it can generate from FPGA/ASIC 220 and may be incorporated into RF
DAC pre-distorted signals.RF DAC 230 can change the numerical data from FPGA/ASIC 220 to cable communication compatibility
RF frequency signal.The compatible RF frequency signal of cable communication may have about 50 megahertzs of -1GHz frequency.RFDAC 230 can have
There is the input for clock generation circuit 225, it can provide clock signal to RF DAC 230.RF DAC 230 can have
Provide a signal to the output of balanced to unbalanced transformer 240.Balanced to unbalanced transformer is known in the art, and is the electricity for balanced signal
The type of gas transformer.
In alternative embodiments, RF DAC 230 can have DPD 222, and it is through being incorporated to in D-A converting circuit
Input signal is received before.Balanced to unbalanced transformer 240 can have to the output of wave filter 250.Wave filter 250, which can have, to be output to
Variable gain amplifier 260, it, which can have, is output to power amplifier 270.Power amplifier 270 can be flat with being output to
Weigh converter 280, and it may be coupled to the communication channel of cable, such as coaxial cable or fiber optic cables.
In operation, FPGA/ASIC 220 can be digitally processed signal, for transmitting the data included in the signal.
Specifically, FPGA/ASIC 220 can produce the signal in the complex signal domain signal handled by DPD 222.DPD 222 can be produced
Raw pre-distorted signals, it is incorporated into FPGA/ASIC220 output.Pre-distortion can add artifact to RF DAC 230
Input signal so that as caused by RF DAC 230 output signal substantially free of artifact because the artifact added cancel or
Decay distorted signals as caused by RF DAC 230.RF DAC 230 can will be from FPGA/ASIC 220 in digital data channel 205
The data signal of upper reception is converted to analog signal.Clock generation module 225 can provide clock signal to RF DAC 230.RF
230 exportable analog signals of DAC are used to transmit, for example, passing through cable communication channel.Existed by the outputs exported of RF DAC 230
The analog signal of cable communication channel may have about 50 megahertzs of -1GHz frequency.The analog signal can pass through the group of equipment
Conjunction is filtered, amplifies and power adjustment, such as balanced to unbalanced transformer 240, wave filter 250, variable gain amplifier 260, power
Amplifier 270 and balanced to unbalanced transformer 280.
In FPGA, such as according to embodiments of the present invention, compositum signal can be provided to predistortion circuit, and it can base
Distorted signal is produced in the sign for the DAC that data-signal to be sent to.The example with predistortion circuit is described in detail with reference to figure 3
Property FPGA.
Fig. 3 shows according to embodiments of the present invention, the block diagram of FPGA or the exemplary signal chain in ASIC.With predistortion
FPGA/ASIC 300 structure can include input, the first frequency mixer 305, digital modulator 310, combiner 330, second
Frequency mixer 307, upper conversion digital modulator 335, combiner 340 and predistorter 350.
FPGA/ASIC 300 can receive numerical data, or the generation of numerical data represents that it is defeated that it is treated as compositum
Enter signal.Compound domain input signal can be applied to the first frequency mixer 305.First frequency mixer 305 can also receive to be adjusted from numeral
The carrier signal that device 310 processed inputs, for example, 6 or 8 MHz signals.The exportable modulated complex domain input of first frequency mixer input 305
The 6 of signal or 8MHz carrier signal.Compositum modulated signal can export from frequency mixer 305, and can be provided to group
Clutch 330.Compositum modulated signal and multiple channels can be combined in combiner 330, and it can be provided to the second frequency mixer 307
Input.Up-conversion digital modulator 335 can provide input of the carrier signal to the second frequency mixer 307.Carrier signal can have
There is the frequency suitable for transmission aggregate channel gk (n).In cable communication application, for example, carrier frequency can be 50MHz-1GHz.
Second frequency mixer 307 can export main signal and picture signal channel hK (n) modulator block to combiner 340 respectively,
Wherein k is block of channels, and n represents the time index for the signal to be sent.In combiner 340, the modulator block of channel can further lead to
Cross and sum multiple block of channels or individual channel and be combined into the channel in up-conversion modulated carrier frequencies.Primary and picture channel
Up-conversion modulator block, x (n) and xi (n) can be output to predistortion circuit 350 from combiner 340.Predistortion circuit 350 can
Upconvert modulation channel block and apply distortion factor, to produce distorted signal y (n).Distorted signal can be replicated in digital-to-analogue conversion
Caused known distortion in device, such as such as RF DAC 230.
Mathematical formulae in Fig. 3 is represented by:
Xi (n)=xR(n)-j×xI(n) (formula 1)
In equation 1, output signal y (n) can be based on the correction system for being applied to the composite signal to form x (n) and xi (n)
Number, x (n) and xi (n) predistortion version.Item represents that gk (n) is the complex baseband signal of the block of the channel of modulated signal,
Can be modulation item to adjust multiple channels of combination, hk(n) it can be complex modulated domain signal, x (n) can be any pre-
Output signal from FPGA before distortion, and wherein n is the time index for the signal to be sent.Fig. 3 output is to include
Harmonic distortion and the signal of image fault, it is expected to produce by target DAC, will perform the DAC of digital-to-analogue conversion.
Fig. 4 shows according to embodiments of the present invention, the exemplary reduced block diagram of predistortion circuit.Predistortion module 400 can be with
Including primary signal generator 410, image signal generator 415, controller 420, modulation correction look-up table 430, harmonic correction
440th, the spuious correction module 455 of image rectification 450, clock, intermodulation product module (IMD) 457, adder 460 and in output end
Second adder 470.Primary signal generator 410 can be that generation corresponds at the signal of the expected data signal to be transmitted
Manage circuit.Image signal generator 415 can be the signal processing circuit for generating signal, and the signal is included in input data signal
Specific frequency picture signal.Controller 420 and can control predistortion based on the control input of instruction input signal types
Module 400.Input signal types may, for example, be audio signal, vision signal, the audio signal of fine definition or fine definition
Vision signal.Modulation correction look-up table 430 can store the list of distortion correction coefficient.Can be by characterizing multiple different DAC
Performance produce distortion correction coefficient list.Harmonic correction 440 can be to the signal application exported from primary signal generator 410
Distortion correction coefficient, to produce the picture signal of counteracting or decay target DAC harmonic distortion.Similarly, image rectification 450 can
With to the picture signal application distortion correction coefficient exported from image signal generator 415, cancelled or decay DAC figure with producing
The harmonic signal of image distortion, the DAC will change input digital data.
The spuious distortion module 455 of clock can correct the spuious caused distorted signals of clock, and the clock is spuious for example by letting out
Leakage or digital active cause.IMD 457 can correct the distortion caused by never desired signal combination during modulation.
Adder 460 and second adder 470 can be with summing signals, to generate the output of the target DAC to be sent arrived
Signal.
Predistortion module 400 can receive input digital data signal.Multiple input digital data signal can have real domain and
Imaginary field component.The digital data signal received can be input into primary signal generator 410 and picture signal generator 415.
Primary signal generator 410 can be used for the harmonic signal for producing harmonic frequency, and the ramp signal is known will to be carried by output signal
The DAC of confession is produced.Image signal generator 415 can be used for producing the picture signal in frequency, and this is known by defeated for the picture signal
Go out signal to produce the DAC being provided.Harmonic wave and picture signal can be calculated from main signal, without understanding main signal frequency
The priori of rate and the distortion mechanism in DAC.Controller 420 is in response to the exportable control signal of input signal to modulation school
Positive look-up table.Modulation correction look-up table 430 can have the input for being connected to controller 420, and be connected to harmonic wave school
Positive 440 with the output end of image rectification 450.Modulation correction look-up table 430 can store correction coefficient in a lookup table.The lookup
Table can fill multiple different constants and correction coefficient and the factor, and such as correction coefficient β is to correct harmonic distortion, Yi Jitu
As correction coefficient γ to compensate the picture signal distortion in DAC.Correction coefficient can be by applying different signals and school to DAC
Quasi- β and γ correction coefficient is the acceptable harmonic wave of generation and the value of image fault level.Other constants, coefficient and the factor can lead to
Cross application DAC (and other DAC) to be determined similarly, to determine target DAC feature.It may have access to or provide and arrive harmonic wave school
Positive 440 or the correction coefficient of image rectification 450 control signal provided by controller 420 is provided.
Harmonic correction 440 can have the input for being used for that data to be received from primary signal 410, and for being looked into from modulation correction
Table 430 is looked for receive the input of correction data.Harmonic correction 440 can correct any amount of harmonic wave occurred in the signal,
As timing mismatch and the result of RF DAC other nonlinear circuit characteristics.Image rectification 450, which can have, to be used to believe from image
Number maker 415 receives the input of data, and for receiving the input of correction data.Picture signal can be input signal
Calibration and frequency mirror image (folding) version, the signal be the undesirable signal of required spectrum.Due to posting in RF DAC
Raw, picture signal can be for example by being modulated generation to clock signal.Image rectification 450, which can be corrected, needs what is be corrected
Any number of picture signal.IMD 457 can receive main signal from main signal generator 410 and from such as controller
Or the secondary singal in other sources.Clock spuious 455 can provide correction signal to decay from any caused by clock signal spike
Distortion.Adder 460 can have input, with from harmonic correction 440 and the reception signal of image rectification 450.Although another adder
470 input may include the output of main signal generator 410 and adder 460.The output of adder 470 can be from pre-
The output of distortion module 400, as the pre-distorted signals to RF DAC.Predistortion module 400 can be located at same with FPGA
IC chip, in DAC or independent integrated chips, such as ASIC.
In operation, predistortion module 400 can receive the numerical data that will be sent in input.Primary signal generator
410 and picture signal generator 415 can produce main signal and picture signal, represent received numerical data.It is caused
Main signal and picture signal can have the compound domain representation for including each signal.Primary signal generator 410 and picture signal hair
Raw device 415 can provide corresponding caused signal to harmonic correction 440 and image rectification 450 respectively.Controller 420 can receive
Control signal, instruction are for example sent to the type of DAC signal.Based on the control signal received, controller 420 can generate
Index value, the value are output to modulation correction look-up table 430.In response to received index signal, modulation correction look-up table
430 can export (or offer), and correction coefficient is to harmonic correction 440 and image rectification 450, for correcting distortion.
IMD 457 can receive as caused by main signal generator 410 signal and for example by the second main signal generator (not
Show) provide secondary singal, corresponding to the different masses of the channel sent.Secondary singal then can by IMD 457 with Lai
The output signal of autonomic signals generator 410 is combined, to produce the error signal of correction target DAC known intermodulation product.
When DAC is characterized, the correction signal can be determined.IMD 457 output can be provided to adder 470.
The spuious correction module 455 of clock can generate the spuious correction signal of decay clock, and the clock is spuious can be in target
The digital-to-analog transition period in DAC produces.When DAC is characterized, these clocks are spuious to be determined.Clock positive correction
The output of module 455 can be provided to adder 470.
Harmonic correction 440 can represent to apply real domain data-signal from harmonic correction coefficient (β) to data-signal and complex domain.It is humorous
Ripple correction coefficient (β) can be identified for example for the constant for modulating reality and compound/empty signal through processing, humorous to cancel or decay
Ripple signal.Image rectification 450 can be to data-signal real domain data-signal and multiple/virtual domain representation application image correction coefficient
(γ).Picture signal can be folded and appear in DAC output signal.Image rectification coefficient (γ) may be identified for modulating
Reality and composite signal through processing are come the constant for picture signal of cancelling or decay.
The correction real domain data-signal and complex domain of the data-signal exported from harmonic correction 440 represent that addition can be put on
Device 460.The modulation real domain data-signal and plural domain representation of the viewdata signal exported from image rectification 450 can also be applied
It is added to adder 460.Adder 460 can sum provided signal, and export the signal to adder 470.Adder 470
The output of the main signal that can sum and adder 460, and export the summing signal.
Main signal generator 410 and picture signal generating unit 415 are described more fully now with reference to Fig. 5.Fig. 5 is shown
According to an embodiment of the invention, for producing the illustrative embodiments of primary signal and picture signal.Other methods and realization
Mode or configuration can be used for producing corresponding primary and picture signal.Fig. 5 signal code is similar to figure 3 above.
Signal gk(n) can be 6 or 8MHz kth block complex baseband signal, wherein signalIt is real part, and signalIt is imaginary part.Symbol k can represent the number of data channel, and can be that 1 channel can be handled as far as possible to system
More channels.SignalThe first input of frequency mixer 511 can be provided to.Another input of frequency mixer 511 can be this
The sine wave signal sin (θ kn) of form.The output of frequency mixer 511 can be providedIt can also be provided to
Adder 532.SignalIt can be provided to the first input of frequency mixer 513.Another input of frequency mixer 513 can be with
The cosine wave signal of lower form, cos (θ kn).The output of frequency mixer 513Adder can be provided to
534.SignalThe first input of frequency mixer 523 can be provided to.Another input of frequency mixer 523 can be following shape
The cosine wave signal of formula, cos (θ kn).The output of frequency mixer 523It can be provided to adder 532.Letter
NumberThe first input of frequency mixer 521 can also be provided to.Another input of frequency mixer 521 can be following form
Sine wave signal, sin (θ kn).The output of frequency mixer 521 can be provided to adder 534.
Adder 532 can have input to receive mixed signal from frequency mixer 511And from mixing
Device 523 receives mixed signalThe signal of mixingWith
Summed by adder 532.The output of adder 532It is respective block of channels k composite signal hk(n) imaginary part.
Adder 534 can have input with from frequency mixer 513 and the reception signal of frequency mixer 521.Adder 534 can have input
To receive mixed signal from frequency mixer 513And receive mixed signal from frequency mixer 521Output.Adder 534 exportsKnowBetween difference, make
For each block of channels k signal
Adder 532 and 534 can distinguish output signalWithIt can sum 552 for each by channel
Channel k sums.552 exportable main signal x of channel summationI(n) (compound/imaginary field) and xR(n) (real domain).Signal xiR (n) and xR
(n) it is identical.Supplement block 554, which has, is used as input signal xI (n), and can export the signal xiI (n).Supplement block is held
The function of row signal reversion, i.e. its output are the input signals of negative.Outputting data signals xiI (n), xiR (n), xI (n)
AndxR (n) can be provided that such as Fig. 3 predistortion figure circuit 350.
Fig. 6 is shown according to embodiments of the present invention, the illustrative embodiments of correcting circuit, is to close for modulating picture intelligence
Put for cancelling right position.Utilize data-signal xiIAnd xiRWith their supplement-xiIWith-xiR, generation image calibration positve term yil
(n)。
Data-signal xiIand xiRWith their benefit-xiIand-xiRIt is provided to multiplexer 610 and 620.It is more
Road converter 610 can receive code (for example, code 1), and it is mixed to determine which signal can be provided at different time points
Frequency device 613.Code 1 can the sign based on DAC, and for example can be provided from Fig. 4 modulation correction look-up table.Modulation correction system
Number γ 11 can be input to frequency mixer 613, to combine the data-signal provided by multiplexer 610.The output of frequency mixer 613
Adder 630 can be supplied to.Similarly, multiplexer 620 can receive code-code 2, identify which signal in the time
Difference be provided to frequency mixer 623.Code 2 can also the sign based on DAC, and can be for example from Fig. 4 modulation school
Positive look-up table provides.Modulation correction coefficient γ 12 can be input to frequency mixer 623, to combine what is provided by multiplexer 620
Data-signal.The output of frequency mixer 623 is provided to adder 630, and it can combine modulation correction signal, and output image school
Positive signal yi1(n)。
Configuration shown in Fig. 6 can repeat for any number of image correction signal.For example, in exemplary embodiment
In, different multichannels can be used to turn in frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout picture signal
The code building of parallel operation.For example, for picture signal fdac/4-fout, code 1 can be repeat pattern [0,3,2,1], and
Code 2 can be repeat pattern [1,0,3,2] (wherein, fout can be enter into the centre frequency of DAC signal).For figure
As signal fdac/2-fout, code 1 can be repeat pattern [0,2,0,2], and code 2 can be repeat pattern [1,3,1,
3].Meanwhile for picture signal 3fdac/4-fout, code 1 can be repeat pattern [0,1,2,3], and code 2 can be
Repeat pattern [1,2,3,0].Using different configurations, the code of correction coefficient and multiplexer, different figures can be produced
As correction signal yi1(n)。
Depending on application, other kinds of distortion can also be produced by the DAC that needs or need not solve.For example, high-resolution
The audio system of degree can need decay other distortions, such as intermodulation or the parasitic noise distortion as caused by DAC, and standard is clear
The audio signal of clear degree can be without the needs.As shown in figure 7 below and 8, the alternate embodiment of pre-distortion system is adapted to this
Other a little distortions.
Fig. 7 show according to embodiments of the present invention, for produce intermodulation distortion (IMD) cancel item correcting circuit it is exemplary
Embodiment.Correcting circuit 700 produces intermodulation distortion (IMD) and cancels item.For example, signalKnowCorrespond to from pre-
The main channel x of distortionRAnd x (n)I(n) second signal of the block of channels of separated frequency.
In the illustrative embodiments, correcting circuit 700 may include frequency mixer 710,715,719,720,725 and 729,
And adder 717,727 and 730.Frequency mixer 710 can have input, for real domain signal xR (n) and channel to be sent
The real domain block of signalThe output signal x R (n) of frequency mixer 710Adder 717 can be provided to.Frequency mixer
715 can have input with reception signal x I (n) (imaginary part of main signal) and(imaginary part of secondary singal).Frequency mixer
715 output x I (n)Adder 717 can be provided to.Adder 717, which can receive, carrys out self-mixing device 710 and 715
Mixed signal, and perform summation operation.Summing signal from adder 717 can be applied to frequency mixer 719, and it also has
Cancel item β 5 input for intermodulation distortion (IMD).Intermodulation distortion (IMD) is cancelled the modulation corrections of item β 5 also as shown in Figure 3 and looked into
Table is looked for provide.Intermodulation distortion (IMD) cancels item and can be used to eliminate nonlinear main and secondary channel the mixing due to DAC
Caused intermodulation distortion.The mixed signal exported from frequency mixer 719 can be provided to the input of adder 730.Frequency mixer
720 can have input, for the virtual Domain signal xI (n) and the real domain block of channel signal that will be sentFrequency mixer 720
Output signal xI (n) adder 727 can be provided to.Frequency mixer 725 can have input, with from real domain xR (n) and channel
BlockReception signal.The output xR (n) of frequency mixer 725Adder 727 can be provided to.
Similarly, adder 727 can receive the mixed signal for carrying out self-mixing device 720 and 725, and perform calculus of differences.Come
Frequency mixer 729 can be applied to from the summing signal of adder 727, it, which also has, is used for intermodulation distortion (IMD) cancellation item β's 6
Input.The modulation correction look-up table offer that item β 6 can also be as shown in Figure 3 is cancelled in intermodulation distortion (IMD).Intermodulation distortion (IMD) takes
The cencelling of terms can be used for cancelling intermodulation distortion.
The mixed signal exported from frequency mixer 729 is provided to the input of adder 730.Adder 730 can sum
Carry out the signal of self-mixing device 719 and 729, item is cancelled into the intermodulation distortion (IMD) for being forwarded to DAC to provide.
Fig. 8 shows according to embodiments of the present invention, the exemplary implementation of the correcting circuit for producing the spuious correction term of clock
Mode.
The structure of the spuious correcting circuit of clock can be similar to the circuit of figure 6 above.0th, 1 and -1 can represent Hard link
In digital circuit and form the constant of the sequence of spuious as frequency domain fdac/4 time domain signature.Increment term (δ 1 and δ 2) can be by
The constant that controller is provided and determined during DAC is calibrated.Signal 0,1, -1 is provided to multiplexer 810 and 820.It is more
Path multiplexer 810 can receive code (for example, code 3), and identification can be supplied to the letter of frequency mixer 815 in the difference of time
Number.Code 3 can the sign based on DAC, and can be provided from Fig. 4 modulation correction look-up table.And can be multiple differences
One in code.Constant δ 1 can be input into frequency mixer 815, to combine the data-signal provided by multiplexer 810.It is mixed
The output of frequency device 815 can provide adder 830.Similarly, multiplexer 820 can receive code (for example, code 4),
Identification is provided to the signal of frequency mixer 825 in the difference of time.Code 4 can also be according to DAC sign, and can be from
Fig. 4 modulation correction look-up table provides.Constant δ 2 can be input into frequency mixer 825, with the number provided by multiplexer 820
It is believed that number being combined.Constant δ 1 and δ 2 can be any being related in the spuious different multiple coefficients of different frequency domain fdac/4
, and can be stored in modulation correction look-up table, such as shown in Figure 4.The output of frequency mixer 825, which can be provided that, to be added
Musical instruments used in a Buddhist or Taoist mass 830.Modulated correction signal can be combined in adder 830, and can export the spuious correction signal Yspur (n) of clock.
The foregoing describe each generation for each pre-distorted signals that can be applied to DAC.
Fig. 9 shows to combine each circuit that above-mentioned reference chart 7 and 8 describes to single realization, with provide pre-distorted signals with
And the data-signal to be sent to DAC.Fig. 9 shows according to embodiments of the present invention, to eliminate second and third level harmonic distortion
IMD, the method for spuious and in fdac/4-fout, fdac/2-fout and 3fdac/4-fout the image of clock.
The predistorter 900 can receive data-signal, such as by the data-signal x (n) sent and represent actual portion
The xR (n) divided, and data-signal x (n) virtual part xI (n) is represented, and fdac/4-fout is represented respectively, fdac/2-
The image correction signal yi of fout and 3fdac/4-fout images1(n), yi2(n), yi3(n).Predistorter 900 can have defeated
Enter, for the correction coefficient from lookup table search or offer.
When circuit provide two level it is straight/harmonic correction of turning back, actual data signal xR (n) can be input into frequency mixer 911
Two input, its square of data-signal.For example, the output of frequency mixer 911 can be [xR (n)] 2.Dummy data signal xI (n)
Two inputs of frequency mixer 913 can be input into, and the output of frequency mixer 913 can be [xI (n)]2.The He of frequency mixer 911
913 output can be applied to adder 921.
The output of adder 921 can be xR (n) quadratic sum XI (n) square between difference.The output of adder 921
Frequency mixer 931 can be applied to.Another input of frequency mixer 931 can be the harmonic modulation obtained from modulation correction look-up table
Correction coefficient β 1.The output of frequency mixer 931 can be applied to the input of adder 941.
Real data signal xR (n) and imaginary data signal xI (n) can also be provided to frequency mixer 915.Frequency mixer 915
Output can be [xR (n)] [xI (n)].The output of frequency mixer 915 can be applied to step-by-step deviator 920, and it will mix [xR
(n)] [xI (n)] offsets 1 bit value, and its execution is multiplied by 2.The output 920 of step-by-step deviator can be (2x [xR (n)]
[xI(n)]).The output of step-by-step deviator 920 can be input into frequency mixer 933.Another input of frequency mixer 933 can be
Can be from the harmonic modulation correction coefficient β 2 that modulation correction look-up table obtains.The output of frequency mixer 933 can be applied to adder 941
Input.
Believe using the mixed signal for carrying out self-mixing device 931 and from the mixing of the frequency mixer 933 applied to adder 941
Number, the output of adder 941 can provide straight/two level of turning back harmonic correction signal.The correction signal can be used for eliminating by DAC
Two level distortion mechanism caused by distortion.Summed by adder 941 and can be applied come the output of self-mixing device 931 and frequency mixer 933
The adder 958 being added in output signal path.
In order to provide three-level it is straight/harmonic correction of turning back, the output of step-by-step deviator 920 can be applied to frequency mixer 919, with
And another input of frequency mixer 919 can be actual data signal xR (n).The output of frequency mixer 919 can be applied to addition
Device 925, and the output of adder 921 can be applied to frequency mixer 917, and frequency mixer 917 can be with composite data signal xI's (n)
Another input.The output of frequency mixer 917 can be applied to adder 925.The summation of adder 925 can be input into frequency mixer
937, another input of frequency mixer 937 can be modulation correction coefficient β 4.The output of frequency mixer 937 can be provided to adder
942。
Frequency mixer 912 can have the input for the output for being used to receive adder 921, and for real data signal xR (n)
Input.The output of frequency mixer 912 can be applied to adder 923.
Frequency mixer 914 can have the input of the output for step-by-step deviator 920, and for composite data signal xI
(n) input.The output of frequency mixer 914 can be applied to adder 923.Adder 923 can subtract from the output of frequency mixer 912
Go the output of frequency mixer 914.The output of adder 923 can be applied to frequency mixer 935.Another input of frequency mixer 935 can
To be modulation correction coefficient β 3.The output of frequency mixer 935 can be applied to adder 942.
The output of adder 942 can directly provide three-level/turn back harmonic correction signal.The correction signal can be used for eliminating
The distortion as caused by the third-order distortion mechanism in DAC.The output of adder 942 can be applied to the addition in output signal path
Device 956.
Corresponding to the image correction signal yi of fdac/4-fout images1(n) can be input into output signal path
Adder 953.Corresponding to the image rectification yi of fdac/2-fout images2(n) adding in output signal path can be input into
Musical instruments used in a Buddhist or Taoist mass 952.Corresponding to the image rectification yi of 3*fdac/4-fout images3(n) adding in output signal path can be input into
Musical instruments used in a Buddhist or Taoist mass 951.
Other correction signals may include intermodulation correction signal.Intermodulation correction signal yimd (n), which can be applied to, to be exported
Adder 950 in signal path.The correction signal can be used for appointing in the DAC output spectrums that correction is widely separated in frequency
The intermodulation distortion product that the product of two channels of meaning is formed.DAC switch in it is non-linear and in signal chains other it is non-linear can
Produce these intermodulation products.Meanwhile parasitic noise correction signal yspur (n) can be added to adding in output signal path
Musical instruments used in a Buddhist or Taoist mass 950.Clutter noise correction signal can be used for remove be present in output spectrum fdac/4 clocks it is spuious.This can be example
As spuious caused by the digital active of the fdac/4 speed on chip.The yimd's (n) and yspur (n) of adder 950 is total
With the adder 951 that can be applied in output signal path.
Real data signal xR (n) can be applied to the adder 954 in output signal path.Output signal path can
Including the input signal for the adder 950-954 that can be merged, and it is input to adder 956.Three-level harmonic correction signal can
Be input into the input of adder 956, with composograph correction and data signal assembled.The output of adder 956 can be with
The input of adder 958 is applied to, wherein it is added the output of three-level harmonic correction.The output of adder 958 can be pre-
The output of distorter 900, as real signal y (n).
The predistored output signal y (n) can include image correction signal yi1(n), yi2(n), yi3(n), harmonic correction
Signal, clock positive correction signal and data-signal xR (n).Certainly, depending on application, the various combination of correction signal can be by group
Close to form predistored output signal y (n).For example, due to processing variation, it is miscellaneous that some DAC may not show obvious clock
Dissipate energy.In such a case, it is possible to the spuious correction signal of clock is not needed.Further, since indivedual DAC different sensitiveness,
Not every distortion component may be present in all DAC output.In this case, only application is defeated corresponding to DAC is present in
The predistortion item of distortion component in going out.
Figure 10 A-10C provide the illustrative embodiments of predistortion circuit.With packing technique improvement and become more just
Preferably, it is contemplated that the predistortion can use such as DAC encapsulation to realize.
Figure 10 A can represent the IC chip with the predistortion component for being incorporated to FPGA or ASIC.Figure 10 B can represent it
Middle predistortion component enters the configuration of the IC with digital-analog convertor.Figure 10 C can represent that wherein predistortion component is incorporated to individually
The configuration of IC package.
Figure 11 shows another embodiment of predistorter 1100, and it combines above-mentioned to IMD cancellations (Fig. 7) and the spuious school of clock
Just the single circuit of (Fig. 8) is single realization, to provide pre-distorted signals and the data-signal to be sent to DAC.Therefore, scheme
11 show predistorter 1100 according to embodiments of the present invention, to eliminate second and third level harmonic distortion IMD, clock it is spuious and
In frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout image.
The predistorter 1100 can receive data-signal, such as by the data-signal x (n) sent and represent actual portion
The xR (n) and the XI (n) of expression data-signal x (n) imaginary part divided, and fdac/4-fout is represented respectively, fdac/2-
The image correction signal yi of fout and 3fdac/4-fout images1(n), yi2(n), yi3(n).The predistorter 1100 can have
Have input, for from search table search or provide correction coefficient.
It is straight that the predistorter 1100 can include two level/harmonic correction part of turning back, three-level are straight/harmonic correction part of turning back
And image rectification part.
In order to provide the second level it is straight/harmonic correction of turning back, actual data signal xR (n) can be input into frequency mixer 1111
Two input, its square of data-signal.For example, the output of frequency mixer 1111 can be [xR(n)]2.Dummy data signal XI (N)
Two inputs of frequency mixer 1112 can be input into, and the output of frequency mixer 1112 can be [xI(n)]2.Frequency mixer 1111
Output with 1112 can be applied to adder 1115.
The output of adder 1115 can be xR(n) quadratic sum xI(n) square between difference.Adder 1115
Output can be applied to frequency mixer 1116.Another input of frequency mixer 1116 can be obtained from modulation correction look-up table
Harmonic modulation correction coefficient β 1.The output of frequency mixer 1116 can be applied to the input of adder 941.
Actual data signal xRAnd imaginary data signal x (n)I(n) frequency mixer 1113 can also be provided to.Frequency mixer
1113 output can be [xR(n)]·[xI(n)].The output of frequency mixer 1113 can be applied to step-by-step deviator 1114, wherein
This is mixed into [xR(n)]·[xI(n) a bit position] is offset, effectively performs and is multiplied by 2.The output of step-by-step deviator 1114
Can be (2x [xR(n)]·[xI(n)]).The output of step-by-step deviator 1114 can be input into frequency mixer 1117.Frequency mixer
1117 another input can be can be from the harmonic modulation correction coefficient β 2 that modulation correction look-up table obtains.Frequency mixer 1117
Output can be applied to the input of adder 1118.
Adder 1118 is applied to the mixed signal from frequency mixer 1116 and from the mixed frequency signal of frequency mixer 1117,
The output of adder 1118 can provide the second level it is straight/turn back harmonic correction signal.The correction signal can be used for eliminating by DAC
Two level distortion mechanism caused by distortion.Can quilt come the output of self-mixing device 1116 and frequency mixer 1117 by the summation of adder 1118
The adder 1158 being applied in output signal path.
The third level is straight/and harmonic correction part of turning back can include being used for data-signal (for example, xR(n)andxI(n)) it is used in combination
In by the second level it is straight/signal caused by harmonic that turns back is (for example, [x as caused by frequency mixer 1111 and 1112 respectivelyR
(n)]2and[xI(n)]2) input.In order to provide third level level/harmonic correction of turning back, True Data signal xRN) can be
Frequency mixer 1120.Signal [xI(n)]2It can be offset by step-by-step deviator 1121, to be functionally multiplied by 3.With adder 1121.1
Step-by-step deviator 1121 can with one bit position of shifted signal, and add corresponding bit value with perform be multiplied by 3 operation.Step-by-step
The output of deviator 1121 and adder 1121.1 can be applied to adder 1122.Signal [xR(n)]2It can also be applied to and add
Musical instruments used in a Buddhist or Taoist mass 1122, adder 1122 can produce and export difference (that is, [x between its two inputsR(n)]2With adjustment [xI(n)]2
Between difference).The output of adder 1122 can be another input of frequency mixer 1120, and the output of frequency mixer 1120 can
To be the input of frequency mixer 1123.Another input of frequency mixer 1123 can be modulation correction coefficient β 3.Frequency mixer 1123
Output can be applied to adder 1128.
In addition, dummy data signal xI(n) can be frequency mixer 1124 input.Signal [xR(n)]2It can be offset by step-by-step
Device 1125 and adder 1125.1 shift, to be functionally multiplied by 3.Step-by-step deviator 1125 can be with shifted signal with addition 1125.1
One bit position, and add corresponding bit value with perform be multiplied by 3 operation.Step-by-step deviator 1125 and adder 1125.1 it is defeated
Adder 1126 can be applied to by going out.Signal [xI(n)]2Adder 1126 can also be applied to, adder 1126 can produce and defeated
The difference gone out between its two inputs (that is, offsets [xR(n)]2[xI(n)]2Between difference).Adder 1126 exports
Another input of frequency mixer 1124, and the output of frequency mixer 1124 can be the inputs of frequency mixer 1127.Frequency mixer
1127 another input can be modulation correction coefficient β 4.The output of frequency mixer 1127 can be applied to adder 1128.
The output of adder 1128 can directly provide the third level/turn back harmonic correction signal.The correction signal can be used for
Eliminate the distortion as caused by the third-order distortion mechanism in DAC.The output of adder 1128 can be applied in output signal path
In adder 1156.
Corresponding to the image correction signal yi of fdac/4-fout images1(n) adding in output signal path can be input into
Musical instruments used in a Buddhist or Taoist mass 1153.Corresponding to the image rectification yi of fdac/2-fout images2(n) addition that can be input into output signal path
Device 1152.Corresponding to the image rectification yi of 3*fdac/4-fout images3(n) addition that can be input into output signal path
Device 1151.
Other correction signals may include intermodulation correction signal.Intermodulation correction signal yimd (n), which can be applied to, to be exported
Adder 950 in signal path.The correction signal can be used for appointing in the DAC output spectrums that correction is widely separated in frequency
The intermodulation distortion product that the product of two channels of meaning is formed.DAC switch in it is non-linear and in signal chains other it is non-linear can
Produce these intermodulation products.Meanwhile parasitic noise correction signal yspur (n) can be added to adding in output signal path
Musical instruments used in a Buddhist or Taoist mass 1150.Clutter noise correction signal can be used for remove be present in output spectrum fdac/4 clocks it is spuious.This can be
It is such as spuious caused by the digital active of the fdac/4 speed on chip.The yimd (n) and yspur (n) of adder 1150
Summation can be applied to the adder 1151 in output signal path.
Real data signal xR (n) can be applied to the adder 1154 in output signal path.Output signal path
It may include the adder 1150-1154 input signal that can be merged, and be input to adder 1156.Three-level harmonic correction is believed
Number can be input into the input of adder 1156, with composograph correction and data signal assembled.Adder 1156 it is defeated
Go out to be applied to the input of adder 1158, wherein it is added the output of three-level harmonic correction.The output of adder 1158
Can be the output of predistorter 1100, as real signal y (n).
The predistored output signal y (n) can include image correction signal yi1(n), yi2(n), yi3(n), harmonic correction
Signal, clock positive correction signal and data-signal xR (n).Certainly, depending on application, the various combination of correction signal can be by group
Close to form predistored output signal y (n).For example, due to processing variation, it is miscellaneous that some DAC may not show obvious clock
Dissipate energy.In such a case, it is possible to the spuious correction signal of clock is not needed.Further, since indivedual DAC different sensitiveness,
Not every distortion component may be present in all DAC output.In this case, only application is defeated corresponding to DAC is present in
The predistortion item of distortion component in going out.
The predistorter 1100 can provide efficient harmonic wave and image rectification, and reduce part count simultaneously, i.e., mixed
Frequency device (multiplier).For example, predistorter 1100 can include nine frequency mixers in its harmonic correction part, in second level part
Five, and third level part four.Under normal circumstances, frequency mixer is unnecessary and unpredictable dry to system increase
Disturb.Therefore, the quantity that frequency mixer is reduced in pre-distortion system provides higher performance.In addition, when parallel channel number in system
During increase, component is reduced and can become more apparent upon.For example, in eight parallel route systems, two are reduced in predistorter
Frequency mixer (for example, 9 frequency mixers of Fig. 9 11 frequency mixers to Figure 11) can expand to reduces by 16 mixing in systems
Device.
Figure 12 shows another embodiment of predistorter 1200, and it combines above-mentioned to IMD cancellations (Fig. 7) and the spuious school of clock
Just the single circuit of (Fig. 8) is single realization, to provide pre-distorted signals and the data-signal to be sent to DAC.Therefore, scheme
12 show predistorter 1200 according to embodiments of the present invention, to eliminate second and third level harmonic distortion IMD, clock it is spuious and
In frequency fdac/4-fout, fdac/2-fout and 3fdac/4-fout image.
The predistorter 1200 can receive data-signal, such as by the data-signal x (n) sent and represent actual portion
The x dividedR(n) and represent data-signal x (n) imaginary part xI(n) fdac/4-fout, fdac/2-, and are respectively represented
The image correction signal yi of fout and 3fdac/4-fout images1(n), yi2(n), yi3(n).The predistorter 1200 can have
Have input, for from search table search or provide correction coefficient.
It is straight that the predistorter 1200 can include two level/harmonic correction part of turning back, three-level are straight/harmonic correction part of turning back
And image rectification part.
In order to provide the second level it is straight/harmonic correction of turning back, actual data signal xR(n) adder can be separately applied to
1211、1212.Dummy data signal xI(n) two adders 1211,1212 can also be applied to.Adder 1211 can sum
Two inputs, to produce (xR(n)+xI(n)), and adder 1212 can obtain the difference between input, to generate (xR(n)-xI
(n)).The output of adder 1211,1212 can be input into frequency mixer 1213.Therefore, the frequency mixer can generate xR(n) flat
Side and xI(n) square between difference, it is [xR(n)]2-[xI(n)]2.The output of frequency mixer 1213 can be frequency mixer
1214 input.Another input of frequency mixer 1214 can be modulation correction coefficient β 1.The output of frequency mixer 1214 can be applied
It is added to adder 1218.
Actual data signal xRAnd imaginary data signal x (n)I(n) frequency mixer 1215 can also be provided to.Frequency mixer
1215 output can be [xR(n)]·[xI(n)].The output of frequency mixer 1216 can be applied to step-by-step deviator 1216, wherein
This is mixed into [xR(n)]·[xI(n) a bit position] is offset, effectively performs and is multiplied by 2.The output of step-by-step deviator 1214
Can be (2x [xR(n)]·[xI(n)]).The output of step-by-step deviator 1216 can be input into frequency mixer 1217.Frequency mixer 1217
Another input can be can from modulation correction look-up table obtain harmonic modulation correction coefficient β 2.The output of frequency mixer 1217
The input of adder 1218 can be applied to.
Adder 1218 is applied to the mixed signal from frequency mixer 1214 and from the mixed frequency signal of frequency mixer 1217,
The output of adder 1218 can provide the second level it is straight/turn back harmonic correction signal.The correction signal can be used for eliminating by DAC
Two level distortion mechanism caused by distortion.Can quilt come the output of self-mixing device 1214 and frequency mixer 1217 by the summation of adder 1218
The adder 1258 being applied in output signal path.
The third level is straight/harmonic correction part of turning back can include input, for by data-signal (for example, xRAnd x (n)I
(n)), and for passing through second sequentially straight/signal caused by harmonic that turns back (for example, [xR(n)]2-[xI(n)]2).In order to
Three-level/harmonic correction of turning back, True Data signal x are providedR(n) two inputs of frequency mixer 1220 can be input into, it is flat
Square True Data signal, and arrive the input of frequency mixer 1221.The output of frequency mixer 1220 can be [xR(n)]2, and it is mixed
The output of frequency device 1220 can be input into step-by-step deviator 1222, and it offsets the mixing [xR(n)]21 bit value, it is performed
It is multiplied by 2.The output of step-by-step deviator 1222 can be (2x [xR(n)]2).The output of step-by-step deviator 1222, which can be applied to, to be added
Musical instruments used in a Buddhist or Taoist mass 1223.
Signal [xR(n)]2-[xI(n)]2It can be input into by displacement 1224, its shifted signal [xR(n)]2-[xI(n)]2With
Functionally it is multiplied by 3.Step-by-step deviator 1224 with adder 1224.1 can one bit value of shifted signal, and add corresponding
Place value is multiplied by 3 operation to perform.The output of step-by-step deviator 1224 and adder 1224.1 can be applied to adder 1223,
The difference that adder 1223 can be produced and exported between its two inputs (that is, offsets [xR(n)]2[xR(n)]2-[xI(n)]2It
Between difference).The output of adder 1223 can be another input of frequency mixer 1221, and the output of frequency mixer 1221 can be with
It is an input of frequency mixer 1225.Another input of frequency mixer 1225 can be modulation correction coefficient β 3.Frequency mixer
1225 output can be applied to adder 1226.
In addition, dummy data signal xI(n) can be frequency mixer 1227 input.Signal [xR(n)]2-[xI(n)] 2 can apply
It is added to adder 1229.Signal [xR(n)]2A bit value can be shifted by step-by-step deviator 1230, to be functionally multiplied by
2, and the output of step-by-step deviator 1230 can be applied to adder 1229.The output of adder 1229 can be frequency mixer
1227 another input.The output of frequency mixer 1227 can be another input of frequency mixer 1228, and frequency mixer
1228 input can be modulation correction coefficient β 4.The output of frequency mixer 1228 can be applied to adder 1226.
The output of adder 1226 can directly provide the third level/turn back harmonic correction signal.The correction signal can be used for
Eliminate the distortion as caused by the third-order distortion mechanism in DAC.The output of adder 1226 can be applied in output signal path
In adder 1156.
Corresponding to the image correction signal yi of fdac/4-fout images1(n) adding in output signal path can be input into
Musical instruments used in a Buddhist or Taoist mass 1253.Corresponding to the image rectification yi of fdac/2-fout images2(n) addition that can be input into output signal path
Device 1252.Corresponding to the image rectification yi of 3*fdac/4-fout images3(n) addition that can be input into output signal path
Device 1251.
Other correction signals may include intermodulation correction signal.Intermodulation correction signal yimd (n), which can be applied to, to be exported
Adder 1250 in signal path.The correction signal can be used in the DAC output spectrums that correction is widely separated in frequency
The intermodulation distortion product that the product of any two channel is formed.In DAC switches it is non-linear and in signal chains other are non-linear
These intermodulation products can be produced.Meanwhile parasitic noise correction signal yspur (n) can be added in output signal path
Adder 1250.Clutter noise correction signal can be used for remove be present in output spectrum fdac/4 clocks it is spuious.This can be with
It is for example spuious caused by the digital active of the fdac/4 speed on chip.The yimd (n) and yspur of adder 1250
(n) summation can be applied to the adder 1151 in output signal path.
Real data signal xR (n) can be applied to the adder 1254 in output signal path.Output signal path
It may include the adder 1150-1154 input signal that can be merged, and be input to adder 1256.Three-level harmonic correction is believed
Number can be input into the input of adder 1256, with composograph correction and data signal assembled.Adder 1256 it is defeated
Go out to be applied to the input of adder 1258, wherein it is added the output of three-level harmonic correction.The output of adder 1258
Can be the output of predistorter 1100, as real signal y (n).
The predistored output signal y (n) can include image correction signal yi1(n), yi2(n), yi3(n), harmonic correction
Signal, clock positive correction signal and data-signal xR (n).Certainly, depending on application, the various combination of correction signal can be by group
Close to form predistored output signal y (n).For example, due to processing variation, it is miscellaneous that some DAC may not show obvious clock
Dissipate energy.In such a case, it is possible to the spuious correction signal of clock is not needed.Further, since indivedual DAC different sensitiveness,
Not every distortion component may be present in all DAC output.In this case, only application is defeated corresponding to DAC is present in
The predistortion item of distortion component in going out.
The predistorter 1200 can provide efficient harmonic wave and image rectification, and reduce part count simultaneously, i.e., mixed
Frequency device (multiplier).For example, predistorter 1200 can include nine frequency mixers in its harmonic correction part, in second level part
Four, and third level part five.Under normal circumstances, frequency mixer is unnecessary and unpredictable dry to system increase
Disturb.Therefore, the quantity that frequency mixer is reduced in pre-distortion system provides higher performance.In addition, when parallel channel number in system
During increase, component is reduced and can become more apparent upon.For example, in eight parallel route systems, two are reduced in predistorter
Frequency mixer (for example, 9 frequency mixers of Fig. 9 11 frequency mixers to Figure 12) can expand to reduces by 16 mixing in systems
Device.
Some features and the present invention aspect have been shown and referring in detail to specific embodiment describe, by way of example,
Rather than by way of limitation.It will be appreciated by those skilled in the art that alternate embodiments and to disclosed embodiment
Within various improvement are the scope of the present invention and considered.
Claims (22)
1. a kind of pre-distortion system, to produce pre-distorted signals, including:
Two level harmonic correction portion, the two level harmonic correction portion include first group of frequency mixer with real part and void based on data-signal
Portion produces second harmonic correction signal and produces at least one M signal and produced for second harmonic correction signal, wherein
The difference of two squares of the real and imaginary parts of the data-signal, Yi Jiqi are produced using at least one frequency mixer in first group of frequency mixer
In two other frequency mixer in first group of frequency mixer there is the input for being used for first group of correction coefficient;
Three-level harmonic correction part, the three-level harmonic correction part include second group of frequency mixer with based on the data-signal
Real and imaginary parts and at least one M signal produce third harmonic correction signal;
Image correcting section, produce image correction signal;And
For the output end of pre-distorted signals, wherein, the pre-distorted signals are second harmonic correction signal, third harmonic correction
The combination of signal and image correction signal.
2. pre-distortion system as claimed in claim 1, wherein, the pre-distortion system includes the frequency mixer less than 12.
3. pre-distortion system as claimed in claim 2, wherein, the pre-distortion system includes nine frequency mixers.
4. pre-distortion system as claimed in claim 1, wherein, first group of frequency mixer includes five frequency mixers, Yi Jisuo
Stating second group of frequency mixer includes four frequency mixers.
5. pre-distortion system as claimed in claim 1, wherein, first group of frequency mixer includes four frequency mixers, Yi Jisuo
Stating second group of frequency mixer includes five frequency mixers.
6. pre-distortion system as claimed in claim 1, wherein, at least one M signal includes the flat of solid part signal
Side.
7. pre-distortion system as claimed in claim 1, wherein, at least one M signal includes the data-signal
The difference of two squares of real and imaginary parts.
8. pre-distortion system as claimed in claim 1, wherein, second and third harmonic correction signal be also based on number of responses it is believed that
Number type and the correction coefficient selected.
9. pre-distortion system as claimed in claim 1, wherein, the pre-distortion system is provided and changed with digital-to-analog
On the shared integrated circuit of device (DAC).
10. pre-distortion system as claimed in claim 1, wherein, the output end is coupled to DAC, and the predistortion system
System provides to be divided on the integrated circuits opened with the DAC.
11. a kind of pre-distortion system, including:
Harmonic correction module, the harmonic correction module include multiple frequency mixers with the real and imaginary parts based on input data signal
And harmonic correction signal is produced in response to one group of correction coefficient of input data signal type selecting,
Wherein described harmonic correction module is included in first group of frequency mixer in second harmonic correction unit to produce second harmonic school
Positive signal, and use the flat of the real and imaginary parts of at least one frequency mixer generation data-signal in first group of frequency mixer
Two other frequency mixer in variance, and wherein first group of frequency mixer has for the first subset in this group of correction coefficient
Input;
Image correction module, produce image correction signal;
Combiner modules, the harmonic correction signal and described image correction signal are combined to produce pre-distorted signals.
12. pre-distortion system as claimed in claim 11, wherein
The second harmonic correction unit, including
First frequency mixer, square real part, xR(n);
Second frequency mixer, square imaginary part, xI(n);
First adder, the difference between the output of first frequency mixer and the second frequency mixer is produced,
Three-mixer, by xRAnd x (n)I(n) it is multiplied;
First step-by-step deviator, the output of the three-mixer is shifted,
4th frequency mixer, the output of the first adder is multiplied with the first correction coefficient,
5th frequency mixer, the output of the first step-by-step deviator is multiplied with the second correction coefficient, and
Second adder, with reference to the output of the 4th frequency mixer and the 5th frequency mixer to produce second harmonic correction signal;And
Wherein described harmonic correction module also includes
Third harmonic correction unit, including
Second step-by-step deviator, there is the imaginary part that associated offset adder is squared to shift, xI(N)2,
3rd adder, produce the real part being squared, xR(n)2And second step-by-step deviator output between difference,
6th frequency mixer, by xR(n) output with the 3rd adder is multiplied,
3rd step-by-step deviator, there is associated offset adder to shift xR(n)2,
4th adder, produce output and the x of the 3rd step-by-step deviatorI(n)2Between difference,
7th frequency mixer, by xI(n) output with the 4th adder is multiplied,
8th frequency mixer, the output of the 6th frequency mixer is multiplied with the 3rd correction coefficient,
9th frequency mixer, the output of the 7th frequency mixer is multiplied with the 4th correction coefficient, and
Fifth adder, the output of the 8th frequency mixer and the 9th frequency mixer is combined to produce third harmonic correction signal.
13. pre-distortion system as claimed in claim 11, wherein
The second harmonic correction unit, including
First adder, produce real part xRAnd imaginary part x (n)I(n) difference between,
Second adder, produce real part xRAnd imaginary part x (n)I(n) summation,
First frequency mixer, the output of the first adder and second adder is multiplied to produce [xR(n)]2-[xI(n)]2,
Second frequency mixer, by xRAnd x (n)I(n) it is multiplied,
First step-by-step deviator, the output of second frequency mixer is shifted,
Three-mixer, the output of first frequency mixer is multiplied with the first correction coefficient;
4th frequency mixer, the output of the first step-by-step deviator is multiplied with the second correction coefficient, and
3rd adder, the output of the three-mixer and the 4th frequency mixer is combined to produce second harmonic correction signal;With
And
Wherein described harmonic correction module also includes
Third harmonic correction unit, including
5th frequency mixer, square xR(n) to produce xR(n)2,
Second step-by-step deviator, the output of the 5th frequency mixer is shifted,
3rd step-by-step deviator, there is associated offset adder to shift [xR(n)]2-[xI(n)]2,
4th adder, produce the difference between the second step-by-step deviator and the output of the 3rd step-by-step deviator;
6th frequency mixer, by xR(n) output with the 4th adder is multiplied,
4th step-by-step deviator, shift xR(n)2,
Fifth adder, combine [xR(n)]2-[xI(n)]2With the output of the 4th step-by-step deviator,
7th frequency mixer, by xI(n) it is multiplied with the output of fifth adder,
8th frequency mixer, the output of the 6th frequency mixer is multiplied with the 3rd correction coefficient,
9th frequency mixer, the output of the 7th frequency mixer is multiplied with the 4th correction coefficient, and
6th adder, the output of the 8th frequency mixer and the 9th frequency mixer is combined to produce third harmonic correction signal.
14. pre-distortion system as claimed in claim 11, wherein, the pre-distortion system includes the mixing less than 12
Device.
15. pre-distortion system as claimed in claim 11, wherein, the pre-distortion system includes nine frequency mixers.
16. pre-distortion system as claimed in claim 11, wherein, the harmonic correction module includes:
Secondary correction module, to produce second harmonic correction signal and M signal;
Three-level correction module, third harmonic correction signal is produced to be at least partially based on the M signal.
17. pre-distortion system as claimed in claim 11, further comprises emitter, sent out to digital-analog convertor (DAC)
Send pre-distorted signals.
18. pre-distortion system as claimed in claim 11, wherein, the pre-distortion system provides to be turned with digital-to-analog
On the shared integrated circuit of parallel operation (DAC).
19. pre-distortion system as claimed in claim 11, wherein, the pre-distortion system provides is dividing that opens to integrate with DAC
On circuit.
A kind of 20. method for producing pre-distorted signals:
Data-signal is received, the data-signal includes real and imaginary parts;
The real and imaginary parts and first group of correction coefficient are based on using first group of frequency mixer and produce second harmonic correction signal,
The generation produces the real and imaginary parts of the data-signal including the use of at least one frequency mixer in first group of frequency mixer
The difference of two squares and first group of correction coefficient is input in two other frequency mixer in first group of frequency mixer, wherein, producing
During second harmonic correction signal, at least one M signal is produced;
Based on the real and imaginary parts, second group of correction coefficient and at least one M signal, third harmonic school is produced
Positive signal;
Produce image correction signal;And
The second harmonic correction signal, the third harmonic correction signal and described image correction signal are combined to produce pre-
Distorted signal.
21. method as claimed in claim 20, wherein, produce the second harmonic using the frequency mixer less than 12 and correct
Signal and third harmonic correction signal.
22. method as claimed in claim 21, wherein, it is humorous using nine frequency mixers generation second harmonic correction signals and the 3rd
Ripple correction signal.
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PCT/US2013/047644 WO2014004525A1 (en) | 2012-06-27 | 2013-06-25 | Digital pre-distortion |
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