CN104685639B

CN104685639B - Photo-electric conversion element

Info

Publication number: CN104685639B
Application number: CN201380049644.3A
Authority: CN
Inventors: 原田真臣; 木本贤治; 小出直城; 山元良高; 中村京太郎
Original assignee: Sharp Corp
Current assignee: Sharp Corp
Priority date: 2012-09-25
Filing date: 2013-09-19
Publication date: 2016-11-30
Anticipated expiration: 2033-09-19

Abstract

A kind of photo-electric conversion element is provided, including the semiconductor substrate of the first conductivity type, the first semiconductor film of the first conductivity type being arranged on a surface of this semiconductor substrate, the second semiconductor film of the second conductivity type being provided independently from from this first semiconductor film on a surface and be arranged on the deielectric-coating between this semiconductor substrate and this first semiconductor film and/or between this semiconductor substrate and this second semiconductor film, on this first semiconductor film and on this second semiconductor film, it is formed with intermetallic compounds layer.

Description

Photo-electric conversion element

Technical field

The present invention relates to the manufacture method of photo-electric conversion element and photo-electric conversion element.

Background technology

In recent years, especially from the viewpoint of global environmental problems, solar energy is converted directly into the solar cell of electric energy Expectation as the energy of future generation is increased sharply.In solar cell, have and employ compound semiconductor or organic material The solar cell of the various kind such as solar cell, but currently become the solar cell being the use of silicon wafer of main flow.

Now, manufacturing and sell most solar cells is the face i.e. sensitive surface in the side of sunlight incidence and sensitive surface The opposition side i.e. back side form respectively the solar cell of structure of electrode.

But, in the case of sensitive surface defines electrode, due to because of the reflection of the sunlight in electrode and absorption, institute Amount with incident sunlight reduces the amount of the area corresponding to electrode.Therefore, advancing such as in JP 2010-80887 The exploitation of the solar cell only defining electrode overleaf shown in number publication (patent documentation 1).

Prior art literature

Patent documentation

Patent documentation 1: JP 2010-80887 publication

Summary of the invention

The problem that invention is to be solved

Hereinafter, with reference to the schematic cross sectional views of Figure 28～Figure 44, illustrate to define the most overleaf the solar cell of electrode One example of manufacture method.First, as shown in figure 28, at the monocrystalline by the N-shaped defining texture structure (not shown) at sensitive surface On the back side of c-Si (n) substrate 901 that silicon is constituted, form the amorphous silicon film of i type and the amorphous silicon film of p-type according to this sequential layer Folded a-Si (i/p) layer 902.

Then, as shown in figure 29, on the sensitive surface of c-Si (n) substrate 901, the amorphous silicon film of i type and the non-of N-shaped are formed Crystal silicon film is according to a-Si (i/n) layer 903 of this order stacking.

Then, as shown in figure 30, the back side of a part for a-Si (i/p) layer 902 forms photoresist film 904.Here, After being coated with photoresist in the whole face at the back side of a-Si (i/p) layer 902, pass through photolithography (Photolithography) technology and etching technique and photoresist is carried out pattern formation, thus form photoresist film 904.

Then, as shown in figure 31, using photoresist film 904 as mask, a part for a-Si (i/p) layer 902 is lost Carve, so that the back-exposure of c-Si (n) substrate 901.

Then, as shown in figure 32, after eliminating photoresist film 904, as shown in figure 33, photoresist film is removed to cover 904 and the back side of a-Si (i/p) layer 902 that exposes and the side at the back side of c-Si (n) substrate 901 exposed by etching Formula, forms the amorphous silicon film of i type and the amorphous silicon film of N-shaped a-Si (i/n) layer 905 according to this order stacking.

Then, as shown in figure 34, the back side of a part for a-Si (i/n) layer 905 forms photoresist film 906.Here, After being coated with photoresist in the whole face at the back side of a-Si (i/n) layer 905, by photolithography technology and etching Technology and photoresist is carried out pattern formation, thus form photoresist film 906.

Then, as shown in figure 35, using photoresist film 906 as mask, a part for a-Si (i/n) layer 905 is lost Carve, so that the back-exposure of a-Si (i/p) layer 902.

Then, as shown in figure 36, after eliminating photoresist film 906, as shown in figure 37, photoresist film is removed to cover 906 and the back side of a-Si (i/n) layer 905 that exposes and the side at the back side of a-Si (i/p) layer 902 exposed by etching Formula, forms transparent conductive oxide film 907.

Then, as shown in figure 38, the back side of a part for transparent conductive oxide film 907 forms photoresist film 908.This In, after being coated with photoresist in the whole face at the back side of transparent conductive oxide film 907, by photolithography technology with And etching technique and photoresist is carried out pattern formation, thus form photoresist film 908.

Then, as shown in figure 39, using photoresist film 908 as mask, a part for transparent conductive oxide film 907 is carried out Etching, so that the back-exposure of a-Si (i/p) layer 902 and a-Si (i/n) layer 905.

Then, as shown in figure 40, after eliminating photoresist film 908, as shown in figure 41, to cover a-Si (i/p) layer The mode at the back side of the back side of the exposure of 902 and a-Si (i/n) layer 905 and a part for transparent conductive oxide film 907, shape Become photoresist film 909.Here, by the back side of the exposure at a-Si (i/p) layer 902 and a-Si (i/n) layer 905 and transparent After the whole face at the back side of conductive oxide film 907 is coated with photoresist, by photolithography technology and etching technique Photoresist is carried out pattern formation, thus forms photoresist film 909.

Then, as shown in figure 42, in whole the formation at the back side of transparent conductive oxide film 907 and photoresist film 909 Back electrode layer 910.

Then, as shown in figure 43, photoresist film 909 and back electrode layer 910 are removed by peeling off (lift-off), Make only at the part residual back electrode layer 910 on the surface of transparent conductive oxide film 907.

Then, as shown in figure 44, the surface of a-Si (i/n) layer 903 forms antireflection film 911.

But, in the manufacture method of above-mentioned solar cell, need to carry out the coating of photoresist and based on photoetch , there is the sun electricity defining electrode the most overleaf in the complicated pattern formation process of the photoresist of lithographic techniques and etching technique The most troublesome problem of manufacturing process in pond.Furthermore it is required that improve the conversion of the solar cell only defining electrode overleaf Efficiency.

The present invention completes in view of present situation described above, its object is to, it is provided that one can improve generating efficiency And the photo-electric conversion element that can be manufactured by simple manufacturing process.

For solving the means of problem

The photo-electric conversion element of the present invention possesses the semiconductor film of the both sides of p-type and N-shaped at the back side of semiconductor substrate, It is formed above intermetallic compounds layer at this semiconductor film.Further, change between the metal formed above p-type semiconductor film Compound layer and the intermetallic compounds layer formed above n-type semiconductor film are isolated by space.

That is, the photo-electric conversion element of the present invention is characterised by, including: the semiconductor substrate of the first conductivity type；First leads First semiconductor film of electricity type, is arranged on a surface of this semiconductor substrate；Second semiconductor film of the second conductivity type, with This first semiconductor film is independently positioned on this surface；And deielectric-coating, it is arranged on this semiconductor substrate and this first half is led Between body film and/or between this semiconductor substrate and this second semiconductor film, on this first semiconductor film and this second half Intermetallic compounds layer it is formed with on electrically conductive film.

Here, it is preferred that the above-mentioned surface configuration at above-mentioned semiconductor substrate has groove, it is provided with above-mentioned in the bottom surface of this groove Two semiconductor films.

Further, at least some of of sidewall being suitable for above-mentioned groove is capped by dielectric film.

In addition it is also possible on a surface of above-mentioned semiconductor substrate, above-mentioned first semiconductor film and above-mentioned the second half Electrically conductive film is isolated and is arranged, and is provided with dielectric film between this first semiconductor film and this second semiconductor film.

Furthermore it is preferred that above-mentioned intermetallic compounds layer is metal silicide layer and/or metal germanide layer.Here, it is preferred that This metal silicide layer is the compound layer being made up of at least one metal and silicon, this at least one metal from by nickel, cobalt and Selecting in the group that titanium is constituted, this metal germanide layer is suitable for the compound layer being made up of at least one metal and germanium, and this is at least A kind of metal selects from the group being made up of nickel, cobalt and titanium.

Furthermore it is preferred that above-mentioned dielectric film is thermal oxidation silicon film and/or silicon nitride film, it is the feelings of silicon nitride film at this dielectric film Under condition, this silicon nitride film fits through plasma CVD method and is formed.

Moreover, it relates to the manufacture method of above-mentioned photo-electric conversion element, this manufacture method is characterised by, bag Include following operation: on the surface of semiconductor substrate being included in the first conductivity type the first the half of the first conductivity type of exposure Whole of this face side of the second semiconductor film of electrically conductive film and the second conductivity type, forms the operation of metal level；And pass through Heat treatment and make this first semiconductor film and this second semiconductor film and this metal level carry out reacting and forming intermetallic The operation of nitride layer.

Here, it is preferred that the operation forming above-mentioned intermetallic compounds layer is the operation forming metal silicide layer, and enter One step includes removing the operation of unreacted metal level after forming the operation of this metal silicide layer.

Additionally, the operation forming above-mentioned intermetallic compounds layer can also be the operation forming metal germanide layer, and Farther include to remove the operation of unreacted metal level after forming the operation of this metal germanide layer.

Further, above-mentioned metal level is preferably by least one the metal structure selected from the group that nickel, cobalt and titanium are constituted The layer become.

It addition, in this manual, the first conductivity type represents that N-shaped or p-type, the second conductivity type represent that being different from first leads The p-type of electricity type or N-shaped.

Invention effect

Generating efficiency and the light that can be manufactured can be improved by simple manufacturing process in accordance with the invention it is possible to provide Electric transition element.

Accompanying drawing explanation

Fig. 1 is the schematic sectional view of the photo-electric conversion element of the first embodiment.

Fig. 2 is the schematic sectional view of the photo-electric conversion element of the second embodiment.

Fig. 3 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 4 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 5 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 6 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 7 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 8 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Fig. 9 is that a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment is entered The diagrammatic schematic sectional view of row.

Figure 10 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 11 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 12 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 13 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 14 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 15 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 16 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 17 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the first embodiment Carry out diagrammatic schematic sectional view.

Figure 18 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 19 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 20 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 21 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 22 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 23 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 24 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 25 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 26 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 27 is a part for the manufacturing process of an example of the manufacture method of the photo-electric conversion element to the second embodiment Carry out diagrammatic schematic sectional view.

Figure 28 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 29 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 30 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 31 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 32 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 33 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 34 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 35 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 36 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 37 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 38 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 39 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 40 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 41 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 42 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 43 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Figure 44 is of the manufacturing process of an example of the manufacture method to the solar cell defining electrode the most overleaf Divide and carry out diagrammatic schematic sectional view.

Detailed description of the invention

Hereinafter, embodiments of the present invention are described.It addition, in the accompanying drawing of the present invention, be set to identical reference numeral table Show same section or moiety.

＜ embodiment 1 ＞

[photo-electric conversion element]

" overall structure "

Fig. 1 is denoted as the schematic sectional view of the photo-electric conversion element 1 of first embodiment of the present invention.As The photo-electric conversion element 1 of one embodiment has the semiconductor substrate 3 being made up of N-shaped monocrystal silicon, at one of semiconductor substrate 3 The face i.e. part at the back side, is provided with the groove 11 of the sidewall 11b possessing bottom surface 11a and its both sides.Here, groove 11 is along Fig. 1's The normal direction of paper extends.

On region beyond the groove at the back side of semiconductor substrate 3, it is provided with the first medium being made up of the non-crystalline silicon of i type Film 7, on first medium film 7, is provided with the first semiconductor film 8 being made up of the non-crystalline silicon of N-shaped.Further, at the first quasiconductor On the whole back side of film 8, it is formed with intermetallic compounds layer 15.

Here, in this manual, " semiconductor film " is represented by the material that can be given electric conductivity by impurity The film constituted.As such semiconductor film, such as, can enumerate silicon fiml, germanium film, GaAs film etc..

The impurity of N-shaped or p-type additionally, " i type " means the most deliberately to adulterate, is making opto-electronic conversion the most sometimes Inevitably spread etc. by the impurity of N-shaped or p-type after element and represent the conductivity type of N-shaped or p-type.

Additionally, " non-crystalline silicon " also includes the free key (dangling bonds (dangling of the silicon atom of amorphous silicon hydride etc. Bond) silicon) being terminated by hydrogen.Similarly, " amorphous germanium " includes hydrogenated amorphous germanium etc..

On the bottom surface 11a of the groove 11 at the back side of semiconductor substrate 3, it is provided with second Jie being made up of the non-crystalline silicon of i type Plasma membrane 12, on second medium film 12, is provided with the second semiconductor film 13 being made up of the non-crystalline silicon of p-type.Further, the second half On the whole back side of electrically conductive film 13, it is formed with intermetallic compounds layer 15.

Dielectric film 16 can also be provided with at least partially at the sidewall 11b of groove 11.In that case, due to It is provided with dielectric film 16 between second medium film 12 and the second semiconductor film 13 and the sidewall 11b of groove 11, so second medium film 12 and second semiconductor film 13 do not contact with sidewall 11b.

Additionally, on whole of another face i.e. sensitive surface (face of the opposition side at the back side) of semiconductor substrate 3, arrange There is the 3rd deielectric-coating 4 being made up of the non-crystalline silicon of i type, on whole of the 3rd deielectric-coating 4, be provided with by the non-crystalline silicon of N-shaped The 3rd semiconductor film 5 constituted.Further, on whole of the 3rd semiconductor film 5, it is provided with antireflection film 6.

In the photo-electric conversion element 1 with above structure, at the back side of semiconductor substrate 3 and the first semiconductor film 8 The back side between be provided with first medium film 7, between the bottom surface 11a and the back side of the second semiconductor film 13 of groove 11, be provided with Second medium film 12.

Therefore, in photo-electric conversion element 1, between the back side of the back side of semiconductor substrate 3 and the first semiconductor film 8, And the Zone Full between the back side of the bottom surface 11a of groove 11 and the second semiconductor film 13 is provided with deielectric-coating.

Additionally, in photo-electric conversion element 1, due on the whole back side of the first semiconductor film 8 and the second quasiconductor It is provided with intermetallic compounds layer 15 on the whole back side of film 13, so the first semiconductor film 8 and the second semiconductor film 13 All it is capped by intermetallic compounds layer 15.

It addition, in photo-electric conversion element 1, illustrating the first semiconductor film 8 for N-shaped and the second semiconductor film 13 is p-type Structure, even if the first semiconductor film is p-type and the second semiconductor film is N-shaped, also shows that the effect of the present invention.

Additionally, in photo-electric conversion element 1, it is illustrated in sensitive surface and is provided with the structure of the 3rd semiconductor film 5, but the 3rd half Electrically conductive film 5 it is not necessary to key element, even not having the structure of the 3rd semiconductor film 5, also show that the effect of the present invention.

Hereinafter, illustrate to constitute each key element of the photo-electric conversion element of present embodiment.

" semiconductor substrate "

As semiconductor substrate 3, typically, it is possible to use the substrate being made up of N-shaped monocrystal silicon, but material is not limited to This, it is possible to it is widely used from known material.For example, it is also possible to use the base being made up of germanium or gallium arsenide compound Plate, additionally, in addition to monocrystal substrate, it is also possible to use polycrystalline substrate or amorphous substrate.Additionally, for example, it is also possible to be in advance The semiconductor substrate etc. of texture structure (not shown) is defined at the sensitive surface of semiconductor substrate 3 and/or the back side.

The thickness of preferred semiconductor substrate 3 is below more than 50 μm and 300 μm.It is in by the thickness of semiconductor substrate 3 In the range of Gai, it is possible to prevent the electronics generated in semiconductor substrate 3 and hole to being combined, it is possible to reduce power attenuation.This In, as the thickness of semiconductor substrate 3, further preferred range is below more than 100 μm and 200 μm.

Additionally, the impurity concentration of semiconductor substrate 3 is also not particularly limited, for instance, it is possible to it is set to 5 × 10¹⁴Individual/cm³With Upper and 2 × 10¹⁶Individual/cm³Below.As the impurity comprised in semiconductor substrate 3, for instance, it is possible to use phosphorus, boron etc..

" groove "

Additionally, degree of depth D of groove 11 is not particularly limited, for instance, it is possible to be set to below 10 μm, it is preferably able to be set to 5 μm Below.

" dielectric film "

As dielectric film 16, as long as resistivity has 1 × 10⁴The film of the insulating properties of more than Ω cm, the most special Limit, it is possible to use known dielectric film.For instance, it is possible to enumerate silicon oxide film, silicon nitride film, aluminium nitride film, aluminium oxide Film, oxidation titanium film or these and with etc..

Wherein, the silicon oxide film being especially suitable for being formed by thermal oxide (in this manual, is also recited as thermal oxidation silicon Film).Owing to thermal oxidation silicon film is formed at the high temperature of about 1000 DEG C, so 250 DEG C of left sides in the manufacturing process of solar cell Right pyroprocess also will not change its character and represent good passivation (Passivation) effect.Further, the most excellent Selection of land, in addition to thermal oxidation silicon film is carried out thermal oxidation, is also adaptable for carrying out hydrogen anneal process.By hydrogen anneal process, The dangling bonds that can make semiconductor substrate 3 and thermal oxidation silicon membrane interface is terminated by hydrogen.

Additionally, dielectric film 16 is by plasma CVD (chemical vapor deposition (Chemical Vapor Deposition)) Method and the silicon nitride film that formed also is one of preferred mode.In the case of forming silicon nitride film by plasma CVD method, Unstrpped gas uses by silane gas (SiH₄) and ammonia gas (NH₃) etc. composition mixed gas, from this unstrpped gas Hydrogen residual dielectric film after its formation in.

Remain in the existence of hydrogen in dielectric film described above, the most bad from the viewpoint of impurity.But, the present inventor The following situation of new discovery: in possessing the photo-electric conversion element of structure of the present invention, because of light deterioration etc. and hydrogen in non-crystalline silicon In the case of disengaging, remain in the hydrogen in dielectric film and there is the function compensating this hydrogen defect.Therefore, by making in dielectric film Containing hydrogen, it is possible to realize the long service life of photo-electric conversion element.

Here, the hydrogen amount in dielectric film is preferably more than 0.005at% and below 0.03at%.If exceeding 0.03at%, then in the solar cell manufacture process after dielectric film is formed, hydrogen is easily separated from, and easily produces and stick up in dielectric film Song or stripping, bad.If it is additionally, less than 0.005at%, then there is the situation that can not fully obtain effect described above, bad.

It addition, hydrogen amount such as can pass through FT-IR method, the signal coming from N-H or Si-H is integrated, thus Estimate.Additionally, " at% " expression " atomic percent (atomic percentage) ", i.e. represent atom number concentration.

Additionally, dielectric film 16 can be monofilm, it is also possible to be stacked film.That is, the dielectric film of the present invention is preferably hot oxygen SiClx film and/or silicon nitride film.

Further, preferably dielectric film 16 covers sidewall 11b at least some of of groove 11, more preferably dielectric film 16 Longer than the summation of second medium film 12 and the thickness of the second semiconductor film 13 with the length that the sidewall 11b of groove 11 contacts, Be preferably adapted for that dielectric film 16 covers the sidewall 11b of groove 11 whole.Furthermore it is preferred that dielectric film 16 is relative to semiconductor substrate In the arbitrary vertical section on the surface of 3, a length of more than the 1nm and 500nm of the part contacted with the bottom surface 11a of groove 11 with Under.If above-mentioned length is less than 1nm, then exists and can not fully obtain the situation of effect electrically separated to p-type electrode and n-type electrode, If more than 500nm, then there is the situation being peeling the discomfort waited when etching, bad.

" semiconductor film "

In the present invention, it is preferred to the first semiconductor film, the second semiconductor film and the 3rd semiconductor film are amorphous film, typical case For the film being made up of the non-crystalline silicon of the electric conductivity representing p-type or N-shaped and/or amorphous germanium.Hereinafter, each semiconductor film is described.

(the first semiconductor film)

As the first semiconductor film 8, be not limited to the film being made up of the non-crystalline silicon of N-shaped, such as can also use from Amorphous semiconductor film etc. toward known N-shaped.Additionally, for example, it is also possible to include the film being made up of the amorphous germanium of N-shaped.The first half The thickness of electrically conductive film 8 is not particularly limited, such as, can be set to more than 1nm and below 20nm.Here, as at the first quasiconductor The p-type impurity comprised in film 8, such as can use phosphorus, the p-type impurity concentration of the first semiconductor film 8 such as can be set to 5 × 10¹⁹Individual/cm³Left and right.

(the second semiconductor film)

As the second semiconductor film 13, be not limited to the film being made up of the non-crystalline silicon of p-type, such as can also use from Amorphous semiconductor film etc. toward known p-type.Additionally, for example, it is also possible to include the film being made up of the amorphous germanium of p-type.The second half The thickness of electrically conductive film 13 is not particularly limited, such as, can be set to more than 1nm and below 20nm.Here, lead as the second half The n-type impurity comprised in body film 13, such as, can use boron, the n-type impurity concentration of the second semiconductor film 13 such as can be set to 5 ×10¹⁹Individual/cm³Left and right.

(the 3rd semiconductor film)

As long as the 3rd semiconductor film 5 represents the film of light transmission, then it is not particularly limited, such as, can also use from the past The amorphous semiconductor film etc. of known N-shaped.The thickness of the 3rd semiconductor film 5 is not particularly limited, such as, can be set to more than 1nm And below 20nm.As the p-type impurity comprised in the 3rd semiconductor film 5, such as, can use phosphorus, the n of the 3rd semiconductor film 5 Type impurity concentration such as can be set to 5 × 10¹⁹Individual/cm³Left and right.

" deielectric-coating "

In the present invention, deielectric-coating is following film: is formed between semiconductor substrate and each semiconductor film, does not hinder and partly lead Conductivity between structure base board and each semiconductor film, by semiconductor substrate and the interface passivation of each semiconductor film.As such Deielectric-coating, the undoped film of preferably i type, for instance, it is possible to suitably use the film being made up of the non-crystalline silicon etc. of i type.Hereinafter, explanation Each deielectric-coating.

(first medium film)

First medium film 7 is formed between semiconductor substrate 3 and the first semiconductor film 8.As first medium film 7, not It is defined in the film being made up of the non-crystalline silicon of i type, such as, can also use the amorphous semiconductor film etc. from known i type.The The thickness of one deielectric-coating 7 is not particularly limited, such as, can be set to more than 1nm and below 20nm.

(second medium film)

Second medium film 12 is formed between semiconductor substrate 3 and the second semiconductor film 13.As second medium film 12, and It is not limited to the film being made up of the non-crystalline silicon of i type, such as, can also use the amorphous semiconductor film etc. from known i type. The thickness of second medium film 12 is not particularly limited, such as, can be set to more than 1nm and below 20nm.

(the 3rd deielectric-coating)

3rd deielectric-coating 4 is formed between semiconductor substrate 3 and the 3rd semiconductor film 5.As the 3rd deielectric-coating 4, not It is defined in the film being made up of the non-crystalline silicon of i type, such as, can also use the amorphous semiconductor film etc. from known i type.The The thickness of three deielectric-coating 4 is not particularly limited, such as, can be set to more than 1nm and below 20nm.

" intermetallic compounds layer "

The intermetallic compounds layer 15 of the present invention has the function as p-type electrode or n-type electrode.Change as between metal Compound layer 15, is preferably the intermetallic compounds layer of the electrical conductivity representing metal, is further preferably suitably for metal silicide Layer and/or metal germanide layer.

Here, as metal silicide, for instance, it is possible to enumerate nickel silicide (NiSi), cobalt silicide (CoSi₂), titanium silicon Compound (TiSi₂), molybdenum silicide (MoSi₂), palladium silicide (PdSi), Platinum Silicide (PtSi), manganese silicide (MnSi_1.7), tungsten Silicide (WSi₂) etc..Further, wherein, it is possible to be suitably used nickel silicide, cobalt silicide, Titanium silicide and these also With.That is, the metal silicide layer of the present invention is preferably the compound layer being made up of at least one metal and silicon, this at least one gold Belong to and selecting from the group being made up of nickel (Ni), cobalt (Co) and titanium (Ti).

Additionally, as metal germanide, for instance, it is possible to enumerate nickel germanide (NiGe, NiGe₂), cobalt germanide (CoGe₂)、 Titanium germanide (TiGe₂), molybdenum germanide (MoGe₂), palladium germanide, platinum germanide (PtGe), manganese germanide (Mn₅Ge₃), tungsten germanium Compound (WGe₂) etc..Further, wherein, it is possible to be suitably used nickel germanide, cobalt germanide, titanium germanide and these also With.That is, the metal germanide layer of the present invention is preferably the compound layer being made up of at least one metal and germanium, this at least one gold Belong to and selecting from the group being made up of nickel (Ni), cobalt (Co) and titanium (Ti).

It addition, the intermetallic compound of the present invention can also be other element trace doped to above-mentioned compound Compound.Additionally, in these form, be set to each atomic ratio in accordance with above-mentioned general expression.It addition, in the present invention, as above-mentioned that Sample, in the case of being represented by chemical formula by compound, in the case of without particular limitation of atomic ratio, is set to include the most known All atomic ratios, be not merely defined in the scope of Chemical Measurement.Such as, in the case of being simply recited as " NiSi ", The atomic ratio of " Ni " and " Si " is not limited to the situation of 50:50, is set to include known all atomic ratios.

Further, intermetallic compounds layer 15 can also be monolayer, it is also possible to stacked.In addition it is also possible to include SiGe Compound layer.

Additionally, the thickness of intermetallic compounds layer 15 can be set to below more than 0.1 μm and 1.0 μm, the suitableeest It is combined into below more than 0.5 μm and 0.8 μm.

" antireflection film "

As antireflection film 6, such as, can use silicon oxide film, silicon nitride film etc., the thickness of antireflection film 6 is such as More than 10nm and below 200nm can be set to.If the thickness of antireflection film 6 is less than 10nm, then exists and can not fully obtain work For the situation of the effect of antireflection film, if more than 200nm, then sunlight is difficult to pass through, thus bad.

The photo-electric conversion element of such present embodiment is manufactured by following manufacture method.In other words, pass through The photo-electric conversion element manufactured such as following manufacture method represents characteristic described above.Therefore, the photoelectricity of present embodiment turns Changing element is to improve generating efficiency and the photo-electric conversion element that can be manufactured by simple manufacturing process.

[manufacture method of photo-electric conversion element]

Hereinafter, with reference to the schematic cross sectional views of Fig. 3～Figure 17, the photo-electric conversion element 1 as the first embodiment is described An example of manufacture method.It addition, example shown below to low be an example, the order of each operation is not limited to following example, Can suitably change.

First, as it is shown on figure 3, the opposition side of sensitive surface at the semiconductor substrate 3 being made up of N-shaped monocrystal silicon (that is, the back of the body Face), form the alkali-resisting resist film 9 with peristome 10.

Here, resist film 9 is not particularly limited, for instance, it is possible to use, alkali-resisting resist ink is passed through ink-jet method And the position printing beyond the forming part of peristome 10, and it is made to be dried and the resist film etc. that formed.

Then, as shown in Figure 4, by removing the back side of the semiconductor substrate 3 of peristome 10 exposure from resist film 9 A part, formed by bottom surface 11a and from the both sides of bottom surface 11a along the thickness direction of semiconductor substrate 3 extend sidewall 11b structure The groove 11 become.Here, it is preferred that after first passing through dry ecthing and having carried out there is anisotropic etching, by wet etching, go Except the damage layer (damage layer) generated by dry ecthing.

Then, resist film 9 is removed, after cleaning, as it is shown in figure 5, including the bottom surface 11a and sidewall 11b of groove 11 , the back side of semiconductor substrate 3 overall, form dielectric film 16.The forming method of dielectric film 16 is not particularly limited, additionally it is possible to adopt Use known any means.

In the case of dielectric film 16 is silicon oxide film, it also is able to be formed by steam oxidation, atmospheric pressure cvd method etc., but excellent Gated thermal oxidation method and formed.Here, it is preferred that the treatment temperature of thermal oxidation method is 800 DEG C～1100 DEG C.The film of thermal oxidation method Formation is simple method, and compared with other preparation method, the character of the silicon oxide film formed is good, careful and passivation effect is high, It is suitable for.Here, the thickness of the dielectric film 16 formed can be modulated by the process time, such as can be set to more than 1nm and Below 500nm.In addition it is also possible to carry out hydrogen anneal process after thermal oxidation.Here, the treatment temperature example of hydrogen anneal process If being set to 300 DEG C～500 DEG C.

Additionally, in the case of dielectric film 16 is silicon nitride film, also is able to be formed by vapour deposition method etc., but preferably passes through Ion CVD and formed.In the case of forming silicon nitride film by plasma CVD method, it is possible to use by silane (SiH4) The mixed gas etc. that gas and ammonia (NH3) gas are constituted, as unstrpped gas.Here, the thickness energy of the dielectric film 16 formed Enough modulated by masking time or masking pressure etc., such as, can be set to more than 1nm and below 500nm.

Then, as shown in Figure 6, the dielectric film 16 that the planar portions at the back side of semiconductor substrate 3 is formed is removed.So, energy Enough acquisitions define the semiconductor substrate 3 of dielectric film 16 at the sidewall 11b of groove 11.Here, as the method removing dielectric film 16, It is not particularly limited, it is possible to use one of them in dry ecthing, wet etching.

Then, as it is shown in fig. 7, whole of the sensitive surface at the semiconductor substrate 3 being made up of N-shaped monocrystal silicon, will be by i type The 3rd deielectric-coating 4 that constitutes of non-crystalline silicon and the 3rd semiconductor film 5 that is made up of the non-crystalline silicon of N-shaped according to this order the most such as The stacking by plasma CVD method.

Then, as shown in Figure 8, at whole of the 3rd semiconductor film 5, by antireflection film 6 such as by sputtering method, CVD, vapour deposition method etc. and stacking.

Then, as it is shown in figure 9, have the whole of the back side of the semiconductor substrate 3 of dielectric film 16 at the sidewall 11b of groove 11 Face, by the second medium film 12 being made up of the non-crystalline silicon of i type and the second semiconductor film 13 of being made up of the non-crystalline silicon of p-type according to This order such as stacking by plasma CVD method.Here, the second semiconductor film 13 can also be by the non-crystalline silicon structure of p-type The film and the film being made up of the amorphous germanium of p-type that become carry out stacking, now, above the film being made up of the non-crystalline silicon of p-type, and will be by The film such as stacking by plasma CVD method that the amorphous germanium of p-type is constituted.

Then, as shown in Figure 10, at least some of embedment mask material 14 of groove 11.Here, mask material 14 is to groove The embedment of 11 such as can be set to molten condition by heating mask material 14, by ink-jet method with embedment groove 11 Mode is optionally coated with, and cools down and make it be dried after being set to solid state and carry out.

Here, as mask material 14, as long as second medium film 12 and the etching mask of the second semiconductor film 13 The material played a role, then be not particularly limited, and wherein, hot-melt adhesive is preferably used.It addition, hot-melt adhesive has as follows Characteristic: be solid state at normal temperatures, but become molten condition by heating, there is the infiltration after coating few.

Then, as shown in figure 11, the second medium film 12 and second capped not over mask material 14 is removed Semiconductor film 13.Here, the method removing second medium film 12 and the second semiconductor film 13 is not particularly limited, but is suitable for making Use dry ecthing.

Then, as shown in figure 12, remove mask material 14, afterwards, clean.Here, the method for mask material 14 is removed also Without particular limitation of, such as in the case of mask material 14 is made up of hot-melt adhesive, enumerate and mask material 14 is immersed in temperature The method etc. peeled off in water.

Then, as shown in figure 13, on whole of the back side of the semiconductor substrate 3 after eliminating mask material 14, By the first medium film 7 being made up of the non-crystalline silicon of i type and the first semiconductor film 8 of being made up of the non-crystalline silicon of N-shaped according to this The order such as stacking by plasma CVD method.Here, the first semiconductor film 8 can also be the film being made up of the non-crystalline silicon of N-shaped Stacking is carried out, now, above the film being made up of the non-crystalline silicon of N-shaped, by by N-shaped with the film being made up of the amorphous germanium of N-shaped The film such as stacking by plasma CVD method that amorphous germanium is constituted.

Then, as shown in figure 14, the part beyond the peristome 10 at the back side of semiconductor substrate 3, form resist film 17.Here, resist film 17 is not particularly limited, such as, can use at foregoing illustrative resist film.

Then, as shown in figure 15, the first medium film 7 exposed from the peristome 10 of resist film 17 and the first half is removed Electrically conductive film 8, makes the second semiconductor film 13 formed in groove 11 expose.Here, as removing first medium film 7 and the first half The method of electrically conductive film 8, it is preferred to use employ the wet etching of aqueous slkali.That is, it is difficult to pass through due to the second semiconductor film 13 of p-type Employ the wet etching of aqueous slkali and remove, so the second semiconductor film 13 plays a role as etching stopping layer, it is possible to can First medium film 7 and the first semiconductor film 8 is removed by ground.Here, as aqueous slkali, it is not particularly limited, such as, can make It is used in foregoing illustrative aqueous slkali.

Then, remove resist film 17, afterwards, clean.Then, as shown in figure 16, in the rear side of semiconductor substrate 3 Whole, form metal level 20.Here, metal level 20 can be formed by known method, such as, can be suitable for making With CVD, sputtering method, vapour deposition method etc..Additionally, metal level 20 is preferably selected by from the group that nickel (Ni), cobalt (Co), titanium (Ti) are constituted At least one metal selected is constituted, and the thickness of metal level 20 such as can be set to below more than 0.1 μm and 1.0 μm.

Then, as shown in figure 17, by after defining metal level 20, heat treatment is carried out, it is possible to make metal level 20 He First semiconductor film 8 and the second semiconductor film 13 react, and form intermetallic compounds layer 15.Here, change between metal In the case of compound layer 15 is made up of metal silicide layer, heat treatment temperature more preferably more than 200 DEG C and 600 DEG C with Under.

As it has been described above, when the first semiconductor film 8 and the second semiconductor film 13 are above by the film that non-crystalline silicon is constituted In the case of the film that is made up of amorphous germanium of stacking, it is possible to intermetallic compounds layer 15 is set to metal germanide layer.At metal Between in the case of compound layer 15 is made up of metal germanide layer, heat treatment temperature is preferably more than 100 DEG C and less than 500 DEG C. So, metal germanide layer can be formed with low temperature than metal silicide layer, is suitable for.

It reason for this is that, as shown in the embodiment, in the case of being formed with groove in semiconductor substrate, if to exceed The high temperature of 600 DEG C carries out heat treatment, then caused by this groove (that is, the positions that the thickness of semiconductor substrate is different), there is meeting and exists Semiconductor substrate produces the uncomfortable probability of warpage etc..Therefore, in order to suppress the generation of such discomfort, make metal level and half The temperature that electrically conductive film carries out reacting needs to be less than 600 DEG C.Metal germanide layer can be formed below at 500 DEG C, will not produce The discomfort of the warpage etc. of semiconductor substrate, is especially suitable for.

It addition, as shown in figure 17, owing to dielectric film 16 and metal level 20 will not be reacted by heat treatment, so dielectric film Metal level 20 unreacted on 16 and former state residual.

Then, as it is shown in figure 1, remove unreacted metal level 20.Here, as the side removing unreacted metal level 20 Method, it is preferred to use employ the wet etching of acid solution.Owing to being formed on the first semiconductor film 8 and the second semiconductor film 13 Intermetallic compounds layer 15 there is corrosion resistance, so by use acid solution, it is possible to optionally remove at dielectric film The unreacted metal level 20 of residual on 16.By removing unreacted metal level 20, change between the metal on the first semiconductor film 8 Intermetallic compounds layer 15 in compound layer 15 and the second semiconductor film 13 is according to the first semiconductor film 8 and becoming substrate The shape of two semiconductor films 13 and separated (that is, being separated to autoregistration).Thus, intermetallic compounds layer 15 is separated into p-type Electrode and n-type electrode.

According to present embodiment, as shown in the solar cell with the structure shown in Figure 44, owing to need not by transparent Conductive oxide film and connect semiconductor film and electrode layer, so contact resistance reduce, it is possible to increase the conversion of photo-electric conversion element Efficiency.

Additionally, according to present embodiment, shown in the method as shown in Figure 28～Figure 44, owing to being made without photoresist Coating and the complicated pattern formation process of photoresist based on photolithography technology and etching technique, it is possible to Photo-electric conversion element is manufactured by simpler manufacturing process.

Especially, shown in the method as shown in Figure 37～44, in electrode is formed, need not the pattern formation process of complexity, As described above, form the low resistance electrode being made up of intermetallic compounds layer, and p-type electricity can be separated simply and reliably Pole (electrode of the top of the second semiconductor film 13) and n-type electrode (electrode of the top of the first semiconductor film 8).

Additionally, in the present embodiment, owing to p-type electrode and n-type electrode to be formed at the thickness side of semiconductor substrate To different positions, it is possible to reduce semiconductor substrate the back side in p-type electrode and n-type electrode between gap, and It is made without being formed for the accurate pattern forming the little p-type electrode in such gap and n-type electrode.Here, due to In amorphous film (first semiconductor film 8 and the second semiconductor film 13), electric current is difficult in the horizontal direction (direction, face of film) upstream Cross, so from the viewpoint of obtaining the photo-electric conversion element with high conversion efficiency, the p-type electricity at the back side of semiconductor substrate Gap between pole and n-type electrode is the least more preferably.Further, in the present embodiment, it is as noted previously, as by overleaf The groove formed and the dielectric film formed at groove sidewall, by electrically isolated to p-type electrode and n-type electrode, so preventing from electrically dividing The reduction of the conversion efficiency produced in the case of insufficient.

Further, in the present embodiment, due to can by the whole plane at the back side of semiconductor substrate by p-type electrode and N-type electrode covers, it is possible to reflected incident from the sensitive surface side of semiconductor substrate by p-type electrode and n-type electrode Light in, the light that do not passed through to the rear side of semiconductor substrate by absorption.Additionally, by the dielectric film formed at groove sidewall, The light that groove sidewall passes through can also be reflected towards.

Additionally, further, in the present embodiment, including bottom surface, the semiconductor substrate back of the body of the groove of semiconductor substrate The whole plane in face is passivated by the deielectric-coating of i type, the semiconductor film of N-shaped and the semiconductor film of p-type, in addition, A part and the sidewall of the bottom surface of groove are passivated also by dielectric film.Therefore, energy in the back side entirety of semiconductor substrate Enough obtain good passive behavior, it is possible to the Carrier recombination in the surface of suppression semiconductor substrate.

By above reason, in the present embodiment, it is possible to obtain and have than the structure having as shown in figure 44 too The photo-electric conversion element of the higher conversion efficiency in positive electricity pond.Additionally, in the present embodiment, it is possible to by simple manufacturing process Manufacture the photo-electric conversion element with high conversion efficiency.

＜ embodiment 2 ＞

[photo-electric conversion element]

" overall structure "

Fig. 2 is denoted as the schematic sectional view of the photo-electric conversion element 2 of second embodiment of the present invention.Photoelectricity turns Change element 2, at the back side of semiconductor substrate 103, not there is groove, on the surface at the back side of semiconductor substrate 103, non-by i type First medium film 107 and second medium film 112 that crystal silicon is constituted are isolated and are arranged.Additionally, on first medium film 107, arrange There is the first semiconductor film 108 being made up of the non-crystalline silicon of N-shaped.Additionally, on second medium film 112, be provided with by the amorphous of p-type The second semiconductor film 113 that silicon is constituted.Further, whole at the back side of the first semiconductor film 108 and the second semiconductor film 113 On face, it is provided with intermetallic compounds layer 115.

Additionally, between first medium film 107 and second medium film 112, be provided with dielectric film 116.Here, dielectric film 116 contact with the side surface part of first medium film 107 and/or the side surface part of second medium film 112 and are formed.Additionally, dielectric film 116 Can also contact with the side surface part of the side surface part of the first semiconductor film 108 and/or the second semiconductor film 113.

At the sensitive surface (face of the opposition side at the back side) of photo-electric conversion element 2, identically with photo-electric conversion element 1, arrange There is the 3rd deielectric-coating the 104, the 3rd semiconductor film 105 and antireflection film 106.Here, partly leading of photo-electric conversion element 2 is constituted Structure base board, each film, the material of each layer and thickness such as can use in the explanation of photo-electric conversion element 1 illustrate material with And thickness.

It addition, in photo-electric conversion element 2, illustrating the first semiconductor film 108 for N-shaped and the second semiconductor film 113 is p-type Structure, even if the first semiconductor film is p-type and the second semiconductor film is N-shaped, also show that the effect of the present invention.

Additionally, in photo-electric conversion element 1, it is illustrated in sensitive surface and is provided with the structure of the 3rd semiconductor film 105, but the 3rd Semiconductor film 105 it is not necessary to key element, even not having the structure of the 3rd semiconductor film 105, also show that the present invention Effect.

[manufacture method of photo-electric conversion element]

Hereinafter, with reference to the schematic cross sectional views of Figure 18～Figure 27, the photo-electric conversion element 2 as the second embodiment is described An example of manufacture method.It addition, example shown below to low be an example, the order of each operation is not limited to following example, Can suitably change.

First, as shown in figure 18, at whole of the sensitive surface of the semiconductor substrate 103 being made up of N-shaped monocrystal silicon, will be by The 3rd deielectric-coating 104 that the non-crystalline silicon of i type is constituted and the 3rd semiconductor film 105 being made up of the non-crystalline silicon of N-shaped and reflection Prevent film 106 according to this order such as stacking by plasma CVD method.

Then, as shown in figure 19, on whole of the back side of semiconductor substrate 103, by be made up of the non-crystalline silicon of i type First medium film 107 and the first semiconductor film 108 being made up of the non-crystalline silicon of N-shaped such as pass through plasma according to this order CVD and stacking.Here, the first semiconductor film 108 can also be the film being made up of the non-crystalline silicon of N-shaped and by the amorphous germanium of N-shaped The film constituted carries out stacking, now, above the film being made up of the non-crystalline silicon of N-shaped, and the film example being made up of the amorphous germanium of N-shaped Such as the stacking by plasma CVD method.

Then, as shown in figure 20, formation has the resist film 109 of peristome 110.Here, resist film 109 is the most special Do not limit, such as, can use at the above-mentioned resist film illustrated as alkali-resisting resist film.

Then, as shown in figure 21, the first medium film 107 capped not over resist film 109 and the is removed A part for one deielectric-coating 108, makes semiconductor substrate 103 expose.Here, first medium film 107 and the first quasiconductor are removed The method of film 108 is not particularly limited, it is preferred to use employ the wet etching of aqueous slkali.

Then, resist film 109, after cleaning, as shown in figure 22, whole at the back side of the first semiconductor film 108 are removed On individual face and on whole of the back side of semiconductor substrate 103, form dielectric film 116.Here, the side of dielectric film 116 is formed Rule is if using in foregoing illustrative method.Additionally, as dielectric film 116, preferably thermal oxidation silicon film, silicon nitride film.

Then, as shown in figure 23, by the dielectric film 116 that formed in the plane of removal, at first medium film 107 and the The side surface part residual dielectric film 116 of semiconductor film 108.The method removing dielectric film 116 is not particularly limited, it is possible to use One of them in dry ecthing, wet etching.

Then, as shown in figure 24, on whole of the back side of the first semiconductor film 108, at the back of the body of semiconductor substrate 103 Whole of face be upper and on the remainder of dielectric film 116, by the second medium film 112 being made up of the non-crystalline silicon of i type and By the second semiconductor film 113 of being made up of the non-crystalline silicon of p-type according to this order such as stacking by plasma CVD method.This In, the second semiconductor film 113 can also be the film being made up of the non-crystalline silicon of p-type and the film being made up of the amorphous germanium of p-type carries out layer Folded, now, above the film being made up of the non-crystalline silicon of p-type, the film being made up of the amorphous germanium of p-type is such as passed through plasma CVD and stacking.

Then, as shown in figure 25, remove on the first semiconductor film 108 and on the remainder of dielectric film 116 and formed Second medium film 112 and the second semiconductor film 113.Here, as removing second medium film 112 and the second semiconductor film The method of 113, such as, can use dry ecthing etc. like that in above-mentioned illustration.

Then, as shown in figure 26, on the first semiconductor film 108, on the second semiconductor film 113 and dielectric film 116 On remainder, form metal level 120.Here, as the method forming metal level 120, such as, like that can in above-mentioned illustration Using sputtering method etc., metal level 120 is preferably by least one gold selected from the group that nickel (Ni), cobalt (Co), titanium (Ti) are constituted Belong to and constituting.

Then, as shown in figure 27, by carrying out heat treatment, metal level 120 and the first semiconductor film 108 and the second half are made Electrically conductive film 113 reacts, and forms intermetallic compounds layer 115.Here, will not pass through due to dielectric film 116 and metal level 120 Heat treatment and react, so metal level 120 unreacted on dielectric film 116 and former state residual.

Then, as in figure 2 it is shown, by removing the unreacted metal level 120 on dielectric film 116, intermetallic compounds layer It is separated into p-type electrode and n-type electrode to 115 autoregistrations.

Additionally, according to present embodiment, shown in the method as shown in Figure 37～44, be made without in electrode is formed Complicated pattern formation process, as described above, forms the low resistance electrode being made up of intermetallic compounds layer, and can letter List and be reliably separated p-type electrode (electrode of the top of the second semiconductor film 113) and n-type electrode (the first semiconductor film 107 The electrode of top).

Additionally, further, in the present embodiment, the whole plane at the back side of semiconductor substrate by the deielectric-coating of i type, The semiconductor film of N-shaped, the semiconductor film of p-type and dielectric film and be passivated, can obtain in the back side entirety of semiconductor substrate Obtain passive behavior well, it is possible to the Carrier recombination in the surface of suppression semiconductor substrate.

As previously discussed, embodiments of the present invention are illustrated, but also predetermined by above-mentioned each enforcement from originally The structure of mode is suitably combined.

Be considered as embodiment of disclosure a little go up be all illustrate, be not restrictive.The model of the present invention Enclose is by represented by the scope of claims rather than above-mentioned explanation is it is intended to encompass be equal to the scope of claims Whole changes in implication and scope.

Industrial applicability

The present invention can be used in the manufacture method of photo-electric conversion element and photo-electric conversion element.

Description of reference numerals

1,2 photo-electric conversion element, 3,103 semiconductor substrates, 4,104 the 3rd deielectric-coating, 5,105 the 3rd semiconductor films, 6, 106 antireflection films, 7,107 first medium films, 8,108 first semiconductor films, 9,17,109 resist films, 10,110 openings Portion, 11 grooves, 11a bottom surface, 11b sidewall, 12,112 second medium films, 13,113 second semiconductor films, 14 mask materials, 15,115 Intermetallic compounds layer, 16,116 dielectric films, 20,120 metal levels, 901c-Si (n) substrate, 902a-Si (i/p) layer, 903a- Si (i/n) layer, 904 photoresist films, 905a-Si (i/n) layer, 906 photoresist films, 907 transparent conductive oxide films, 908,909 light Photoresist film, 910 back electrode layer, 911 antireflection films.

Claims

1. a photo-electric conversion element, including:

The semiconductor substrate of the first conductivity type；

First semiconductor film of the first conductivity type, is arranged on a surface of described semiconductor substrate；

Second semiconductor film of the second conductivity type, is independently positioned on described surface with described first semiconductor film；And

First medium film, is arranged between described semiconductor substrate and described first semiconductor film

Second medium film, is arranged between described semiconductor substrate and described second semiconductor film,

It is formed with intermetallic compounds layer on described first semiconductor film and on described second semiconductor film

Described first medium film and described second medium film are set isolator.

2. photo-electric conversion element as claimed in claim 1,

Described surface configuration at described semiconductor substrate has groove,

Described second semiconductor film it is provided with in the bottom surface of described groove.

3. photo-electric conversion element as claimed in claim 1,

On a surface of described semiconductor substrate, described first semiconductor film and described second semiconductor film are isolated and are set Put,

It is provided with dielectric film between described first semiconductor film and described second semiconductor film.

4. the photo-electric conversion element as described in any one of claims 1 to 3,

Described intermetallic compounds layer be metal silicide layer and metal germanide layer at least any one.

5. photo-electric conversion element as claimed in claim 4,

Described metal germanide layer is the compound layer being made up of at least one metal and germanium, this at least one metal from by nickel, The group that cobalt and titanium are constituted selects.