CN104682918A - Sampling rate converter, rate estimator applied to sampling rate converter and rate estimation method of rate estimator - Google Patents
Sampling rate converter, rate estimator applied to sampling rate converter and rate estimation method of rate estimator Download PDFInfo
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Abstract
The invention provides a sampling rate converter, a rate estimator applied to the sampling rate converter, and a rate estimation method of the rate estimator. The sampling rate converter is used for receiving an input signal with input sampling frequency, and generating an output signal with output sampling frequency. The sampling rate converter comprises the rate estimator, a polynomial interpolation calculation circuit, an up-sampling filter and a down-sampling filter, wherein the rate estimator comprises a subtracter which is used for generating an error signal according to an input frequency signal and a second-order rate signal, a first-order integrator which is coupled with the subtracter, and is used for generating a first-order rate signal according to the error signal, and a second-order integrator which is coupled with the first-order integrator, and is used for generating a second-order rate signal according to the first-order rate signal.
Description
Technical field
The present invention relates to a kind of sample rate converter with for ratio estimator wherein and ratio estimating and measuring method thereof; Refer to especially a kind of do not need buffer store translation data sample rate converter with for ratio estimator wherein and ratio estimating and measuring method thereof.
Background technology
Generally speaking, sample rate converter has the digital signal of different sampling frequency in order to conversion.For example, the data format of sound compact disc (compact disc, CD), has sampling frequency 44.1kHz; And the data format of digital audiotape (digital audio tape, DAT), then there is the sampling frequency of 48kHz.To the voice data by having CD data format, be converted to the voice data with DAT data format, then its sampling frequency needs to be converted to obtain normal voice data.Avoid, after voice data conversion, hearing the sound of " acceleration " or " deceleration ".
A kind of typical sample rate converter, is Asynchronous Sampling rate converter (asynchronous sample rate convertor, ASRC).ASRC, by the signal of input, by interpolation calculation, is reduced to the translation data that sampling frequency is high, and translation data is stored in buffer.Again with the sampling frequency required for the digital signal exported, read the translation data in buffer, the digital signal with different sampling frequency can be changed smoothly.
Fig. 1 illustrates the conversion method of sample rate converter.As shown in Figure 1, solid arrow signal has the input signal of input sampling frequency, and the signal of dotted line arrow has the output signal exporting sampling frequency.By the interpolation arithmetic of polynomial interopolation counting circuit to input signal, the translation data signal that sampling point is more can be obtained, and by translation data signal input buffer, become translation data.Again according to ratio signal and translation data, produce to have and export the output signal of sampling frequency, as dotted line arrow in figure illustrated.If frequency range is limited, translation data to reduce original signal, utilizes interpolation arithmetic and input sampling frequency and export the ratio of sampling frequency, converting data can be converted to different sampling frequency, to be applied to different data formats.
United States Patent (USP) case the 7th, 948, No. 405 sample rate converters disclosed comprise buffer.As schematically shown in Figure 2, translation data is stored in temporary note, namely utilizes input sampling frequency to produce input signal index, will input in data write buffer, and with interpolation arithmetic, translation data is stored so far buffer.Recycling exports sampling frequency and produces output signal index, exporting data reading.
But, be the input signal index avoiding the output signal index occurring to read data to surmount write data, cause the data that reading had been read; Or the input signal index of write data surmounts the output signal index reading data, causes the data do not read to be written.So aforementioned ASRC needs the buffer that storage volume is very large, to store translation data, and do not meet economic benefit.Therefore, the present invention with regard to the deficiencies in the prior art, propose a kind of sample rate converter with for ratio estimator wherein and ratio estimating and measuring method thereof.Do not need to utilize buffer, and manufacturing cost can be reduced, and improve the efficiency of sample rate conversion.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art and defect, propose a kind of sample rate converter with for ratio estimator wherein and ratio estimating and measuring method thereof.Do not need to utilize buffer, and manufacturing cost can be reduced, and improve the efficiency of sample rate conversion.
For reaching above-mentioned purpose, just wherein a viewpoint is sayed, the invention provides a kind of sample rate converter, in order to receive an input signal with an input sampling frequency, and produce an output signal with an output sampling frequency, this sample rate converter comprises: a ratio estimator, in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency, one polynomial interopolation counting circuit, couples with this ratio estimator, in order to according to a translation data signal and this ratio signal, produces a polynomial interopolation signal, sampling filter on one, couples with this polynomial interopolation counting circuit, and according to this input signal, to produce this translation data signal, and once sampling filter, couple with this polynomial interopolation counting circuit, and according to this polynomial interopolation signal, to produce this output signal, wherein, this ratio estimator comprises: a subtracter, in order to according to this incoming frequency signal and a second-order ratio signal, produces an error signal, one first rank integrator, couples with this subtracter, and according to this error signal, produces one first rank ratio signal, and a second-order integrator, couple with this first rank integrator, and according to this first rank ratio signal, produce this second-order ratio signal.
For reaching above-mentioned purpose, say with regard to another viewpoint, the present invention also provides an a kind of ratio estimator for sample rate converter, this sample rate converter has an input signal of an input sampling frequency in order to receive, and produce an output signal with an output sampling frequency, this ratio estimator is in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency, this ratio estimator comprises: a subtracter, in order to according to this incoming frequency signal and a second-order ratio signal, produce an error signal, one first rank integrator, couples with this subtracter, and according to this error signal, produces one first rank ratio signal, and a second-order integrator, couple with this first rank integrator, and according to this first rank ratio signal, produce this second-order ratio signal.
One is preferably implemented in kenel wherein, and this ratio estimator also comprises an input to integrator, couples with this subtracter, in order to receive this incoming frequency signal, to produce a normalization signal, inputs this subtracter.
One is preferably implemented in kenel wherein, and this ratio estimator also comprises an intercepting circuit, couples with this subtracter, in order to receive this second-order ratio signal, to produce this ratio signal.
In aforesaid enforcement kenel, this error signal, preferably according to following computing, is converted to this first rank ratio signal by this first rank integrator:
Wherein, Ti is this first rank ratio signal, K
pbe a proportional gain, K
ibe a storage gain, z is a z conversion constant, and 1-Σ T is this error signal, and Σ T is this second-order ratio signal.
In aforesaid enforcement kenel, this first rank ratio signal, preferably according to following computing, is converted to this second-order ratio signal by this second-order integrator:
Wherein, Ti is this first rank ratio signal, and z is a z conversion constant, and Σ T is this second-order ratio signal.
One is preferably implemented in kenel wherein, and this first rank integrator comprises: one first multiplier, couples with this subtracter, in order to this error signal and a proportional gain are done multiplying, and produces a proportion signal; One second multiplier, couples with this subtracter, in order to this error signal and a storage gain are done multiplying, in order to produce an integration ratio signal; One adder, couples with this first multiplier, in order to according to this proportion signal and this integration ratio signal, produces this first rank ratio signal; One switch, couples with this second-order integrator, in order to according to a switch control signal, and determines to pass this first rank ratio signal back this first rank integrator.
For reaching above-mentioned purpose, say with regard to another viewpoint, the present invention also provides an a kind of ratio estimating and measuring method of the ratio estimator for sample rate converter, wherein, this kind of sample rate converter is in order to receive an input signal with an input sampling frequency, and produce an output signal with an output sampling frequency, wherein, this ratio estimator, in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency, the ratio estimating and measuring method of the ratio estimator of this sample rate converter comprises: according to this incoming frequency signal and a second-order ratio signal, produce an error signal, according to this error signal, produce one first rank ratio signal, and according to this first rank ratio signal, produce this second-order ratio signal.
One is preferably implemented in kenel wherein, and this, according to this incoming frequency signal and this second-order ratio signal, produces the step of this error signal, also comprise: according to this incoming frequency signal, produce a normalization signal.
One is preferably implemented in kenel wherein, and the method also comprises: according to this second-order ratio signal, to produce this ratio signal.
In aforesaid enforcement kenel, this is according to this error signal, produces the step of this first rank ratio signal, preferably according to following computing, this error signal is converted to this first rank ratio signal:
Wherein, Ti is this first rank ratio signal, K
pbe a proportional gain, K
ibe a storage gain, z is a z conversion constant, and 1-Σ T is this error signal, and Σ T is this second-order ratio signal.
In aforesaid enforcement kenel, this, according to this first rank ratio signal, produces the step of this second-order ratio signal, preferably according to following computing, this first rank ratio signal is converted to this second-order ratio signal:
Wherein, Ti is this first rank ratio signal, and z is a z conversion constant, and Σ T is this second-order ratio signal.
One is preferably implemented in kenel wherein, and this, according to this incoming frequency signal and a second-order ratio signal, produces the step of an error signal, comprising: this error signal and a proportional gain are done multiplying, and produces a proportion signal; This error signal and a storage gain are done multiplying, in order to produce an integration ratio signal; According to this proportion signal and this integration ratio signal, produce this first rank ratio signal; According to a switch control signal, and determine this first rank ratio signal to pass back.
Accompanying drawing explanation
Fig. 1 illustrates the conversion method of sample rate converter;
Fig. 2 illustrates the mode of operation of buffer of prior art;
Fig. 3 and Fig. 4 shows first embodiment of the invention;
Fig. 5 shows second embodiment of the invention;
Fig. 6 shows third embodiment of the invention.
Symbol description in figure
10 sample rate converters
12,22 ratio estimators
14 multimodal interpolation computation circuit
Sampling filter on 16
18 times sampling filters
122,222 subtracters
124,224 first rank integrators
126.226 second-order integrators
127 input to integrator
128 intercept circuit
2241,2242 multipliers
2243,2245 adders
2244 switches
2246,2261 control modules
E error signal
Σ T second-order ratio is interrogated
Ti first rank ratio signal
Embodiment
Fig. 3 and Fig. 4 shows first embodiment of the present invention.As shown in Figure 3, sample rate converter 10, in order to having the input signal of input sampling frequency, is converted to the output signal having and export sampling frequency.The present embodiment display sample rate converter 10 comprises ratio estimator 12, polynomial interopolation counting circuit 14, upper sampling filter 16 and lower sampling filter 18.Ratio estimator 12 is in order to receive incoming frequency signal and output frequency signal, and produce ratio signal, wherein, the corresponding input sampling frequency of incoming frequency signal, output frequency signal correspondence exports sampling frequency, and ratio signal is relevant to input sampling frequency and exports sampling frequency, be for example and without limitation to input sampling frequency and the ratio exporting sampling frequency.Upper sampling filter 16 receives the input signal with input sampling frequency, and by increasing sampling to input signal, produces translation data signal, to input polynomial interopolation counting circuit 14.Polynomial interopolation counting circuit 14, according to ratio signal, is done such as but not limited to interpolation arithmetic translation data, and produces polynomial interopolation signal according to this.Lower sampling filter 18, according to polynomial interopolation signal, produces the output signal having and export sampling frequency.
Fig. 4 shows in the present embodiment, the schematic diagram of ratio estimator 12.As shown in Figure 4, ratio estimator 12 comprises: subtracter 122, first rank integrator 124, with second-order integrator 126.Subtracter 122, in order to according to incoming frequency signal and second-order ratio signal Σ T, produces error signal e.Such as, subtracter 122, by the incoming frequency signal after normalization (normalization), deducts second-order ratio signal Σ T, produces error signal e.First rank integrator 124 couples with subtracter 122, and according to error signal e, produces the first rank ratio signal Ti.Wherein, error signal e such as but not limited to according to following computing, is converted to the first rank ratio signal Ti by the first rank integrator 124:
Wherein, K
pfor proportional gain, K
ifor storage gain, z is z conversion constant, and 1-Σ T is error signal e, Σ T is second-order ratio signal.
And second-order integrator 126 receives output frequency signal and the first rank ratio signal Ti, and such as but not limited to according to following computing, the first rank ratio signal Ti is converted to second-order ratio signal Σ T:
Wherein, output frequency signal, such as but not limited to input first rank integrator 124, can also input second-order integrator 126.
The invention difference from existing technology, mainly be that the present invention utilizes the integrator loop (the first rank integrator and second-order integrator) of Liang Ge stratum, error signal e is gone to zero in the steady state, and can be stored in the first rank integrator or second-order integrator for the ratio signal estimated, therefore do not need buffer to store a large amount of data.
Refer to Fig. 5, show second embodiment of the present invention.The present embodiment and first embodiment difference are, in the present embodiment, ratio estimator 12 more comprises input to integrator 127 and intercepts circuit 128.Wherein, input to integrator 127 and subtracter 122 couple, in order to receive incoming frequency signal, to produce normalization signal, and input subtracter 122.So-called normalization signal, refer to subtracter 122, value is the signal of 1.Thus, error signal e is 1-Σ T, meets aforementioned formula.And intercept circuit 128 and couple, in order to receive second-order ratio signal Σ T, to produce this ratio signal with subtracter 122.And intercept circuit 128 such as to second-order ratio signal Σ T perform go integer part, leave the computing of fractional part, guarantee that the value of ratio signal is less than 1, thus, when can guarantee that polynomial interopolation counting circuit 14 makes interpolation arithmetic according to ratio signal to translation data, and produce the output signal having and export sampling frequency according to this, can directly change, do not need buffer, also do not have the data that reading had been read, or the data do not read such as to be written at the problem.It should be noted that, input to integrator 127 must not exist in ratio estimator 12 with intercepting circuit 128 simultaneously, and ratio estimator 12 can also only include input to integrator 127 or intercept one of them circuit of circuit 128.
Fig. 6 shows third embodiment of the invention.As shown in Figure 6, ratio estimator 22 comprises: subtracter 222, first rank integrator 224, second-order integrator 226, input to integrator 127, with intercept circuit 128.Wherein, the first rank integrator 224 comprises: multiplier 2241, multiplier 2242, adder 2243, switch 2244, adder 2245, with control module 2246.When normal manipulation mode, switch control signal diverter switch 2244, makes multiplier 2242 be coupled to control module 2246 through adder 2245.Multiplier 2241 and subtracter 222 couple, in order to by error signal e and proportional gain K
pdo multiplying, and produce proportion signal K
p* e.Multiplier 2242 and subtracter 222 couple, in order to by error signal e and storage gain K
ido multiplying, and through comprising the controlled circulation of control module 2246, to produce integration ratio signal K
i* (1-Σ T)/(1-z-1).Adder 2243 couples with multiplier 2241 and control module 2246 respectively, and by proportion signal K
p* e and integration ratio signal K
i* (1-Σ T)/(1-z-1) does add operation, produces the first rank ratio signal Ti.According to switch control signal, such as, enter comparatively stable state in control system, and when needing the desired value of contrast ratio signal to do more accurate control, need to change proportional gain K
pwith storage gain K
ivalue, such as but not limited to reduction proportional gain K
pwith storage gain K
ivalue time, and switch control signal console switch 2244, makes control module 2246 and second-order integrator 226 couple, and determines to pass the first rank ratio signal Ti back in the first rank integrator 224 control module 2246, as proportional gain K
pwith storage gain K
ivalue change after initial value.In the present embodiment, second-order integrator 226 comprises control module 2261 and adder 2262, makes second-order integrator 226 according to following computing, the first rank ratio signal Ti is converted to second-order ratio signal Σ T:
Wherein, intercept circuit 128 pairs of second-order ratio signal Σ T execution and go integer part, leave the computing of fractional part, guarantee that the value of ratio signal is less than 1.
It should be noted that, according to control system theory, the control loop being greater than second order all can make error signal e converge to zero, and ratio signal (being such as second-order ratio signal Σ T) is not because need too large memory capacity, can be stored in integrator.Because error signal e can converge to zero, therefore input to integrator 127 is omissible, but when input to integrator 127 can be accelerated to start to operate, the convergence rate of ratio signal.Also because error signal e converges to zero, the signal of computing is therefore needed also not to be limited to the frequency range of system.These are all the present invention and are better than prior art part.
Below for preferred embodiment, the present invention is described, just the above, be only and make those skilled in the art be easy to understand content of the present invention, be not used for limiting interest field of the present invention.Under same spirit of the present invention, those skilled in the art can think and various equivalence change.Such as, two circuit that in each embodiment, icon directly connects or interelement, can plant other circuit or element of not affecting major function.All this kind, all teaching according to the present invention can analogize and obtain, and therefore, scope of the present invention should contain above-mentioned and other all equivalence change.
Claims (18)
1. a sample rate converter, in order to receive an input signal with an input sampling frequency, and produce an output signal with an output sampling frequency, it is characterized in that, this sample rate converter comprises:
One ratio estimator, in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency;
One polynomial interopolation counting circuit, couples with this ratio estimator, in order to according to a translation data signal and this ratio signal, produces a polynomial interopolation signal;
Sampling filter on one, couples with this polynomial interopolation counting circuit, and according to this input signal, to produce this translation data signal; And
Sampling filter once, couples with this polynomial interopolation counting circuit, and according to this polynomial interopolation signal, to produce this output signal;
Wherein, this ratio estimator comprises:
One subtracter, in order to according to this incoming frequency signal and a second-order ratio signal, produces an error signal;
One first rank integrator, couples with this subtracter, and according to this error signal, produces one first rank ratio signal; And
One second-order integrator, couples with this first rank integrator, and according to this first rank ratio signal, produces this second-order ratio signal.
2. sample rate converter as claimed in claim 1, wherein, this ratio estimator also comprises an input to integrator, couples with this subtracter, in order to receive this incoming frequency signal, to produce a normalization signal, inputs this subtracter.
3. sample rate converter as claimed in claim 1, wherein, this ratio estimator also comprises an intercepting circuit, couples with this subtracter, in order to receive this second-order ratio signal, to produce this ratio signal.
4. sample rate converter as claimed in claim 2, wherein, this error signal, according to following computing, is converted to this first rank ratio signal by this first rank integrator:
Wherein, Ti is this first rank ratio signal, K
pbe a proportional gain, K
ibe a storage gain, z is a z conversion constant, and 1-Σ T is this error signal, and Σ T is this second-order ratio signal.
5. sample rate converter as claimed in claim 2, wherein, this first rank ratio signal, according to following computing, is converted to this second-order ratio signal by this second-order integrator:
Wherein, Ti is this first rank ratio signal, and z is a z conversion constant, and Σ T is this second-order ratio signal.
6. sample rate converter as claimed in claim 1, wherein, this first rank integrator comprises:
One first multiplier, couples with this subtracter, in order to this error signal and a proportional gain are done multiplying, and produces a proportion signal;
One second multiplier, couples with this subtracter, in order to this error signal and a storage gain are done multiplying, in order to produce an integration ratio signal;
One adder, couples with this first multiplier, in order to according to this proportion signal and this integration ratio signal, produces this first rank ratio signal;
One switch, couples with this second-order integrator, in order to according to a switch control signal, and determines to pass this first rank ratio signal back this first rank integrator.
7. the ratio estimator for sample rate converter, this sample rate converter has an input signal of an input sampling frequency in order to receive, and produce an output signal with an output sampling frequency, this ratio estimator is in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency, it is characterized in that, this ratio estimator comprises:
One subtracter, in order to according to this incoming frequency signal and a second-order ratio signal, produces an error signal;
One first rank integrator, couples with this subtracter, and according to this error signal, produces one first rank ratio signal; And
One second-order integrator, couples with this first rank integrator, and according to this first rank ratio signal, produces this second-order ratio signal.
8., as claimed in claim 7 for the ratio estimator of sample rate converter, wherein, also comprise an input to integrator, couple with this subtracter, in order to receive this incoming frequency signal, to produce a normalization signal, input this subtracter.
9., as claimed in claim 7 for the ratio estimator of sample rate converter, wherein, this ratio estimator also comprises an intercepting circuit, couples with this subtracter, in order to receive this second-order ratio signal, to produce this ratio signal.
10., as claimed in claim 8 for the ratio estimator of sample rate converter, wherein, this error signal, according to following computing, is converted to this first rank ratio signal by this first rank integrator:
Wherein, Ti is this first rank ratio signal, K
pbe a proportional gain, K
ibe a storage gain, z is a z conversion constant, and 1-Σ T is this error signal, and Σ T is this second-order ratio signal.
11. as claimed in claim 8 for the ratio estimator of sample rate converter, and wherein, this error signal, according to following computing, is converted to this first rank ratio signal by this second-order integrator:
Wherein, Ti is this first rank ratio signal, and z is a z conversion constant, and Σ T is this second-order ratio signal.
12. as claimed in claim 7 for the ratio estimator of sample rate converter, and wherein, this first rank integrator comprises:
One first multiplier, couples with this subtracter, in order to this error signal and a proportional gain are done multiplying, and produces a proportion signal;
One second multiplier, couples with this subtracter, in order to this error signal and a storage gain are done multiplying, in order to produce an integration ratio signal;
One adder, couples with this first multiplier, in order to according to this proportion signal and this integration ratio signal, produces this first rank ratio signal;
One switch, couples with this second-order integrator, in order to according to a switch control signal, and determines to pass this first rank ratio signal back this first rank integrator.
One ratio estimating and measuring method of 13. 1 kinds of ratio estimators for sample rate converter, wherein, this kind of sample rate converter is in order to receive an input signal with an input sampling frequency, and produce an output signal with an output sampling frequency, wherein, this ratio estimator, in order to receive an incoming frequency signal and an output frequency signal, and produce a ratio signal, wherein, this incoming frequency signal is to should input sampling frequency, this output frequency signal is to exporting sampling frequency, and this ratio signal is relevant to this input sampling frequency and this output sampling frequency, it is characterized in that, the ratio estimating and measuring method of the ratio estimator of this sample rate converter comprises:
According to this incoming frequency signal and a second-order ratio signal, produce an error signal;
According to this error signal, produce one first rank ratio signal; And
According to this first rank ratio signal, produce this second-order ratio signal.
14. as claimed in claim 13 for the ratio estimating and measuring method of the ratio estimator of sample rate converter, wherein, this, according to this incoming frequency signal and this second-order ratio signal, produces the step of this error signal, also comprise: according to this incoming frequency signal, produce a normalization signal.
15., as claimed in claim 13 for the ratio estimating and measuring method of the ratio estimator of sample rate converter, wherein, also comprise: according to this second-order ratio signal, to produce this ratio signal.
16. as claimed in claim 14 for the ratio estimating and measuring method of the ratio estimator of sample rate converter, wherein, this is according to this error signal, produces the step of this first rank ratio signal, according to following computing, this error signal is converted to this first rank ratio signal:
Wherein, Ti is this first rank ratio signal, K
pbe a proportional gain, K
ibe a storage gain, z is a z conversion constant, and 1-Σ T is this error signal, and Σ T is this second-order ratio signal.
17. as claimed in claim 14 for the ratio estimating and measuring method of the ratio estimator of sample rate converter, wherein, this, according to this first rank ratio signal, produces the step of this second-order ratio signal, according to following computing, this first rank ratio signal is converted to this second-order ratio signal:
Wherein, Ti is this first rank ratio signal, and z is a z conversion constant, and Σ T is this second-order ratio signal.
18. as claimed in claim 13 for the ratio estimating and measuring method of the ratio estimator of sample rate converter, and wherein, this, according to this incoming frequency signal and a second-order ratio signal, produces the step of an error signal, comprising:
This error signal and a proportional gain are done multiplying, and produces a proportion signal;
This error signal and a storage gain are done multiplying, in order to produce an integration ratio signal;
According to this proportion signal and this integration ratio signal, produce this first rank ratio signal;
According to a switch control signal, and determine this first rank ratio signal to pass back.
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| CN101394161A (en) * | 2007-09-20 | 2009-03-25 | 株式会社东芝 | Sample rate converter |
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| US5191332A (en) * | 1991-02-11 | 1993-03-02 | Industrial Technology Research Institute | Differentiator/integrator based oversampling converter |
| US20050156625A1 (en) * | 2002-03-22 | 2005-07-21 | Odi Dahan | Asynchronus sampling rate conversion |
| US7262716B2 (en) * | 2002-12-20 | 2007-08-28 | Texas Instruments Incoporated | Asynchronous sample rate converter and method |
| US7302459B2 (en) * | 2003-01-21 | 2007-11-27 | Lsi Corporation | Method and apparatus for digital sample rate conversion |
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Application publication date: 20150603 |