CN104681602A - Longitudinal bipolar transistor in BCD (Bipolar complementary metal-oxide-semiconductor double-diffusion metal-oxide-semiconductor) technology - Google Patents
Longitudinal bipolar transistor in BCD (Bipolar complementary metal-oxide-semiconductor double-diffusion metal-oxide-semiconductor) technology Download PDFInfo
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Abstract
The invention discloses a longitudinal bipolar transistor in a BCD (Bipolar complementary metal-oxide-semiconductor double-diffusion metal-oxide-semiconductor) technology, which is characterized in that an emitting region is formed by overlapping a lightly doped injection region and a heavily doped injection region; the lightly doped injection region covers an active region; the heavily doped injection region only covers the center area of the active region; a high resistive ring, which is formed by the lightly doped injection region, is formed in the region between the outermost edge of the heavily doped injection region and the outermost edge of the lightly doped injection region. According to the longitudinal bipolar transistor in the BCD technology, the size of parasitic resistance in the emitting region is defined by the high resistive ring, and a negative feedback effect is formed through the high resistive ring when the working current of the longitudinal bipolar transistor is increased, so that a positive feedback effect, caused by positive temperature effect, of a device under the large-current working condition can be prohibited, and the safe working area of the ICVC curve of the device can be improved.
Description
Technical field
The present invention relates to a kind of semiconductor device, particularly relate to longitudinal bipolar transistor in a kind of BCD technique.
Background technology
In order to reduce contact resistance, in existing deep-submicron BCD technique, longitudinal bipolar transistor such as the emitter of NPN triode is made up of N+ upper cover metal silicide, and deep-submicron refers to less than 0.25 micron.As shown in Figure 1, be the sectional structure chart of longitudinal bipolar transistor in existing BCD technique, be described as follows below for NPN triode, the NPN triode in existing BCD technique comprises:
P-type silicon substrate 101, is formed with n type buried layer (NBL) 102 and p type buried layer (PBL) 103, is formed with shallow trench field oxygen (STI) 104 on the surface of described silicon substrate 101, isolate active area by shallow trench field oxygen 104 in described P-type silicon substrate 101.
Be made up of the collector region of device N-type deep trap (DNW) 105, the bottom of collector region contacts with n type buried layer 102.
The base of device is made up of the P trap (PW) 106 be formed in collector region 105.
The emitter region of device is made up of the N+ district 107 being formed at surface, described base 106, described emitter region 107 covers an active area, be formed with metal silicide 108a on the surface of described emitter region 107, and the metal contact hole formed by metal silicide 108a top and metal layer at top realize the extraction of emitter.
The coverage of described base 106 include described emitter region 107 be coated with the adjacent active regions of source region and this active area, P+ district 109 is formed in this adjacent active regions, the surface in Gai P+ district 109 is formed with metal silicide 108b, and the metal contact hole formed by metal silicide 108b top and metal layer at top realize the extraction of base stage.
The coverage of described collector region 105 includes all active areas that described base 106 covers and the active area that described in this, outermost active area of base 106 is adjacent, N trap 110 is formed in this active area, N+ district 111 is formed in described N trap 110, the surface in Gai N+ district 111 is formed with metal silicide 108c, and the metal contact hole formed by metal silicide 108c top and metal layer at top realize the extraction of emitter.
Described p type buried layer 103 is centered around described n type buried layer 102 around, P moldeed depth trap 112 is formed at the top of described p type buried layer 102, P trap 113 is formed in described P moldeed depth trap 112, P+ district 114 is formed at the top of described P trap 113, the surface in Gai P+ district 114 is formed with metal silicide 108d, and the metal contact hole formed by metal silicide 108d top and metal layer at top realize the extraction of underlayer electrode.
When the collector electrode of existing NPN triode connects positive voltage, devices function is when forward big current is applied, and device temperature can raise.Due to the effect of NPN triode positive temperature coefficient, can produce larger output current, this phenomenon makes the i-v curve of NPN triode and the safety operation area (SOA) of collector current (IC) collector voltage (VC) curve reduce.As shown in Figure 2, be the i-v curve of longitudinal bipolar transistor in existing BCD technique; This i-v curve is collector current when base current selectes a fixed value and the curve between collector voltage, from region shown in dotted line frame 115, devices function is when forward big current, big current can make the temperature of device raise, due to positive temperature coefficient effect, the rising of temperature can make again the electric current of device increase, and finally forms a positive feedback, device current is increased fast, and the safety operation area of ICVC curve is reduced.
Summary of the invention
Technical problem to be solved by this invention is to provide longitudinal bipolar transistor in a kind of BCD technique, the positive feedback effect during application of suppression device big current, the safety operation area of boost device ICVC curve.
For solving the problems of the technologies described above, in BCD technique provided by the invention, longitudinal bipolar transistor is formed on silicon substrate, described silicon substrate is formed with an oxygen, isolates active area by described field oxygen.Described longitudinal bipolar transistor comprises:
Collector region, is made up of the first conduction type deep trap be formed on described silicon substrate.
Base, is made up of the second conductive type of trap be formed in described first conduction type deep trap.
Emitter region, be formed by stacking by the first conduction type light dope injection region and the first conduction type heavy doping injection region that are formed at described base region surface, the doping content of the first conduction type heavy doping injection region of described emitter region is greater than the doping content of the first conduction type light dope injection region.
First conduction type light dope injection region of described emitter region covers a described active area, this active area is made to be the first active area, the central area covering described first active area of the first conduction type heavy doping injection region of described emitter region, region between the outermost edges of the first conduction type heavy doping injection region of described emitter region and the outermost edges of the first conduction type light dope injection region of described emitter region forms the high balk ring be made up of the first conduction type light dope injection region, is formed with metal silicide on the surface of described emitter region; Described high balk ring defines the size of the dead resistance of described emitter region and forms negative feedback effect when the operating current of described longitudinal bipolar transistor increases, and utilizes this negative feedback effect to suppress the positive feedback effect produced by positive temperature effect of described longitudinal bipolar transistor.
Further improvement is, the area of described emitter region is 1 × 1 micron
2~ 50 × 50 microns
2.
Further improvement is, the width of described high balk ring is greater than 0 micron and is less than or equal to 10 microns.
Further improvement is, described longitudinal bipolar transistor is NPN triode, and the first conduction type is N-type, and the second conduction type is P type.
Further improvement is, the implantation dosage of the ion implantation of the N-type heavy doping injection region of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 50KEV ~ 60KEV, and implanted dopant is arsenic or phosphorus.
Further improvement is, the implantation dosage of the ion implantation of the N-type light dope injection region of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 2KEV ~ 20KEV, and implanted dopant is arsenic or phosphorus.
Further improvement is, described longitudinal bipolar transistor is PNP triode, and the first conduction type is P type, and the second conduction type is N-type.
Further improvement is, the implantation dosage of the ion implantation of the P type heavy doping injection region of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 5KEV ~ 20KEV, and implanted dopant is boron or boron fluoride.
Further improvement is, the implantation dosage of the ion implantation of the P type light dope injection region of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 5KEV ~ 40KEV, and implanted dopant is boron or boron fluoride.
Further improvement is, the region that described base covers comprises described first active area and second active area adjacent with described first active area, the second conduction type heavy doping injection region is formed on the surface of described second active area, be formed with metal silicide on this surface, the second conduction type heavy doping injection region, be connected extraction base stage by this metal silicide with the metal at top; The region that described collector region covers comprises described first active area, described second active area and three active area adjacent with described second active area, the first conductive type of trap is formed in described 3rd active area, the first conduction type heavy doping injection region is formed on the surface of this first conductive type of trap, be formed with metal silicide on this surface, the first conduction type heavy doping injection region, be connected extraction collector electrode by the 3rd metal silicide with the metal at top.
The present invention arranges light doping section by all sides of the heavily doped region in emitter region, high balk ring can be formed in all sides of the heavily doped region of emitter region, the dead resistance that high balk ring produces can provide a negative feedback effect when device big current works, thus the positive feedback effect that energy suppression device produces due to positive temperature effect when big current works, thus the safety operation area of energy boost device ICVC curve.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the sectional structure chart of longitudinal bipolar transistor in existing BCD technique;
Fig. 2 is the i-v curve of longitudinal bipolar transistor in existing BCD technique;
Fig. 3 is the sectional structure chart of longitudinal bipolar transistor in the embodiment of the present invention one BCD technique;
Fig. 4 A-Fig. 4 C is the schematic diagram of the emitter dead resistance of the embodiment of the present invention one;
In Fig. 5 A-Fig. 5 C embodiment of the present invention one BCD technique longitudinal bipolar transistor manufacture process in sectional structure chart.
Embodiment
As shown in Figure 3, be the sectional structure chart of longitudinal bipolar transistor in the embodiment of the present invention one BCD technique; In the embodiment of the present invention one BCD technique, longitudinal bipolar transistor is NPN triode, in the embodiment of the present invention one BCD technique, longitudinal bipolar transistor is formed in P-type silicon substrate 1, n type buried layer 2 and p type buried layer 3 is formed in described silicon substrate 1, described silicon substrate 1 is formed with an oxygen 4, isolates active area by described field oxygen 4; Described field oxygen 4 in the embodiment of the present invention one adopts shallow trench field oxygen (STI), also can adopt local field oxygen (LOCOS) in other embodiments.
Described longitudinal bipolar transistor comprises:
Collector region 5, is made up of the N-type deep trap 5 be formed on described silicon substrate 1.
Base 6, is made up of the P type trap 6 be formed in described N-type deep trap 5.
Emitter region, be formed by stacking by being formed at the N-type light dope injection region on surface, described base 6 and NLDD district 8 and N-type heavy doping injection region and N+ district 7, the doping content of the N-type heavy doping injection region 7 of described emitter region is greater than the doping content of N-type light dope injection region 8.Be preferably, the area of described emitter region is 1 × 1 micron
2~ 50 × 50 microns
2.The implantation dosage of the ion implantation of the N-type heavy doping injection region 7 of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 50KEV ~ 60KEV, and implanted dopant is arsenic or phosphorus.The implantation dosage of the ion implantation of the N-type light dope injection region 8 of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 2KEV ~ 20KEV, and implanted dopant is arsenic or phosphorus.
As shown in dotted line frame 15 regions, the N-type light dope injection region 8 of described emitter region covers a described active area, this active area is made to be the first active area, the central area covering described first active area of the N-type heavy doping injection region 7 of described emitter region, the region between the outermost edges of the N-type heavy doping injection region 7 of described emitter region and the outermost edges of the N-type light dope injection region 8 of described emitter region forms the high balk ring be made up of N-type light dope injection region 8; Be preferably, the width of described high balk ring is greater than 0 micron and is less than or equal to 10 microns.Metal silicide (not shown) is formed on the surface of described emitter region; Be preferably, the metal contact hole formed by metal silicide top and metal layer at top realize the extraction of emitter.Described high balk ring defines the size of the dead resistance of described emitter region and forms negative feedback effect when the operating current of described longitudinal bipolar transistor increases, and utilizes this negative feedback effect to suppress the positive feedback effect produced by positive temperature effect of described longitudinal bipolar transistor.
The region that described base 6 covers comprises described first active area and second active area adjacent with described first active area, P type heavy doping injection region and P+ district 9 is formed on the surface of described second active area, be formed with metal silicide on this surface, P type heavy doping injection region 9, be connected extraction base stage by this metal silicide with the metal at top; Be preferably, the metal contact hole formed by metal silicide top and metal layer at top realize the extraction of emitter.
The region that described collector region 5 covers comprises described first active area, described second active area and three active area adjacent with described second active area, N-type trap 10 is formed in described 3rd active area, N-type heavy doping injection region 11 is formed on the surface of this N-type trap 10, be formed with metal silicide on this surface, N-type heavy doping injection region 11, be connected extraction collector electrode by the 3rd metal silicide with the metal at top; Be preferably, the metal contact hole formed by metal silicide top and metal layer at top realize the extraction of emitter.
Described p type buried layer 3 is centered around described n type buried layer 2 around, P moldeed depth trap 12 is formed at the top of described p type buried layer 2, P trap 13 is formed in described P moldeed depth trap 12, P+ district 14 is formed at the top of described P trap 13, the surface in Gai P+ district 14 is formed with metal silicide, and the metal contact hole formed by this metal silicide top and metal layer at top realize the extraction of underlayer electrode.
Fig. 4 A-Fig. 4 C is the schematic diagram of the emitter dead resistance of the embodiment of the present invention one; Wherein Fig. 4 A is corresponding to the emitter region of existing device described in Fig. 1 and the structural representation of contact thereof, and Dou Wei N+ district, known whole emitter region 107, the dead resistance everywhere of emitter region 107 is less.Wherein Fig. 4 B corresponds to the emission area structure schematic diagram of the embodiment of the present invention one device described in Fig. 3, known only have the zone line of emitter region to be made up of N+ district 7, all sides in N+ district 7 are that NLDD district 8 forms, NLDD district 8 is light dope thus has larger dead resistance Re, so can form a high balk ring in the periphery, N+ district 7 of described emitter region.As shown in Figure 4 C, the operating diagram of the embodiment of the present invention one, during devices function, collector electrode (C) adds positive voltage, base stage (B) and emitter (E) all ground connection, due to the existence of the dead resistance Re of high balk ring, emitter is by dead resistance Re ground connection, due to the existence of dead resistance Re, when the collector current of device increases, the pressure drop on dead resistance Re also increases, and the pressure drop between collector and emitter reduces, thus the electric current of collector electrode is declined, thus form a negative feedback effect mechanism.The negative feedback effect mechanism brought by the dead resistance Re of the high balk ring of the embodiment of the present invention one can effectively suppress when big current works due to the positive feedback that positive temperature effect causes, thus the safety operation area of the ICVC curve of energy boost device.
As shown in Figure 5 A to FIG. 5 C, be longitudinal bipolar transistor in the embodiment of the present invention one BCD technique manufacture process in sectional structure chart.
As shown in Figure 5A, before formation emitter region, need in described silicon substrate 1, form described n type buried layer 2, described p type buried layer 3, described field oxygen 4, described collector region 5, described base 6, described N-type trap 10, described P moldeed depth trap 12 and P trap 13.Form photoetching offset plate figure 16a afterwards and open described first active area, carry out NLDD injection on the surface of the described base 6 of described first active area and NLDD imp forms NLDD district, described emitter region 8.The implantation dosage of the ion implantation of the N-type light dope injection region 8 of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 2KEV ~ 20KEV, and implanted dopant is arsenic or phosphorus.
As shown in Figure 5 B, form photoetching offset plate figure 16b to open and need to form N+ area and carry out that N+ injections and N+imp form the N-type heavy doping injection region 7 of described emitter region, the implantation dosage of N-type heavy doping injection region 11, this N+ injection on the surface of described N-type trap 10 is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 50KEV ~ 60KEV, and implanted dopant is arsenic or phosphorus.
As shown in Figure 5 C, form photoetching offset plate figure 16C to open and need to form P+ area and carry out P+ injection and P+imp forms the described P+ district 9 on surface, described base 6 and the described P+ district 14 on described P trap 13 surface.
All need to remove corresponding photoresist after having injected in above-mentioned steps at every turn.Afterwards in formation described metal silicide, interlayer film, metal contact hole and metal layer at top.
In the embodiment of the present invention two BCD technique, longitudinal bipolar transistor is PNP triode, the difference part of the embodiment of the present invention two and the embodiment of the present invention one is, each doped region doping type is just in time contrary, emitter region is that P type light dope injection region and PLDD district and P type heavy doping injection region and P+ district are formed by stacking, and the doping content in the P+ district of described emitter region is greater than the doping content in PLDD district.Be preferably, the area of described emitter region is 1 × 1 micron
2~ 50 × 50 microns
2.The implantation dosage of the ion implantation in the P+ district of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 5KEV ~ 20KEV, and implanted dopant is boron or boron fluoride.The implantation dosage of the ion implantation in the PLDD district of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 5KEV ~ 40KEV, and implanted dopant is boron or boron fluoride.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (10)
1. a longitudinal bipolar transistor in BCD technique, is characterized in that: longitudinal bipolar transistor is formed on silicon substrate, described silicon substrate is formed with an oxygen, isolates active area by described field oxygen; Described longitudinal bipolar transistor comprises:
Collector region, is made up of the first conduction type deep trap be formed on described silicon substrate;
Base, is made up of the second conductive type of trap be formed in described first conduction type deep trap;
Emitter region, be formed by stacking by the first conduction type light dope injection region and the first conduction type heavy doping injection region that are formed at described base region surface, the doping content of the first conduction type heavy doping injection region of described emitter region is greater than the doping content of the first conduction type light dope injection region;
First conduction type light dope injection region of described emitter region covers a described active area, this active area is made to be the first active area, the central area covering described first active area of the first conduction type heavy doping injection region of described emitter region, region between the outermost edges of the first conduction type heavy doping injection region of described emitter region and the outermost edges of the first conduction type light dope injection region of described emitter region forms the high balk ring be made up of the first conduction type light dope injection region, is formed with metal silicide on the surface of described emitter region; Described high balk ring defines the size of the dead resistance of described emitter region and forms negative feedback effect when the operating current of described longitudinal bipolar transistor increases, and utilizes this negative feedback effect to suppress the positive feedback effect produced by positive temperature effect of described longitudinal bipolar transistor.
2. longitudinal bipolar transistor in BCD technique as claimed in claim 1, is characterized in that: the area of described emitter region is 1 × 1 micron
2~ 50 × 50 microns
2.
3. longitudinal bipolar transistor in BCD technique as claimed in claim 1, is characterized in that: the width of described high balk ring is greater than 0 micron and is less than or equal to 10 microns.
4. longitudinal bipolar transistor in BCD technique as claimed in claim 1, it is characterized in that: described longitudinal bipolar transistor is NPN triode, the first conduction type is N-type, and the second conduction type is P type.
5. longitudinal bipolar transistor in BCD technique as claimed in claim 4, is characterized in that: the implantation dosage of the ion implantation of the N-type heavy doping injection region of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 50KEV ~ 60KEV, and implanted dopant is arsenic or phosphorus.
6. longitudinal bipolar transistor in BCD technique as claimed in claim 4, is characterized in that: the implantation dosage of the ion implantation of the N-type light dope injection region of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 2KEV ~ 20KEV, and implanted dopant is arsenic or phosphorus.
7. longitudinal bipolar transistor in BCD technique as claimed in claim 1, it is characterized in that: described longitudinal bipolar transistor is PNP triode, the first conduction type is P type, and the second conduction type is N-type.
8. longitudinal bipolar transistor in BCD technique as claimed in claim 7, is characterized in that: the implantation dosage of the ion implantation of the P type heavy doping injection region of described emitter region is 1E15CM
-2~ 5E15CM
-2, Implantation Energy is 5KEV ~ 20KEV, and implanted dopant is boron or boron fluoride.
9. longitudinal bipolar transistor in BCD technique as claimed in claim 7, is characterized in that: the implantation dosage of the ion implantation of the P type light dope injection region of described emitter region is 1E13CM
-2~ 9E14CM
-2, Implantation Energy is 5KEV ~ 40KEV, and implanted dopant is boron or boron fluoride.
10. longitudinal bipolar transistor in BCD technique as claimed in claim 1, it is characterized in that: the region that described base covers comprises described first active area and second active area adjacent with described first active area, the second conduction type heavy doping injection region is formed on the surface of described second active area, be formed with metal silicide on this surface, the second conduction type heavy doping injection region, be connected extraction base stage by this metal silicide with the metal at top; The region that described collector region covers comprises described first active area, described second active area and three active area adjacent with described second active area, the first conductive type of trap is formed in described 3rd active area, the first conduction type heavy doping injection region is formed on the surface of this first conductive type of trap, be formed with metal silicide on this surface, the first conduction type heavy doping injection region, be connected extraction collector electrode by the 3rd metal silicide with the metal at top.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5198692A (en) * | 1989-01-09 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor device including bipolar transistor with step impurity profile having low and high concentration emitter regions |
| JPH05182977A (en) * | 1992-01-07 | 1993-07-23 | Kawasaki Steel Corp | Manufacture of semiconductor device |
| CN101814433A (en) * | 2009-02-20 | 2010-08-25 | 联发科技股份有限公司 | Lateral bipolar junction transistor and method for manufacturing the same |
| US20110127615A1 (en) * | 2009-12-01 | 2011-06-02 | Mitsuo Tanaka | Semiconductor apparatus and manufacturing method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5198692A (en) * | 1989-01-09 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor device including bipolar transistor with step impurity profile having low and high concentration emitter regions |
| JPH05182977A (en) * | 1992-01-07 | 1993-07-23 | Kawasaki Steel Corp | Manufacture of semiconductor device |
| CN101814433A (en) * | 2009-02-20 | 2010-08-25 | 联发科技股份有限公司 | Lateral bipolar junction transistor and method for manufacturing the same |
| US20110127615A1 (en) * | 2009-12-01 | 2011-06-02 | Mitsuo Tanaka | Semiconductor apparatus and manufacturing method thereof |
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