CN104659205A - Manufacturing method of RRAM - Google Patents
Manufacturing method of RRAM Download PDFInfo
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- CN104659205A CN104659205A CN201310594875.4A CN201310594875A CN104659205A CN 104659205 A CN104659205 A CN 104659205A CN 201310594875 A CN201310594875 A CN 201310594875A CN 104659205 A CN104659205 A CN 104659205A
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- metal layer
- interlayer dielectric
- rram
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- tungsten oxide
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Abstract
The invention discloses a manufacturing method of RRAM. The manufacturing method comprises the following steps: 1) growing a first metal layer on a silicon substrate; 2) depositing an interlayer dielectric layer on the first metal layer; 3) etching the interlayer dielectric layer till the first metal layer, and forming through holes; 4) filling the through holes with metal tungsten, and flattening; 5) utilizing quick thermal oxidation to oxidize the metal tungsten at the top to form tungsten oxide, and performing oxygen ionization on the tungsten oxide; 6) depositing photoresist on the interlayer dielectric layer, and removing the tungsten oxide in the non-RRAM unit region through photoetching; 7) growing a second metal layer on the interlayer dielectric layer, and performing thermal annealing treatment. According to the manufacturing method disclosed by the invention, the prepared RRAM is high in initial resistance, good in in-plane uniformity, and obvious in distinguishing of high-low configurations; meanwhile, the manufacturing method is simple in preparation process and prone to be integrated with the conventional logic process.
Description
Technical field
The present invention relates to a kind of RRAM(Resistive Random Access Memory, resistive random asccess memory) manufacture method, particularly relate to the manufacture method of a kind of new RRAM.
Background technology
In recent years, along with the develop rapidly, universal of portable multimedia digital product, more and more higher to the requirement of movable storage device.Various memory also make great efforts towards sooner, larger future development.But due to self structure, different memories all more or less has oneself advantage, also has irremediable inferior position.Therefore, memory towards sooner, while larger this general orientation development, also simultaneously towards diversified future development.RRAM(Resistive Random AccessMemory) memory is exactly a kind of memory occurred under this overall background, it is that a kind of voltage according to being applied on metal oxide (Metal oxide) is different, material is changed between high-impedance state and low resistance state, thus block or firing current circulation passage, utilize this character to store the internal memory of information, it can significantly improve durability and data transmission bauds.
Present RRAM research mainly concentrates on change resistance layer Quality Research aspect, how to realize RRAM memory cell and the integrated also rarely seen report of existing logic process.
Summary of the invention
The technical problem to be solved in the present invention is to provide the manufacture method of a kind of new RRAM.The method can realize the compatibility with existing technique, and makes simple.
For solving the problems of the technologies described above, the manufacture method of new resistive random asccess memory (RRAM) of the present invention, comprises step:
1) on a silicon substrate, the first metal layer is grown;
2) deposit interlayer dielectric layer (ILD) on the first metal layer;
3) etch interlayer dielectric layer until the first metal layer, form through hole;
4) in through hole, fill tungsten, and carry out planarization;
5) utilize rapid thermal oxidation (Rapid Thermal Oxidation) that the oxidation of the tungsten at top is formed tungsten oxide (WOx), and oxonium ion process is carried out to tungsten oxide;
Wherein, the condition of rapid thermal oxidation is: temperature 400 ~ 550 DEG C, and the time of thermal oxidation is 10 ~ 100s;
6) deposit photoresist on interlayer dielectric layer, by photoetching, removes the tungsten oxide in non-resistive random asccess memory (RRAM) unit (cell) region;
7) on interlayer dielectric layer, grow the second metal level, and carry out thermal anneal process.
In described step 1), the method for growth the first metal layer comprises: physical vapor deposition (PVD) or chemical vapor deposition (CVD); The material of the first metal layer comprises: be followed successively by TiN, Ti and AlCu[and TiN (titanium nitride)/Ti(titanium from top to down)/AlCu(aluminum bronze)]; The thickness of the first metal layer is 1000 ~ 8000 dusts.
In described step 5), the thickness of tungsten oxide is 100 ~ 1000 dusts; Gas in rapid thermal oxidation comprises: pure oxygen or nitrogen oxygen atmosphere; The method of oxonium ion process comprises: use plasma enhanced CVD method (PECVD) to process, the temperature of process is 350 ~ 450 DEG C, and the time of process is 450 ~ 550s.
In described step 7), the growing method of the second metal level comprises: physical vapor deposition (PVD) or chemical vapor deposition (CVD), and the material of the second metal level comprises: be followed successively by TiN, Ti and AlCu[and TiN (titanium nitride)/Ti(titanium from top to down)/AlCu(aluminum bronze)]; The thickness of the second metal level is 1000 ~ 8000 dusts;
The condition of thermal anneal process is: temperature 300 ~ 600 DEG C; Time is 10 ~ 150s; Annealing atmosphere comprises: nitrogen or argon gas.
Therefore, adopting new RRAM method of manufacturing technology proposed by the invention, RRAM technique can being fused in existing technique when only increasing one deck mask plate, realize the compatibility with existing technique.RRAM cell district both can be produced on contact hole layer by this technique, also RRAM cell district can be produced on via layer.
Be manufactured on via layer for RRAM cell region, its flow process is followed successively by the first metal layer formation-metal interlevel film formation-through hole formation-through hole W and fills-WOx(tungsten oxide) form-WOx oxonium ion process-non-RRAM cell region WOx removal the-the second metal level formation-thermal anneal process process.Wherein, non-RRAM cell region WOx removes as newly increasing lithography layer, namely only need fill at through hole tungsten and the oxide of tungsten just can be utilized to make key structure-variable resistance in RRAM by rapid thermal oxidation after planarization, and got rid of by the tungsten oxide in non-RRAM cell region by the lithography layer that one deck is new, and improve the performance of RRAM by follow-up oxonium ion process and rapid thermal annealing.
RRAM prepared by the present invention not only initial resistance is large, and inner evenness is good, and height configuration is distinguished obviously, and meanwhile, preparation technology is simple, easily integrated with traditional logic technique.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is growth the first metal layer and interlayer dielectric layer and schematic diagram after carving hole;
Fig. 2 fills tungsten and schematic diagram after planarization in hole;
Fig. 3 utilizes rapid thermal oxidation that the oxidation of the tungsten at top is formed WOx, and uses the schematic diagram after PECVD process;
Fig. 4 is the schematic diagram removed by the WOx in non-RRAM cell region by the lithography layer that one deck is new;
Fig. 5 is growth second metal level, and the schematic diagram after rapid thermal annealing reparation tungsten surface damage;
Fig. 6 is the performance map of the RRAM that the present invention manufactures.
In figure, description of reference numerals is as follows:
11 is silicon substrate, and 12 is the first metal layer, and 1 is AlCu layer, and 2 is TiN/Ti layer, and 3 is interlayer dielectric layer (ILD), and 4 is through hole (Via1), and 5 is tungsten (W), and 6 is tungsten oxide (WOx), and 7 is the second metal level.
Embodiment
The manufacture method of new resistive random asccess memory (RRAM) of the present invention, comprises step:
1) on silicon substrate 11, employing physical vapor deposition (PVD) or chemical vapor deposition (CVD) growth thickness are the first metal layer 12 of 1000 ~ 8000 dusts;
Wherein, the material of the first metal layer 12: can be TiN, Ti and AlCu successively from top to down, namely the general TiN of TiN/Ti layer 2(is that 250 Izods are right, and Ti is 50 dusts) and AlCu layer 1.
2) deposit interlayer dielectric layer (ILD) 3 on the first metal layer 12;
3) interlayer dielectric layer 3 is etched until the first metal layer 12(and TiN/Ti layer 2), form through hole 4(as shown in Figure 1);
4) in through hole 4, fill tungsten 5, and carry out planarization (as shown in Figure 2);
5) utilize rapid thermal oxidation that the oxidation of the tungsten at top is formed the tungsten oxide (WOx) 6 that thickness is 100 ~ 1000 dusts (as 650 dusts), and oxonium ion process is carried out to tungsten oxide 6, as used plasma enhanced CVD method (PECVD) treatment surface (crystal column surface), the temperature of process is 350 ~ 450 DEG C, and the time of process is that 450 ~ 550s(is as cocoa PECVD process 500s at 400 DEG C) (as shown in Figure 3);
Wherein, the condition of rapid thermal oxidation is: temperature 400 DEG C ~ 550 DEG C, time of thermal oxidation be 10 ~ 100s(as can at 450 DEG C thermal oxidation 100s), the gas in rapid thermal oxidation comprises: pure oxygen or nitrogen oxygen atmosphere;
In this step, the object that using plasma strengthens CVD (Chemical Vapor Deposition) method process is the content increasing oxygen element in WOx, to improve the initial resistance state of RRAM.
6) deposit photoresist on interlayer dielectric layer 3, by photoetching, removes (as shown in Figure 4) by the tungsten oxide in non-resistive random asccess memory (RRAM) unit (cell) region;
7) on interlayer dielectric layer 3, employing physical vapor deposition (PVD) or chemical vapor deposition (CVD) growth thickness are that the second metal level 7(of 1000 ~ 8000 dusts notes without the need to the titanium nitride/titanium layer under growing metal Solder for Al-Cu Joint Welding, namely the TiN/Ti layer of AlCu lower floor is eliminated compared with the prior art), and 300 ~ 600 DEG C, annealing atmosphere comprises: carry out thermal anneal process 10 ~ 150s under the condition of nitrogen or argon gas, in order to improve the contact of WOx and AlCu, namely repair the surface contact of through hole 4 filler.Wherein, the material of the second metal level 7: can be TiN/Ti layer and AlCu layer from top to down successively.
Finally be formed in the cross-section structure of the single cell of RRAM on through hole 4 as shown in Figure 5.
According to above-mentioned steps, the RRAM that RRAM cell district is produced on via layer can be obtained.But the manufacture method that RRAM cell district of the present invention is produced on the RRAM of contact hole layer is produced on the manufacture method of the RRAM of via layer as RRAM cell district, therefore, no longer repeat here to discuss.
In addition, the performance of the RRAM adopting said method to manufacture as shown in Figure 6.From Fig. 6 obviously, the height configuration of RRAM of the present invention is distinguished obviously.Meanwhile, RRAM initial resistance prepared by the present invention is large, and inner evenness is good and preparation technology simple, easily integrated with traditional logic technique.
Claims (4)
1. a manufacture method of resistive random asccess memory RRAM, is characterized in that, comprises step:
1) on a silicon substrate, the first metal layer is grown;
2) deposit interlayer dielectric layer on the first metal layer;
3) etch interlayer dielectric layer until the first metal layer, form through hole;
4) in through hole, fill tungsten, and carry out planarization;
5) utilize rapid thermal oxidation that the oxidation of the tungsten at top is formed tungsten oxide, and oxonium ion process is carried out to tungsten oxide;
Wherein, the condition of rapid thermal oxidation is: temperature 400 ~ 550 DEG C, and the time of thermal oxidation is 10 ~ 100s;
6) deposit photoresist on interlayer dielectric layer, by photoetching, removes the tungsten oxide of non-resistive random asccess memory RRAM unit area;
7) on interlayer dielectric layer, grow the second metal level, and carry out thermal anneal process.
2. the method for claim 1, is characterized in that: in described step 1), and the method for growth the first metal layer comprises: physical vapour deposition (PVD) or chemical vapour deposition (CVD);
The material of the first metal layer comprises: be followed successively by TiN, Ti and AlCu from top to down;
The thickness of the first metal layer is 1000 ~ 8000 dusts.
3. the method for claim 1, is characterized in that: in described step 5), and the thickness of tungsten oxide is 100 ~ 1000 dusts;
Gas in rapid thermal oxidation comprises: pure oxygen or nitrogen oxygen atmosphere;
The method of oxonium ion process comprises: use plasma enhanced CVD method to process, the temperature of process is 350 ~ 450 DEG C, and the time of process is 450 ~ 550s.
4. the method for claim 1, is characterized in that: in described step 7), and the growing method of the second metal level comprises: physical vapour deposition (PVD) or chemical vapour deposition (CVD);
The material of the second metal level comprises: be followed successively by TiN, Ti and AlCu from top to down;
The thickness of the second metal level is 1000 ~ 8000 dusts;
The condition of thermal anneal process is: temperature 300 ~ 600 DEG C, and the time is 10 ~ 150s, and annealing atmosphere comprises: nitrogen or argon gas.
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Cited By (3)
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CN105810638A (en) * | 2014-12-31 | 2016-07-27 | 上海格易电子有限公司 | 3D NAND flash memory structure and manufacturing method |
CN109911843A (en) * | 2019-02-27 | 2019-06-21 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of metal thin-film pattern |
CN112635518A (en) * | 2020-12-18 | 2021-04-09 | 华虹半导体(无锡)有限公司 | Process method for depositing RRAM bottom electrode on MOSFET contact hole |
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CN105810638A (en) * | 2014-12-31 | 2016-07-27 | 上海格易电子有限公司 | 3D NAND flash memory structure and manufacturing method |
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CN109911843A (en) * | 2019-02-27 | 2019-06-21 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of metal thin-film pattern |
CN109911843B (en) * | 2019-02-27 | 2021-08-24 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing metal film pattern |
CN112635518A (en) * | 2020-12-18 | 2021-04-09 | 华虹半导体(无锡)有限公司 | Process method for depositing RRAM bottom electrode on MOSFET contact hole |
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Application publication date: 20150527 |