CN104656105A - Systems and Methods for Clock Calibration for Satellite Navigation - Google Patents

Abstract

System and methods are provided for clock calibration. A satellite navigation system includes: a timing component configured to determine a counting period for clock calibration; a counter network configured to determine a first number of local clock periods associated with a local clock of the satellite navigation system during the counting period and determine a second number of external clock periods associated with an external clock during the counting period; and a processor configured to perform calibration for the local clock based at least in part on the first number of the local clock periods and the second number of the external clock periods.

Description

For the system and method for satellite navigation clock alignment

the cross reference of related application

The right of priority of U.S. Provisional Patent Application that the disclosure requires on November 19th, 2013 to submit to numbers 61/906,184 also has benefited from this, and its full content is by reference to being herein incorporated.

Technical field

The technology described in this patent document relates generally to satellite-based navigation, and more particularly relates to the clock alignment for satellite navigation.

Background technology

Satellite-based navigational system is widely used.GLONASS (Global Navigation Satellite System) (GNSS) comprises GPS (GPS) (U.S.), GLONASS (Russia), Galileo (Europe) and COMPASS (China).GNSS is usually directed to multiple satellite around Earth's orbit, and multiple satellite forms a group of stars for satellite.Each satellite periodically launches navigation message, and this message can be received by GNSS receiver and use, to derive position, speed and/or time.Such as, GPS navigation system can obtain and follow the trail of gps satellite signal, can find range between several satellite and gps receiver, to calculate the position of receiver.Obtaining measuring of performance is primary positioning time (TTFF).TTFF can depend on the accuracy of receiver to the previously estimation of the gps time in the local timing system of receiver.

Electron device (such as, mobile phone, flat computer, camera etc.) generally includes gps receiver.Different clocks may be used for the difference in functionality module in this electron device.Such as, the local clock of the corresponding gps receiver of the clock for gps receiver, and the external clock that other clocks can be corresponding relative with gps receiver.The local clock of gps receiver provides reference frequency source, to generate local carrier, conversion and the mixing of gps signal in a base band fall in its gps signal be used in radio frequency (RF) front end.

Summary of the invention

According to instruction herein-above set forth, be provided for the system and method for clock alignment.Satellite navigation system comprises: timing part, is configured to the count cycle determining clock alignment; Counter network, is configured to determine the first number of the local clock cycles associated with local clock during the count cycle and during the count cycle, determines the second number of the external clock cycle associated with external clock; And processor, be configured to perform the calibration for local clock based on the first number of local clock cycles and the second number of external clock cycle at least in part.

In one embodiment, provide for the method for satellite navigation system clock alignment.Determine the count cycle of the clock alignment of satellite navigation system.The first number of the local clock cycles associated with the local clock of satellite navigation system is determined during the count cycle.The second number of the external clock cycle associated with external clock is determined during the count cycle.The local clock being satellite navigation system based on the first number of local clock cycles and the second number of external clock cycle at least in part performs calibration.

In another embodiment, mobile device comprises: one or more processor; Satellite navigation system; And computer-readable recording medium, it uses instruction encoding, and this instruction is used to order data processor executable operations.Determine the count cycle of the clock alignment of satellite navigation system.The first number of the local clock cycles associated with the local clock of satellite navigation system is determined during the count cycle.The second number of the external clock cycle associated with external clock is determined during the count cycle.At least in part based on the first number of local clock cycles and the second number of external clock cycle, for the local clock of satellite navigation system performs calibration.

Accompanying drawing explanation

Fig. 1 illustrates that display of satellite navigation starts the example chart of (enabled) device.

Fig. 2 illustrates the example chart of some parts of display of satellite navigation system.

Fig. 3 illustrates another example chart of some parts of display of satellite navigation system.

Fig. 4 shows the example chart of display local clock pulses, external timing signal and snapshot trigger pip.

Fig. 5 illustrates the example chart of display for the process flow diagram of clock alignment.

Fig. 6 illustrates display another example chart for the process flow diagram of clock alignment.

Embodiment

The primary positioning time (TTFF) of gps receiver depends on the accuracy of receiver to the previous estimation of the gps time in its local timing system usually.As shown in Figure 1, when gps receiver 102 (such as, in satellite navigation starter gear 100) is closed, the valuation of gps time maintains with the local clock 104 based on temperature compensating crystal oscillator (TCXO) usually.Such as, calibrating clock frequency value is stored in the storer associated with local clock 104 in order to using in the future.But the frequency of local clock 104 is usually with temperature with change in time.When receiver 102 starts, the calibrating clock frequency value of storage may be no longer accurate, and this may cause problem.Such as, frequency error may be introduced the Doppler frequency of gps signal by the inaccuracy of the clock frequency value of calibration during falling conversion.Wider Doppler frequency search may be needed to obtain gps signal, and this may produce long many TTFF.

Fig. 2 illustrates the example chart of some parts of display of satellite navigation system.As shown in Figure 2, external timing signal 202 is introduced into satellite navigation system 200 (such as, gps receiver), and uses both external timing signal 202 and local clock pulses 204 to perform the clock alignment of satellite navigation system 200.Such as, satellite navigation system 200 is included in a mobile device (such as, smart phone, panel computer).This external timing signal 202 is provided by another functional module of mobile device, such as, and the modulator-demodular unit clock calibrated by communication network (such as, GSM/CDMA).Local clock pulses 204 is provided by the local clock (not shown) of satellite navigation system 200.

Particularly, timing part 206 determines the count cycle of clock alignment.Counter network 208 counts the number of the local clock cycles associated with the local clock pulses 204 of satellite navigation system 200 during the count cycle, and the number of the external clock cycle associated with external timing signal 202.Counter network 208 exports the local clock 212 relevant with the count number of local clock cycles during the count cycle, and exports the external clock value 210 relevant with the count number of external clock cycle.One or more processor 214 is determined to calibrate ratio based on local clock 212 and external clock value 210, and uses the calibration of calibration ratio execution to the local clock of satellite navigation system 200.

Fig. 3 illustrates another example chart of some parts of display of satellite navigation system 200.As shown in Figure 3, by timing part 206 (such as, trigger signal generator) during count cycle of determining, the number of the local clock cycles of local clock pulses 204 determined by counter 302 in counter network 208, and the number of the external clock cycle of external timing signal 202 determined by another counter 304.

Particularly, counter 302 and 304 has N bit width.When rising edge edge or the arrival of trailing edge edge of local clock pulses 204, counter 302 makes the increase by 1 of local counting.When this locality counting is more than 2 ⁿwhen-1, this locality counting is reset to 0 by counter 302.Similarly, when rising edge edge or the arrival of trailing edge edge of external timing signal 202, counter 304 makes external counting increase by 1.When external counting is more than 2 ⁿwhen-1, external counting is reset to 0 by counter 304.This processor 214 generates and is used for the trigger command 312 of clock alignment, and timing part 206 exports snapshot trigger pip 306, its can with for the local clock pulses 304 of clock alignment or external timing signal 302 synchronous.Such as, if local clock pulses 204 frequency is higher than external timing signal 202, so snapshot trigger pip 306 is synchronous with external timing signal 202.If local clock pulses 204 frequency is lower than external timing signal 202, so snapshot trigger pip 306 is synchronous with local clock pulses 204.When rising edge edge or the arrival of trailing edge edge of snapshot trigger pip 306, switch 308 and 310 closed (such as, connecting), and processor 214 is respectively by switch 308 and 310 reception local clock and external clock value.

Fig. 4 shows the example chart of display local clock pulses 204, external timing signal 202 and snapshot trigger pip 306.As shown in Figure 4, local clock pulses 204 frequency is lower than external timing signal 202, and snapshot trigger pip 306 is synchronous with the local clock pulses 204 for clock alignment.

Particularly, the rising edge edge of snapshot trigger pip 306 and the rising edge synchronization of local clock pulses 204 are (such as, at t _k).The rising edge edge of corresponding local clock pulses 204 is (such as, at t _k), this locality counting (such as, count_gps_clk (k)) is increased by 1 by counter 302.The rising edge of corresponding external timing signal 202 is along (such as, comparing t _kearly), counter 304 has made external counting (such as, count_eclk (k)) increase by 1.The rising edge edge of corresponding snapshot trigger pip 306, switch 308 and 310 is connected, and the count value of local counting and external counting (such as, count_gps_clk (k) with such as, count_eclk (k)) be provided to processor 214.

The next rising edge of snapshot trigger pip 306 is along arriving (such as, at t _k+1), and with another rising edge synchronization of local clock pulses 204.Count cycle (such as, T _counting) corresponding snapshot trigger pip 306 two rising edges along between time cycle.During the count cycle, each rising edge of the corresponding local clock pulses of counter 302 204 is along making local counting (such as, count_gps_clk (k)) increase by 1, and each rising edge of the corresponding external timing signal of counter 304 202 increases by 1 along making external counting (such as, count_eclk (k)).The next rising edge edge of corresponding snapshot trigger pip 306 is (such as, at t _k+1), switch 308 and 310 is connected again, and the current count value of local counting (such as, count_gps_clk (k)) and external counting (such as, count_eclk (k)) is provided to processor 214.Processor 214 is determined at different time t _kand t _k+1difference between the count value of this locality counting obtained, and at different time t _kand t _k+1difference between the count value of the external counting obtained is for clock alignment.

Such as, determine as follows at different time t _kand t _k+1difference between the count value of this locality counting obtained:

$\mathrm{\Δcount}\_\mathrm{gps}\_\mathrm{clk}=\left\{\begin{array}{cc}\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}(k+1)-\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}\left(k\right),& \mathrm{count}\_\mathrm{gps}\_\mathrm{clk}(k+1)>\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}\left(k\right)\\ 2^N+\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}(k+1)-\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}\left(k\right),& \mathrm{count}\_\mathrm{gps}\_\mathrm{clk}(k+1)\≤\mathrm{count}\_\mathrm{gps}\_\mathrm{clk}\left(k\right)\end{array}\right.$

Wherein count_gps_clk represents the count value of local counting, and N represents the bit width of counter 302 and 304.Determine as follows at different time t _kand t _k+1difference between the count value of the external counting obtained:

$\mathrm{\Δcount}\_\mathrm{eclk}=\left\{\begin{array}{cc}\mathrm{count}\_\mathrm{eclk}(k+1)-\mathrm{count}\_\mathrm{eclk}\left(k\right),& \mathrm{count}\_\mathrm{eclk}(k+1)>\mathrm{count}\_\mathrm{eclk}\left(k\right)\\ 2^N+\mathrm{count}\_\mathrm{eclk}(k+1)-\mathrm{count}\_\mathrm{eclk}\left(k\right),& \mathrm{count}\_\mathrm{eclk}(k+1)\≤\mathrm{count}\_\mathrm{eclk}\left(k\right)\end{array}\right.$

Wherein count_eclk represents the outside count value calculated.

Determine the local clock frequency of local clock pulses 204 as follows:

$f_{\mathrm{gps}\_\mathrm{clk}}=\frac{\mathrm{\Δcount}\_\mathrm{gps}\_\mathrm{clk}}{\mathrm{\Δcount}\_\mathrm{eclk}}\·f_{\mathrm{eclk}}$

Wherein f _{gps_clk}represent the local clock frequency of local clock pulses 204, f _eclkrepresent the external clock frequency associated with external timing signal 202, and k represents the k of corresponding snapshot trigger pip 306 ^ththe k at edge ^thsnapshot.

In certain embodiments, when satellite navigation system 200 (such as, gps receiver) with one or more satellite communications of GNSS system for locating time, the local clock of satellite navigation system 200 can be calibrated by the system time of GNSS system, and the local clock of calibration then can be used to calibrate external clock.Such as, the external clock frequency of external timing signal 202 is determined as follows:

$f_{\mathrm{eclk}}^{\′}=\frac{\mathrm{\Δcount}\_\mathrm{eclk}}{\mathrm{\Δcount}\_\mathrm{gps}\_\mathrm{clk}}\·f_{\mathrm{gps}\_\mathrm{clk}}^{\′}$

Wherein f ' _{gps_clk}represent the local clock frequency calibrated by the system time of GNSS system, and f ' _eclkrepresent the external clock frequency calibrated by local clock frequency.

For example, external clock can be calibrated according to the system time of GNSD system.

$f_{\mathrm{eclk}}^{\′}=\frac{\mathrm{\Δcount}\_\mathrm{eclk}}{\mathrm{gps}\_\mathrm{time}(k+1)-\mathrm{gps}\_\mathrm{time}\left(k\right)}$

Wherein gps_time represents by the system time of GNSS system, and f ' _eclkrepresent the external clock frequency calibrated by system time.Such as, this system time relates to the time of local clock.The external clock of calibration may be used for maintaining the satellite navigation time when satellite navigation system 200 closes (such as, power-off).

The count value of local counting and external counting can be integer.Such as, the count cycle comprises many whole local clock cycles, and the count cycle can comprise many whole external clock cycles and mark external clock cycle simultaneously.The count value of external counting can not reflect mark external clock cycle.Such as, error is not more than an external clock cycle.The frequency error of the local clock frequency relating to mark external clock cycle can be calculated as follows:

${\mathrm{\&Delta;f}}_{\mathrm{gps}\_\mathrm{clk}}=\left\{\begin{array}{cc}\frac{f_{\mathrm{gps}\_\mathrm{clk}}}{f_{\mathrm{eclk}}\&CenterDot;T-1},& f_{\mathrm{gps}\_\mathrm{clk}}<f_{\mathrm{eclk}}\\ 1/T,& f_{\mathrm{gps}\_\mathrm{clk}}\&GreaterEqual;f_{\mathrm{eclk}}\end{array}\right.$

Wherein Δ f _{gps_clk}represent the frequency error at the local clock frequency using the local clock pulses 204 after external timing signal 202 calibration, and T represents the duration of count cycle.In order to reduce the frequency error for local clock frequency, the count cycle can be selected as having long duration, such as 1 second.

In certain embodiments, the frequency error of the local clock frequency relating to mark external clock cycle can be calculated as follows:

${\mathrm{\&Delta;f}}_{\mathrm{eclk}}=\left\{\begin{array}{c}\frac{f_{\mathrm{eclk}}}{f_{\mathrm{gps}\_\mathrm{clk}}\&CenterDot;T-1},f_{\mathrm{eclk}}<f_{\mathrm{gps}\_\mathrm{clk}}\\ 1/T,f_{\mathrm{eclk}}\&GreaterEqual;f_{\mathrm{gps}\_\mathrm{clk}}\end{array}\right.$

Wherein Δ f _eclkrepresent the frequency error at the external clock frequency using the external timing signal 202 after local clock pulses 202 calibration.

Described clock alignment scheme is only example, and can implement change, replacement and/or amendment for clock alignment.In certain embodiments, snapshot trigger pip 306 rising edge along can with the decline edge synchronization of the local clock pulses 204 for clock alignment.In certain embodiments, snapshot trigger pip 306 trailing edge along can with the rising edge of the local clock pulses 204 for clock alignment along or decline edge synchronization.In certain embodiments, if the frequency of local clock pulses 204 is higher than external timing signal 202, so snapshot trigger pip 306 rising edge along or trailing edge along with the rising edge of the external timing signal 202 for clock alignment along or decline edge synchronization.

Fig. 5 illustrates the example chart of display for the process flow diagram of clock alignment.As shown in Figure 5,502, send snapshot trigger command (such as, by one or more processor 214).504, generating snapshot trigger pip (such as, by trigger signal generator).Receive local clock pulses and the external timing signal of satellite navigation system (such as, gps receiver).In 506, make the edge of snapshot trigger pip (such as, rising edge edge or trailing edge edge) synchronous with the edge (such as rising edge edge or trailing edge edge) of clock signal slower between local clock pulses and external timing signal.508, obtain for clock alignment and store the count value relevant with local clock pulses and the count value relevant with external timing signal.510, use the count value relevant with local clock pulses and relevant count value calibrates the local clock frequency of local clock pulses with external timing signal.

Fig. 6 illustrates the example chart of display for another process flow diagram of clock alignment.602, determine the count cycle of the clock alignment of satellite navigation system.604, determine the first number of the local clock cycles associated with the local clock of satellite navigation system during the count cycle.606, determine the second number of the external clock cycle associated with external clock during the count cycle.608, at least in part based on the first number of local clock cycles and the second number of external clock cycle, for the local clock of satellite navigation system performs calibration.

The open the present invention of the description use-case write, comprises best mode, and makes those skilled in the art to carry out and to use the present invention.The scope that the present invention can patent can comprise other examples that those skilled in the art expect.But other also can be used to perform, the hardware of such as firmware and even suitably design, these hardware are configured to implement described method and system herein.Such as, described herein system and method can perform, as coprocessors or as hardware accelerator in independently processing engine.Going back in another example, system and method described herein can be provided on many dissimilar computer-readable mediums, comprise computer stored mechanism (such as, CD-ROM, disk, RAM, flash memory, hard disc of computer etc.), it can hold for the instruction in being run by one or more processor (such as, software), to carry out the operation of this method and to realize described system herein.

Claims (20)

1. a satellite navigation system, comprising:

Timing part, is configured to the count cycle determining clock alignment;

Counter network, is configured to during the described count cycle, determine the first number of the local clock cycles associated with the local clock of described satellite navigation system and during the described count cycle, determine the second number of the external clock cycle associated with external clock; With

Processor, is configured to perform the calibration for described local clock based on the first number of described local clock cycles and the second number of described external clock cycle at least in part.

2. system according to claim 1, wherein said timing part comprises:

Trigger signal generator, is configured to generation first trigger pip and the second trigger pip, the beginning of described first trigger pip corresponding described count cycle, the end of the second trigger pip corresponding described count cycle.

3. system according to claim 2, wherein said trigger signal generator is configured to further in response to the one or more order from described processor and generates described first trigger pip and described second trigger pip.

4. system according to claim 2, wherein:

Described trigger signal generator is configured to further, in response to the local clock frequency associated with described local clock higher than the external clock frequency associated with described external clock, generate the first edge of described first trigger pip in the very first time, the Second Edge of the external timing signal associated with described external clock is along roughly occurring in the described very first time; With

Described trigger signal generator is configured to further, in response to described external clock frequency higher than described local clock frequency, generate the 3rd edge of described first trigger pip in the second time, the 4th edge of described external timing signal roughly occurs in described second time.

5. system according to claim 4, wherein:

Corresponding rising edge edge, described first edge or trailing edge edge;

Described Second Edge is along corresponding rising edge edge or trailing edge edge;

Corresponding rising edge edge, described 3rd edge or trailing edge edge; With

Corresponding rising edge edge, described 4th edge or trailing edge edge.

6. system according to claim 1, wherein:

Described counter network comprises:

Local time counter, is configured to the first number determining described local clock cycles during the described count cycle; With

External clock counter, is configured to the second number determining described external clock during the described count cycle; With

Described processor is configured to further:

Determine and the local clock that the first number of described local clock cycles associates;

Determine and the external clock value that the second number of described external clock cycle associates; With

Calibration ratio is defined as equal described local clock divided by described external clock value for clock alignment.

7. system according to claim 6, wherein:

Described local time counter has N bit width; With

Described local clock is 0 to 2 ⁿin the scope of-1.

8. system according to claim 6, wherein:

Described external clock counter has N bit width; With

Described external clock value is 0 to 2 ⁿin the scope of-1.

9. system according to claim 6, wherein said processor is configured to the local clock frequency of described local clock to be defined as with the product of the external clock frequency of described calibration ratio and described external clock proportional further.

10. system according to claim 6, wherein:

Described calibration ratio is provided for the calibration of described external clock; With

The external clock frequency of described external clock is defined as with the local clock frequency of described local clock proportional divided by described calibration ratio.

11. systems according to claim 1, wherein:

Described local clock comprises temperature compensating crystal oscillator; With

Described external clock comprises the modulator-demodular unit clock associated with communication network.

12. 1 kinds of clock correcting methods for satellite navigation system, described method comprises:

Determine the count cycle of the clock alignment of satellite navigation system;

The first number of the local clock cycles associated with the local clock of described satellite navigation system is determined during the described count cycle;

The second number of the external clock cycle associated with external clock is determined during the described count cycle; With

The calibration for the described local clock of described satellite navigation system is performed at least in part based on the first number of described local clock cycles and the second number of described external clock cycle.

13. methods according to claim 12, also comprise:

Generate the first trigger pip and the second trigger pip, the beginning of described first trigger pip corresponding described count cycle, the end of described second trigger pip corresponding described count cycle.

14. methods according to claim 13, wherein said generation first trigger pip and the second trigger pip comprise:

In response to the local clock frequency associated with described local clock higher than the external clock frequency associated with described external clock, generate the first edge of described first trigger pip in the very first time, the Second Edge of the external timing signal associated with external clock is along roughly occurring in the described very first time; With

In response to described external clock frequency higher than described local clock frequency, generate the 3rd edge of described first trigger pip in the second time, the 4th edge of described external timing signal roughly occurs in described second time.

15. methods according to claim 14, wherein:

Corresponding rising edge edge, described first edge or trailing edge edge;

Described Second Edge is along corresponding rising edge edge or trailing edge edge;

Corresponding rising edge edge, described 3rd edge or trailing edge edge; With

Corresponding rising edge edge, described 4th edge or trailing edge edge.

16. methods according to claim 12, also comprise:

Determine during the described count cycle and the local clock that the first number of described local clock cycles associates;

Determine during the described count cycle and the external clock value that the second number of described external clock cycle associates; With

Calibration ratio is defined as equal described local clock divided by described external clock value.

17. methods according to claim 16, the calibration wherein performed for the described local clock of described satellite navigation system based on the first number of described local clock cycles and the second number of described external clock cycle at least in part comprises:

The local clock frequency of described local clock is defined as with the product of the external clock frequency of described calibration ratio and described external clock proportional.

18. methods according to claim 16, also comprise:

The calibration of described external clock is performed at least in part based on described calibration ratio.

19. methods according to claim 18, are wherein defined as with the local clock frequency of described local clock proportional divided by described calibration ratio by the external clock frequency of described external clock.

20. 1 kinds of mobile devices, comprising:

One or more processor;

Satellite navigation system; With

Computer-readable recording medium, it is encoded with the instruction for ordering described data processor to perform following operation:

Determine the count cycle of the clock alignment of described satellite navigation system;

The first number of the local clock cycles associated with the local clock of described satellite navigation system is determined during the described count cycle;

The second number of the external clock cycle associated with external clock is determined during the described count cycle; With

The calibration for the local clock of described satellite navigation system is performed at least in part based on described first number of described local clock cycles and described second number of described external clock cycle.