CN104636525B - Printed circuit inspection method and device - Google Patents
Printed circuit inspection method and device Download PDFInfo
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- CN104636525B CN104636525B CN201310566900.8A CN201310566900A CN104636525B CN 104636525 B CN104636525 B CN 104636525B CN 201310566900 A CN201310566900 A CN 201310566900A CN 104636525 B CN104636525 B CN 104636525B
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Abstract
The present invention provides a kind of printed circuit inspection method and device.A circuit layout is obtained first, its record has first layer and the second layer, and first layer records again a plurality of circuit, and circuit all has code, each circuit corresponds to the first set of multiple coordinates on coordinate system, and the second layer also corresponds to the second set of multiple coordinates on coordinate system.Then a keyword string is received, and to each circuit, when the code of circuit includes foregoing keyword string, compares first set corresponding to second set and this circuit.The printed circuit inspection method of the present invention can check the broken copper situation of circuit automatically with device.
Description
Technical field
The present invention relates to printed circuit board (PCB)（printed circuit board）, line is checked more particularly to the design phase
Whether road enters into brokenly copper（void）The method and apparatus in area.
Background technology
Electric design automation（Electronic design automation, abbreviation EDA）It is at present to focus on inspection more
The problem of in production and the circuit design of mistake, though it can also aid in detecting routing layer（conductor layer）And flaggy
（plane layer）Between signal and voltage interference, be to all circuits in practice in the copper foil region on flaggy
（net）Artificial visually comparison one by one is transferred to after doing brokenly copper inspection respectively.When these practices spacious day gives up, easily flow and dredged in hundred close one, tool
Its shortcoming is no specific aim for body, must check all circuits, and the broken copper phenomenon across copper foil is felt simply helpless.
The content of the invention
In view of the above problems, the present invention is intended to provide a kind of printed circuit inspection method and a kind of printed circuit inspection dress
Put, the broken copper situation of circuit can be checked automatically.
The present invention provides a kind of printed circuit inspection method, and step includes：Obtain a circuit layout（layout）, it is remembered
Record has first layer and the second layer, and first layer records again a plurality of circuit, and circuit all has a code, and each circuit is right on coordinate system
The first set of multiple coordinates is answered, the second layer also corresponds to the second set of multiple coordinates on coordinate system；Receive a keyword
String；And to each circuit, when the code of circuit includes foregoing keyword string, it is corresponding with the circuit to compare the second set
The first set.
The present invention also provides a kind of printed circuit check device, comprising layout modules, input module and checks module.Layout
Module is to provide a circuit layout, and its record has first layer and the second layer, and first layer records again a plurality of circuit, and circuit is all
There is code, each circuit corresponds to the first set of multiple coordinates on coordinate system, and the second layer also corresponds to multiple on coordinate system
The second set of coordinate.Input module is receiving a keyword string.Module couples layout modules and input module are checked, to
Compare first set corresponding to one of second set and circuit；The code of this circuit includes the keyword string.
In summary, printed circuit inspection method of the invention and device operate in a circuit layout, in circuit layout
First layer record has circuit table（netlist）, the second layer is then associated with some rules that circuit need to follow.Compare middle route selection road and
The coordinate set of the second layer（Or the image being made up of pixel " pixel "）, its deviation is broken copper place.Due to circuit foundation
Selected in certain keyword string, inspection of the invention has specific aim, the demand of coincident circuit designer.
More than on the explanation of present invention and the explanation of following embodiment demonstrating and explain the present invention
Spirit and principle, and claims of the present invention is provided and further explained.
Brief description of the drawings
Fig. 1 is the high level block diagram according to one embodiment of the invention printed circuit check device；
Fig. 2 is the flow chart according to one embodiment of the invention printed circuit inspection method；
Fig. 3 is the schematic diagram of the first set of multiple coordinates corresponding to a circuit；
Fig. 4 A are the schematic diagram of the second set of multiple coordinates corresponding to a flaggy；
Fig. 4 B are the schematic diagram of the 3rd set of multiple coordinates corresponding to a flaggy；
Fig. 4 C are the schematic diagram of the 3rd relative complement of a set collection corresponding to a flaggy in first set corresponding to a circuit；
Fig. 5 A are the schematic diagram of the second set of multiple coordinates in a Jin Zhi perforations area；
Fig. 5 B are that the relative complement set of second set corresponding to a Jin Zhi perforations area shows in first set corresponding to a circuit
It is intended to.
Reference
10：Layout modules 12：Image processing module
14：Input module 16：Check module
3：Coordinate system S201-S211：Step
Embodiment
The detailed features and advantage of the narration present invention in detail in embodiments below, its content are enough to make any to be familiar with
Person skilled understands the technology contents of the present invention and implemented according to this, and is wanted according to content disclosed in the present specification, right
Ask book and accompanying drawing, it is any to be familiar with person skilled and be readily understood upon the purpose and advantage of correlation of the invention.Following implementation
The viewpoint of the present invention is further described in example, but non-anyways to limit scope of the invention.
Fig. 1 is refer to, Fig. 1 is the high level block diagram according to one embodiment of the invention printed circuit check device.Such as Fig. 1 institutes
Show, printed circuit check device includes layout modules 10, image processing module 12, input module 14 and checks module 16.Layout
Module 10, image processing module 12 and the inspection three of module 16 are mutually coupled, and check that module 16 separately couples input module 14.
It please coordinate Fig. 1 reference pictures 2.Fig. 2 is the flow chart according to one embodiment of the invention printed circuit inspection method.Such as figure
Shown in 2, in step S201, layout modules 10 provide a circuit layout, its can be electric design automation in one or
Multiple archives.Circuit layout records first layer and the second layer, and wherein first layer can be routing layer, and routing layer is included by a plurality of
One circuit table of railway superstructures.In the present embodiment, the second layer represents flaggy, can be ground panel（ground plane）
Or power supply flaggy（power plane）.In general, the position for having circuit on routing layer need to have corresponding conductive copper in flaggy
Paper tinsel is protected by, but routing layer and flaggy actually independent individual, in circuit design process both there may be difference, that is,
A kind of situation of so-called broken copper.
As it was previously stated, there is a set of implicit limited coordinate system in circuit layout, first layer and the second layer all correspond to therewith.
Specifically, every circuit all corresponds to an elongated zones in cabling layer image on routing layer（Circuit has width）, this area
The pixel respective coordinates in domain fasten the first set of multiple coordinates, as shown in Figure 3.In figure 3, a circuit respective coordinates are 3
On can be labeled as (2, c), (2, d), (3, c) so that (6, d) etc. coordinate composition hatched example areas.Similarly, flaggy（Image）
Also can respective coordinates fasten the second sets of multiple coordinates.Flaggy image designated herein refers to positive（positive）, also
Its actual complexion when being to visually observe flaggy.In step S203, image processing module 12 is obtained in coordinate system with second
The 3rd complementary set of set, that is, there is no multiple coordinates corresponding to the region of any copper foil or element on flaggy.Change sentence
Talk about, step S203 obtains the negative film of flaggy image equivalent to image processing module 12（negative）.For example, in Fig. 4 A
The flaggy image negative film shown in flaggy image positive and Fig. 4 B bends region shown in hatched example areas is in limited coordinate system 3
For Absolute complementarity（absolute complement）Relation.
In step S205, input module receives a keyword string.Every circuit all has its code or life in circuit table
Name；When name meets ad hoc rules, such as frequency（clock）Signal wire is all started with " CLK_ ", and user inputs " CLK " to close
Key word string can hunt out all frequency signal lines.In one embodiment, keyword string is inputted by user.In another implementation
In example, printed circuit check device of the invention is preset with one or more keyword strings.
In step S207, check that module 16 is more conform with first set and flaggy corresponding to a circuit of keyword string
Corresponding second set.Specifically, check that module 16 obtains the 3rd relative complement of a set collection in first set（relative
complement）, that is, calculate the difference that first set subtracts the 3rd set.For image processing, check module 16 to this
The image of bar circuit（Such as Fig. 3）With the negative film of flaggy image（Such as Fig. 4 B）Carry out logic NOT（NOT）Computing, obtain as in Fig. 4 C
Hatched example areas.In step S209, check that module 16 judges whether the image of circuit has change, as whether the area of circuit subtracts
It is few, that is, compare first set and foregoing relative complement set.When judging that first set is not equal to foregoing relative complement set, such as Fig. 4 C
Hatched example areas compares Fig. 3 person and has lacked two blocks of broken copper that coordinate is (4, c) and (4, d), then checks that module 16 is remembered in step S211
At least one erroneous point on circuit, the coordinate lacked in such as foregoing relative complement set are recorded, and returns to step S207 and continues checking for it
It meets the circuit of keyword string.The record of erroneous point supplies subsequent treatment, and such as in one embodiment, layout modules 10 can show neighbour
The circuit layout of the part of nearly erroneous point, or in another embodiment, it is relevant with erroneous point to check that module 16 can be changed automatically
Partial circuit layout.In step S209, when judging that first set is equal to foregoing relative complement set, check that module 16 returns to step
Rapid S207 continues checking for other circuits for meeting keyword string.
In another embodiment, the second layer is at least one Jin Zhi perforations area（via keepout）, it is specified that on routing layer
Reveal copper（Therefore there can not be circuit, there is another situation that circuit is broken copper）But perforation can not be placed（via）Region, such as Fig. 5 A
Hatched example areas shown in.It has been vague and general empty to shine definition due to Jin Zhi perforations area, is not required to image processing module 12 and obtains its negative film
Can be compared with first set corresponding to the circuit for meeting keyword string.Check that module 16 obtains first set Zhong Jinzhi perforations area
The relative complement set of corresponding second set, or the image to certain circuit（Such as Fig. 3）With the image of the second layer（Such as Fig. 5 A）Carry out
NOT computings, the hatched example areas in such as Fig. 5 B is can obtain, it is compared to two pieces of the coordinate that Fig. 3 lacks for (3, c) and (4, c)
To break copper point.
In summary, printed circuit inspection method of the invention can check specific circuit in circuit layout automatically with device
Broken copper situation, particularly line crossing flaggy copper foil or the situation for touching Jin Zhi perforations area, are avoided and are searched with artificial blanket type
Rope and the not efficiency of amendment.
Claims (8)
1. a kind of printed circuit inspection method, it is characterised in that include：
A circuit layout is obtained, circuit layout record has a first layer and a second layer, and first layer record has multiple circuits,
Each circuit has a first set of multiple coordinates on a code and a corresponding coordinate system, and the second layer is to should coordinate system
One second set of upper multiple coordinates；
Receive a keyword string；And
To each circuit, when the code of the circuit includes the keyword string, it is corresponding with the circuit to compare the second set
The first set,
The step of wherein comparing the first set corresponding to the second set and the circuit includes：Obtain on the coordinate system with this
One the 3rd complementary set of two set；And obtain the 3rd relative complement of a set collection in the first set；Wherein when the phase
When being not equal to the first set to supplementary set, at least erroneous point on the circuit is recorded.
2. printed circuit inspection method according to claim 1, it is characterised in that the second layer is a flaggy, the flaggy
A corresponding flaggy image, the second set to should flaggy image positive, the 3rd set to should flaggy image negative film.
3. printed circuit inspection method according to claim 1, it is characterised in that the second layer is that at least one taboo puts perforation
Area, compares the second set and is included corresponding to the circuit the step of first set：
Obtain the relative complement set of the second set in the first set；
Wherein when the relative complement set is not equal to the first set, at least erroneous point on the circuit is recorded.
4. the printed circuit inspection method according to claim 1 or 3, it is characterised in that also include：
The neighbouring part of the erroneous point circuit layout of display.
5. a kind of printed circuit check device, it is characterised in that include：
One layout modules, to provide a circuit layout, circuit layout record has a first layer and a second layer, the first layer
Record has multiple circuits, and each circuit has a first set of multiple coordinates on a code and a corresponding coordinate system, and this
Two layers to should on coordinate system multiple coordinates a second set；
One input module, to receive a keyword string；
One checks module, couples the layout modules and the input module, to compare the second set and those circuits wherein it
The first set corresponding to one, the code of the circuit include the keyword string；And
One image processing module, the layout modules are coupled, to obtain complementary with the second set one the 3rd on the coordinate system
Set；
Wherein when the inspection module compares the second set and the first set corresponding to the circuit, the inspection module obtains should
3rd relative complement of a set collection in first set, and when the relative complement set is not equal to the first set, the inspection module
More recording at least erroneous point on the circuit.
6. printed circuit check device according to claim 5, it is characterised in that the second layer is a flaggy, the flaggy
A corresponding flaggy image, the second set to should flaggy image positive, the 3rd set to should flaggy image negative film.
7. printed circuit check device according to claim 5, it is characterised in that the second layer is that at least one taboo puts perforation
Area, and when the first set corresponding to the inspection module compares the second set and the circuit, the inspection module obtain this
The relative complement set of the second set in one set, and when the relative complement set is not equal to the first set, the inspection module is more
To record at least erroneous point on the circuit.
8. the printed circuit check device according to claim 5 or 7, it is characterised in that the layout modules are more showing
The neighbouring part of the erroneous point circuit layout.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310566900.8A CN104636525B (en) | 2013-11-14 | 2013-11-14 | Printed circuit inspection method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310566900.8A CN104636525B (en) | 2013-11-14 | 2013-11-14 | Printed circuit inspection method and device |
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| CN104636525A CN104636525A (en) | 2015-05-20 |
| CN104636525B true CN104636525B (en) | 2017-12-19 |
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| CN201310566900.8A Active CN104636525B (en) | 2013-11-14 | 2013-11-14 | Printed circuit inspection method and device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1401107A (en) * | 2000-01-18 | 2003-03-05 | 索威森公司 | Method and system for detecting defects on a printed circuit board |
| CN101398861A (en) * | 2007-09-28 | 2009-04-01 | 英业达股份有限公司 | Layout detection method in electron component welding region |
| CN102338754A (en) * | 2010-07-22 | 2012-02-01 | 牧德科技股份有限公司 | Method for detecting defects of power supply layer and ground layer of circuit board |
| CN103096613A (en) * | 2011-11-07 | 2013-05-08 | 英业达科技有限公司 | Printed circuit board and manufacture method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006038582A (en) * | 2004-07-26 | 2006-02-09 | Dainippon Screen Mfg Co Ltd | Detection of flaw due to regional division of image |
| EP2539776A1 (en) * | 2010-02-26 | 2013-01-02 | Micronic Mydata AB | Method and apparatus for performing pattern alignment |
-
2013
- 2013-11-14 CN CN201310566900.8A patent/CN104636525B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1401107A (en) * | 2000-01-18 | 2003-03-05 | 索威森公司 | Method and system for detecting defects on a printed circuit board |
| CN101398861A (en) * | 2007-09-28 | 2009-04-01 | 英业达股份有限公司 | Layout detection method in electron component welding region |
| CN102338754A (en) * | 2010-07-22 | 2012-02-01 | 牧德科技股份有限公司 | Method for detecting defects of power supply layer and ground layer of circuit board |
| CN103096613A (en) * | 2011-11-07 | 2013-05-08 | 英业达科技有限公司 | Printed circuit board and manufacture method thereof |
Non-Patent Citations (2)
| Title |
|---|
| 一种基于Gerber文件的PCB缺陷检测方法;刘贵等;《图形图像》;20130630;全文 * |
| 基于数字图像处理的印刷电路板缺陷检测;李正明等;《仪表技术与传感器》;20121231(第8期);全文 * |
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Effective date of registration: 20191213 Address after: Floor 1, building 3, No. 988, Xinxing Second Road, Pinghu Economic Development Zone, Jiaxing City, Zhejiang Province Patentee after: Jiaxing Weivo Semiconductor Co., Ltd. Address before: 201114 Shanghai City Caohejing export processing zone of Minhang District Pu Xing Road No. 789 Co-patentee before: Yingda Co., Ltd. Patentee before: Yingda Technology Co., Ltd. |
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