CN104617886B - A kind of Poewr control method and its circuit composed for improving power amplifier switches - Google Patents
A kind of Poewr control method and its circuit composed for improving power amplifier switches Download PDFInfo
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- CN104617886B CN104617886B CN201410669957.5A CN201410669957A CN104617886B CN 104617886 B CN104617886 B CN 104617886B CN 201410669957 A CN201410669957 A CN 201410669957A CN 104617886 B CN104617886 B CN 104617886B
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Abstract
The Poewr control method that the present invention provides a kind of to compose for improving power amplifier switches, including：(1) grid voltage for leading to element and drain voltage or grid voltage and supply voltage were detected, the saturation infromation of logical element is obtained；(2) if saturation infromation showed that logical element will be disengaged from saturation workspace, the drain current of logical element was shunted to error amplifier, reduces drain electrode output voltage.Meanwhile the present invention also provides a kind of power control circuits for realizing the above method.The present invention can reduce the change rate of output voltage, prevent it comparatively fast close to supply voltage, maintained the saturation degree for leading to element, significantly improved the switch spectral property of power amplifier using succinct, cleverly circuit design.
Description
Technical field
The present invention relates to a kind of Poewr control methods more particularly to a kind of for improving opening for mobile terminal power amplifier
The Poewr control method for closing spectral property, also relates to a kind of power control circuit for realizing above-mentioned Poewr control method,
Belong to radio circuit technical field.
Background technique
Radio-frequency power amplifier (RF PA) is widely used in the wireless telecom equipments such as mobile phone.In the prime electricity of transmitter
Lu Zhong, RF signal power very little caused by modulation oscillator circuit need to carry out by radio-frequency power amplifier a series of
Amplification-buffer stage, interstage amplifier section, final power amplifying stage after obtaining enough radio-frequency powers, can just be fed to antenna
On radiate.In this process, accurate power control is to ensuring that the normal use of wireless telecom equipment is most important
's.
Currently, there is various kinds of mobile communication standard or wireless communication standard on the market, for example, GSM, TD-LTE, WCDMA,
Wi-Fi etc..Various communication standards are required realizes accurate power control in very big dynamic range.Radio-frequency power amplifier
Output characteristics have to comply with relevant communication standard, such as when output power must satisfy burst, covers (Burst Mask)
Requirement.In order to meet this requirement, saturation degree usually is detected added with a specialized circuitry in power control circuit, but it is realized
Method is often excessively complicated.
Such as in a kind of existing power control circuit, by be arranged the voltage of a current offset power amplifier base stage come
Meet above-mentioned requirements.The voltage signal is formed by the linear combination of a power control signal and a reference voltage.Although
Under low power condition, the program makes power added efficiency increase, but in high power, especially high power and low electricity
Under the voltage condition of source, the program is easy to appear the phenomenon that switch spectrum deteriorates.
In the Chinese patent application that publication No. is CN102354242A, a kind of power control circuit, Ke Yigen are disclosed
Adjust the base voltage of power amplifier dynamically according to the requirement of different output power to achieve the purpose that optimize electric current.The function
Rate control circuit includes an error amplifier, voltage-stablizer and a current detection circuit.Function is flowed through in current detection circuit detection
The electric current of rate amplifier, and generate a detection signal.This signal can be voltage or electric current.At one in the specific implementation,
The electric current for flowing through power amplifier can be replicated and reduce by a certain percentage.Electric current after duplication controls signal through input power
Further modulate and feed back on error amplifier.Thus error amplifier generates output voltage to control in power amplifier
Base stage, thus achieve the purpose that dynamic control base voltage so that optimize electric current.But the program also have the following drawbacks：
When the supply voltage of mobile terminal is too low, the switch spectral property of power amplifier still can have the case where deteriorating.
Summary of the invention
In view of the deficiencies of the prior art, primary technical problem to be solved by this invention is to provide a kind of for improving shifting
The Poewr control method of dynamic terminal power amplifier switch spectral property.
Another technical problem to be solved by this invention is to provide a kind of function for realizing above-mentioned Poewr control method
Rate control circuit.
For achieving the above object, the present invention uses following technical solutions：
A kind of Poewr control method composed for improving power amplifier switches, includes the following steps：
(1) grid voltage for leading to element and drain voltage or grid voltage and supply voltage were detected, logical member is obtained
The saturation infromation of part；
(2) if the saturation infromation showed that logical element will be disengaged from saturation workspace, the excessively logical member is shunted
The drain current of part reduces drain electrode output voltage to error amplifier.
Wherein more preferably, the grid voltage and supply voltage for detecting the excessively logical element, when the grid voltage and power supply
When difference in voltage reaches setting value, to the gate charges of element of leading to excessively to prevent saturation degree too low.
A kind of power control circuit composed for improving power amplifier switches, for realizing above-mentioned power control side
Method, including：Linear voltage-stabilizing circuit and dynamic current source；Wherein, the linear voltage stabilization module further include error amplifier 102, it is anti-
Current feed circuit 104 and excessively logical element 105；
The error amplifier 102 is an operational amplifier, the extraneous power control letter provided of inverting input terminal connection
Number Vramp, non-inverting input terminal are connected with 104 one end of feed circuit, and output end 103 is connected with the grid of excessively logical element 105；Institute
The source electrode for stating logical element 105 is connected on power end Vdd, and drain electrode 106 is connected to the other end of feed circuit；Feed circuit
104 other end is connected with the grid of excessively logical element 105；
The dynamic current source 201 has three ends, and first end 2011 is connected with the output end 103 of error amplifier 102,
Second end 2012 is connected with the non-inverting input terminal of error amplifier 102, and third end 2013 was connected to the drain electrode of logical element 105
Or power end Vdd.
Wherein more preferably, when the power control signal Vramp is lower or supply voltage Vdd is larger, the dynamic electric
Stream source 201 does not work, and is greater than the set value or supply voltage Vdd is reduced to and sets when the power control signal Vramp gradually rises
When definite value, i.e., when the grid of the described excessively logical element 105 is down to the value of setting, the conducting of dynamic current source 201 works.
Wherein more preferably, the dynamic current source 201 is made of a PMOS tube 202 and a NMOS tube 203；It is described
The grid of PMOS tube 202 is connected to the output end 103 of the error amplifier 102, and drain electrode is connected to the error amplifier 102
Non-inverting input terminal, source electrode was connected to the drain electrode of logical element 105；The grid of the NMOS tube 203 is connected with source electrode, into one
Step is connected to the drain electrode of the excessively logical element 105, and drain electrode is connected to the non-inverting input terminal of the error amplifier 102.
Wherein more preferably, the dynamic current source 201 is by the first PMOS tube 202, the second PMOS tube 204 and a NMOS tube
203 compositions；The grid of first PMOS tube 202 is connected to the output end 103 of the error amplifier 102, and drain electrode is connected to
The non-inverting input terminal of the error amplifier 102, source electrode are connected to the grid and source electrode of the NMOS tube 203, further connect
To the drain electrode of second PMOS tube 204；The drain electrode of the NMOS tube 203 is connected to the same mutually defeated of the error amplifier 102
Enter end；The grid of the PMOS tube 204 was connected to the grid of logical element 105, and source electrode is connected to the source of the excessively logical element 105
Pole.
Wherein more preferably, one end of dynamic clamp device 301 is connected to power end Vdd；The other end and the error amplifier
102 output end 103 is connected.
Wherein more preferably, when the power control signal Vramp is smaller, the output end 103 of the error amplifier 102
Voltage is higher, and the dynamic clamp device 301 does not work；When the power control signal Vramp is more than setting value, the error is put
The voltage of the output end 103 of big device 102 reduces, and the dynamic clamp device 301 has electric current to pass through, to the excessively logical element 105
Grid charges to prevent voltage overshoot reduction.
Wherein more preferably, the dynamic clamp device 301 can be in series by one or more PMOS tube, wherein each
The grid of PMOS tube is connected to the drain electrode of itself, and the drain electrode of a upper PMOS tube is connected to the source electrode of next PMOS tube；
The source electrode of first PMOS tube is connected to power end Vdd, and drain electrode is connected with the source electrode of another PMOS tube, according to this
Analogize, the drain electrode of the last one PMOS tube is connected to the output end 103 of the error amplifier 102.
Compared with prior art, the present invention can reduce the variation of output voltage using succinct, cleverly circuit design
Rate prevents it comparatively fast close to supply voltage, maintained the saturation degree for leading to element, and the switch spectrum for significantly improving power amplifier is special
Property.Present invention is especially suited for use in low supply voltage.
Detailed description of the invention
Fig. 1 is the schematic diagram of linear voltage-stabilizing circuit for carrying out the present invention；
Fig. 2 is in one embodiment of the present of invention, a kind of for improving the power control of power amplifier switches spectral property
Circuit diagram；
Fig. 3 is in one embodiment of the present of invention, using the power control circuit schematic diagram in the first dynamic current source；
Fig. 4 is in one embodiment of the present of invention, using the power control circuit schematic diagram in second of dynamic current source；
Fig. 5 is the power control circuit schematic diagram of increase dynamic clamp device on the basis of Fig. 2；
Fig. 6 is the power control circuit schematic diagram of increase dynamic clamp device on the basis of Fig. 3；
Fig. 7 is the power control circuit schematic diagram of increase dynamic clamp device on the basis of Fig. 4.
Specific embodiment
Technology contents of the invention are further described in the following with reference to the drawings and specific embodiments.
As shown in Figure 1, linear voltage-stabilizing circuit 101 for carrying out the present invention includes error amplifier 102, feed circuit
104, excessively logical element 105.Error amplifier 102 is an operational amplifier, the extraneous power control provided of inverting input terminal connection
Signal Vramp processed, non-inverting input terminal are connected with 104 one end of feed circuit, and output end 103 is connected with the grid of excessively logical element 105
It connects；The source electrode for crossing logical element 105 is connected on power end Vdd, and drain electrode 106 is connected to the other end of feed circuit, while also connecting
It is connected to the collector of one or more power amplifiers, is indicated in Fig. 1 with load.There are two outputs for linear voltage-stabilizing circuit 101：
One output was the drain electrode 106 of logical element 105, and voltage is Vcc herein；Another output is the output end of error amplifier
103.Due to the negative-feedback characteristic of linear voltage-stabilizing circuit 101, the voltage vcc at the drain electrode 106 of excessively logical element 105 is in response to power
Control signal Vramp.The output voltage signal Vcc linear response of linear voltage-stabilizing circuit 101 is in power control signal Vramp, control
The collector of power amplifier processed is indicated with load in Fig. 1~4.Crossing logical element 105 is usually PMOS tube, similarly, PMOS tube
NMOS tube can be used to be substituted, then do adjustment slightly.
It is well known that usually there are two types of working conditions for the PMOS tube as excessively logical element：Linear work area and saturation work
Area.When power control signal is smaller, PMOS tube is in saturation workspace.At this point, entire linear voltage-stabilizing circuit has biggish work
Make bandwidth, there is very strong voltage stabilizing function.When power control signal increases, PMOS tube progressively disengages saturation workspace and enters
Linear zone.The bandwidth of system narrows at this time, and voltage stabilizing function weakens.Which kind of working condition PMOS is in, and can respectively be held by PMOS tube
The relative size of mouthful voltage determines.Specifically, if
Vsg〈Vsd+|Vtp| (1)
So, PMOS tube is in saturation region.Conversely, then in linear zone.Here Vsg is the source voltage and grid of PMOS tube
Difference in voltage, Vsd are the differences of source voltage and drain voltage.Vtp is the threshold voltage of PMOS tube.When power control signal is very big
When, Vsg is far longer than Vsd+ | Vtp |, PMOS tube is in depth linear zone, and it is very poor to switch spectral property with regard to very little for saturation degree.
Due to leading to switch spectral property of the saturation degree for power amplifier of element 105 excessively in linear voltage-stabilizing circuit
It says very crucial.Its saturation degree is smaller, and the switch spectral property of power amplifier is poorer.Therefore, a dynamic electric is introduced in the present invention
Stream source and a dynamic clamp device improve the performance of low supply voltage lower switch spectrum.
It is a kind of power control circuit composed for improving power amplifier switches provided by the invention shown in Fig. 2, including：
Linear voltage-stabilizing circuit 101, dynamic current source 201.Wherein, dynamic current source 201 has three ends, and first end 2011 and error are amplified
The output end 103 of device 102 is connected, and second end 2012 is connected with the non-inverting input terminal of error amplifier 102, third end 2013
It was connected to drain electrode 106 or the power end of logical element 105.The effect in dynamic current source 201 is the grid for having served as logical element 105
When pole tension reduces, the drain electrode 106 of excessively logical element 105 has very big electric current and passes through, and voltage vcc can become very big at this time, draws
Starting voltage Vcc's rises to, and for entire circuit system, RF switch spectrum at this time will increase high-frequency noise；Work as dynamic current
When 103 voltage instantaneous of output end that the first end 2011 in source 201 measures error amplifier 102 reduces, dynamic current source 201 at this time
Conducting shunts the larger current of the drain electrode 106 of excessively logical element 105, can be become smaller by the electric current of resistance R1, so that voltage
Vcc is reduced, i.e., instantaneous variation can obtain certain alleviation, so as to improve electric current or the change rate of voltage, reduces high-frequency noise.
That is, realizing voltage vcc when close to supply voltage Vdd, the purpose of its rate of change is reduced.
Dynamic current source can have several embodiments.Referring to Fig. 3, the first embodiment is by a PMOS tube 202
It is formed with a NMOS tube 203.The grid of PMOS tube 202 is connected to the output end 103 of error amplifier 102, and drain electrode is connected to
The non-inverting input terminal of error amplifier 102, source electrode were connected to the drain electrode of logical element 105.The grid and source electrode phase of NMOS tube 203
Even, it was further attached to the drain electrode of logical element 105, drain electrode is connected to the non-inverting input terminal of error amplifier 102.
When power control signal is smaller, the grid voltage of excessively logical element 105 is higher, has lesser electric current to pass through leakage at this time
Pole, i.e. output voltage Vcc is lower, and PMOS tube 202 and NMOS tube are not turned on since gate pmos pole tension is higher, there is lesser electricity
Stream passes through；NMOS tube also has lesser electric current to pass through since voltage is lower, i.e., dynamic current source 201 has lesser electric current to pass through,
But the normal work of other circuits is not influenced.That is, dynamic current source is not turned on when Vramp is smaller.The circuit is not
Influence the normal work of other circuits.When Vramp is more than certain threshold value, the conducting of dynamic current source begins with electric current and flows through；When
During power control signal gradually increases, the grid voltage of excessively logical element 105 is gradually decreased, by the electric current of drain electrode also by
Cumulative big, i.e. output voltage Vcc gradually rises；When having served as logical element 105 and will be disengaged from saturation region, switch, which is composed, to be deteriorated；This
When PMOS tube 202 grid voltage it is lower, reach design value, start to work, and output voltage Vcc is also higher, has larger
Electric current passes through PMOS tube 202；And the grid voltage of NMOS tube 203 is higher, drain voltage, that is, output voltage Vcc is also higher, starts
Work has larger current and passes through NMOS tube 203.Due to Vcc=Vramp*R1/R2+Vramp*R2/R2, i.e. output voltage Vcc
The sum of the voltage Vramp*R2/R2 of voltage Vramp*R1/R2 and resistance R2 equal to resistance R1, when dynamic current source 201 works
When, due to the shunting function in dynamic current source 201, the electric current for flowing through resistance R1 can be less than the electric current for flowing through resistance R2, therefore, defeated
Voltage vcc becomes smaller out.That is the change rate that can reduce output voltage Vcc of dynamic current source 201 prevents it comparatively fast close to power supply electricity
Vdd is pressed, the saturation degree for leading to element 105 was maintained, the switch for alleviating power amplifier to a certain extent composes deterioration.
Referring to fig. 4, second of embodiment in dynamic current source is by PMOS tube 202, PMOS tube 204 and a NMOS tube
203 compositions.The grid of PMOS tube 202 is connected to the output end 103 of error amplifier 102, and drain electrode is connected to error amplifier 102
Non-inverting input terminal, source electrode is connected to the grid and source electrode of NMOS tube 203, is further attached to the drain electrode of PMOS tube 204；NMOS
Pipe 203, which drains, is connected to the non-inverting input terminal of error amplifier 102；The grid of PMOS tube 204 was connected to the grid of logical element 105
Pole, source electrode were connected to the source electrode of logical element 105, and may also connect to power end.
Second of embodiment is that a PMOS tube 204 is increased on the basis of the first embodiment.Work as PMOS tube
204 grid voltage is lower, and when supply voltage Vdd is relatively low, PMOS tube 204 has larger current and passes through, so that PMOS
Pipe 202 and NMOS tube 203 also work at the same time.The main function of PMOS tube 204 is that supply voltage Vdd is lower, and power control
Larger situation detected signal Vramp again, then triggers PMOS tube 202 and NMOS tube 203 works.Other courses of work
It is identical as the first embodiment, it does not just specifically illustrate herein.
For the implementation result for advanced optimizing this power control circuit, the present invention also provides a kind of dynamic clamp device, ginsengs
See Fig. 5.One end of dynamic clamp device 301 is connect with power end, i.e., one end is supply voltage Vdd；The other end and error amplifier
102 output end 103 is connected.The effect of the dynamic clamp device 301 is：Prevented the grid voltage moment for leading to element 105 from becoming
Obtain too low, the brought influence that instantaneously becomes larger of alleviation power control signal Vramp to a certain extent.
Dynamic clamp device 301 can be made of one or more PMOS tube, and wherein the grid of each pipe is connected to it
Drain electrode, multiple PMOS tube are connected, and the source electrode of first PMOS tube is connected to supply voltage Vdd, the PMOS tube at end
Drain electrode is connected to the output end 103 of error amplifier 102.Referring to Fig. 6 and Fig. 7, in one embodiment of the invention, dynamic is clamped
Position device 301 includes two PMOS tube：PMOS tube 3011 and PMOS tube 3012.The grid connection of PMOS tube 3011, PMOS tube 3012
It drains to itself, the source electrode of PMOS tube 3011 connects power end, and voltage is supply voltage Vdd；The drain electrode of PMOS tube 3011 connects
It is connected to the source electrode of PMOS tube 3012；The drain electrode of PMOS tube 3012 is connected to the output end 103 of error amplifier 102.
When power control signal Vramp is smaller, the voltage of the output end 103 of error amplifier 102 is higher, dynamic clamp
Device 201 does not work, and does not influence the function of basic circuit.When power control signal Vramp is larger, error amplifier 102
The voltage of output end 103 reduces, so that dynamic clamp device 201 has electric current to pass through, charges to the grid of excessively logical element 105,
Prevent it from excessively reducing.
Above to it is provided by the present invention for improve power amplifier switches spectrum Poewr control method and its circuit into
Detailed description is gone.For those of ordinary skill in the art, to it under the premise of without departing substantially from true spirit
Any obvious change done, the infringement for all weighing composition to the invention patent, will undertake corresponding legal liabilities.
Claims (6)
1. a kind of for improving the power control circuit of power amplifier switches spectrum, it is characterised in that including linear voltage-stabilizing circuit and
Dynamic current source；The linear voltage-stabilizing circuit further includes error amplifier (102), feed circuit (104) and excessively logical element
(105)；
The extraneous power control signal (Vramp) provided of inverting input terminal connection of the error amplifier (102), homophase input
End is connected with feed circuit (104) one end, and output end (103) is connected with the grid of excessively logical element (105)；Cross logical element
(105) source electrode is connected on power end, and drain electrode (106) is connected to the other end of feed circuit；
The dynamic current source (201) has three ends, output end (103) phase of first end (2011) and error amplifier (102)
Connection, second end (2012) are connected with the non-inverting input terminal of error amplifier (102), and third end (2013) were connected to logical member
The drain electrode of part (105) or power end；Wherein,
The dynamic current source (201) is by the first PMOS tube (202), the second PMOS tube (204) and NMOS tube (203) group
At；The grid of first PMOS tube (202) is connected to the output end (103) of the error amplifier (202), and drain electrode is connected to
The non-inverting input terminal of the error amplifier (102), source electrode are connected to the grid and source electrode of the NMOS tube (203), further
It is connected to the drain electrode of second PMOS tube (204)；The drain electrode of the NMOS tube (203) is connected to the error amplifier
(102) non-inverting input terminal；The grid of second PMOS tube (204) was connected to the grid of logical element (105), source electrode connection
To the source electrode of excessively logical element (105).
2. power control circuit as described in claim 1, it is characterised in that further include dynamic clamp device (301)；The dynamic
One end of clamper (301) is connected to power end；The other end is connected with the output end (103) of the error amplifier (102).
3. power control circuit as claimed in claim 2, it is characterised in that：
When the power control signal (Vramp) is smaller, the voltage of the output end (103) of the error amplifier (102) is higher,
The dynamic clamp device (301) does not work；When the power control signal (Vramp) is more than setting value, the error amplifier
(102) voltage of output end (103) reduces, and the dynamic clamp device (301) has electric current to pass through, to the excessively logical element
(105) grid charges to prevent voltage overshoot reduction.
4. power control circuit as claimed in claim 2, it is characterised in that：
The dynamic clamp device (301) is in series by one or more PMOS tube, and wherein the grid of each PMOS tube connects
It is connected to the drain electrode of itself；
The source electrode of first PMOS tube is connected to power end, and drain electrode is connected with the source electrode of next PMOS tube, and so on, most
The drain electrode of the latter PMOS tube is connected to the output end (103) of the error amplifier (102).
5. it is a kind of for improving the Poewr control method of power amplifier switches spectrum, it is based on power control described in claim 1
Circuit is realized, it is characterised in that is included the following steps：
(1) grid voltage for leading to element (105) and drain voltage or grid voltage and supply voltage were detected, was obtained logical
The saturation infromation of element (105)；
(2) if the saturation infromation showed that logical element (105) will be disengaged from saturation workspace, the excessively logical member is shunted
The drain current of part (105) reduces drain electrode output voltage to error amplifier (102).
6. Poewr control method as claimed in claim 5, it is characterised in that further comprise following steps：
The grid voltage and supply voltage for detecting excessively logical element (105), when the difference of the grid voltage and supply voltage reaches
When to setting value, to excessively logical element (105) gate charges to prevent saturation degree too low.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410669957.5A CN104617886B (en) | 2014-11-20 | 2014-11-20 | A kind of Poewr control method and its circuit composed for improving power amplifier switches |
| EP15860536.0A EP3223109B1 (en) | 2014-11-20 | 2015-11-20 | Power control method, device and communication terminal for improving power amplifier switch spectrum |
| PCT/CN2015/095228 WO2016078620A1 (en) | 2014-11-20 | 2015-11-20 | Power control method, device and communication terminal for improving power amplifier switch spectrum |
| US15/528,409 US10305430B2 (en) | 2014-11-20 | 2015-11-20 | Power control method, device and communication terminal for improving power amplifier switch spectrum |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410669957.5A CN104617886B (en) | 2014-11-20 | 2014-11-20 | A kind of Poewr control method and its circuit composed for improving power amplifier switches |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104617886A CN104617886A (en) | 2015-05-13 |
| CN104617886B true CN104617886B (en) | 2018-11-27 |
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| CN201410669957.5A Active CN104617886B (en) | 2014-11-20 | 2014-11-20 | A kind of Poewr control method and its circuit composed for improving power amplifier switches |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016078620A1 (en) * | 2014-11-20 | 2016-05-26 | 北京芯麒电子技术有限公司 | Power control method, device and communication terminal for improving power amplifier switch spectrum |
| CN111293993B (en) * | 2020-02-18 | 2021-05-25 | 广州慧智微电子有限公司 | Power control circuit |
| CN112003652A (en) * | 2020-08-20 | 2020-11-27 | 上海移远通信科技有限公司 | Radio frequency debugging method and device of terminal equipment and computer readable storage medium |
| CN113315089B (en) * | 2021-05-27 | 2023-06-23 | 晶艺半导体有限公司 | High-power supply rejection ratio load switching circuit and control method thereof |
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| US7453244B1 (en) * | 2005-05-16 | 2008-11-18 | National Semiconductor Corporation | Low dropout regulator with control loop for avoiding hard saturation |
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| CN102354242A (en) * | 2011-08-02 | 2012-02-15 | 唯捷创芯(天津)电子技术有限公司 | Power control circuit |
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| CN204465461U (en) * | 2014-11-20 | 2015-07-08 | 北京芯麒电子技术有限公司 | A kind of power control circuit for improving power amplifier switches spectrum |
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| US7453244B1 (en) * | 2005-05-16 | 2008-11-18 | National Semiconductor Corporation | Low dropout regulator with control loop for avoiding hard saturation |
| CN2876858Y (en) * | 2005-09-13 | 2007-03-07 | 圆创科技股份有限公司 | Linear voltage regulator |
| TW201014133A (en) * | 2008-09-25 | 2010-04-01 | Advanced Analog Technology Inc | A low drop out regulator with over-current protection |
| CN102243504A (en) * | 2010-04-09 | 2011-11-16 | 特里奎恩特半导体公司 | Voltage regulator with control loop for avoiding hard saturation |
| CN102354242A (en) * | 2011-08-02 | 2012-02-15 | 唯捷创芯(天津)电子技术有限公司 | Power control circuit |
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