CN104579273B - System and method for driving bipolar junction transistor by adjusting base current - Google Patents
System and method for driving bipolar junction transistor by adjusting base current Download PDFInfo
- Publication number
- CN104579273B CN104579273B CN201410648464.3A CN201410648464A CN104579273B CN 104579273 B CN104579273 B CN 104579273B CN 201410648464 A CN201410648464 A CN 201410648464A CN 104579273 B CN104579273 B CN 104579273B
- Authority
- CN
- China
- Prior art keywords
- current
- time
- time period
- bipolar junction
- junction transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
Abstract
Systems and methods for driving a bipolar junction transistor by regulating base current are provided. The system includes a current generator configured to output a drive current signal to a bipolar junction transistor to regulate a primary current flowing through a primary winding of a power converter. The current generator is further configured to: outputting a drive current signal to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period; driving the bipolar junction transistor to operate in a hard saturation region during a first period and a second period; and driving the bipolar junction transistor to operate in the quasi-saturation region during the third time period.
Description
The present application is a divisional application of chinese patent application No.201110171960.0 entitled "system and method for driving a bipolar junction transistor by adjusting a base current" filed as 2011, 6/20.
Technical Field
The present invention relates to integrated circuits. More particularly, the present invention provides systems and methods for driving bipolar junction transistors. Merely by way of example, the invention has been applied to drive bipolar junction transistors with base current that varies over time. It will be appreciated that the invention has a much broader range of application.
Background
Bipolar Junction Transistors (BJTs) have been widely used as power switches in power electronic systems. Fig. 1(a) shows a simplified cross-sectional view of a conventional N-P-N Bipolar Junction Transistor (BJT). N-P-N BJT 102 includes a P-doped layer 106, an N-lightly doped layer 108, and an N-heavily doped layer 110. Layer 110 is connected to terminal 118 (e.g., terminal "C" representing the collector) and layer 108 serves as the collector drift region. As shown in fig. 1(a), there are three heavily doped regions in layer 106, including a p-type heavily doped region 112 and two n-type heavily doped regions 114. Region 112 is connected to terminal 116 (e.g., terminal "B" representing the base), and region 114 is connected to terminal 120 (e.g., terminal "E" representing the emitter). In general, N-P-N BJT 102 is turned on by injecting a current into region 112, which causes electrons to flow from region 114 to layer 110. FIG. 1(B) shows a simplified schematic symbol of a conventional N-P-N bipolar junction transistor 102. The schematic 104 includes terminals 116, 118 and 120 representing a base, a collector and an emitter, respectively. Arrow 122 of terminal 120 indicates the flow of current when N-P-N BJT 102 is turned on.
FIG. 2 is a simplified conventional diagram illustrating collector current as a function of collector-to-emitter voltage for N-P-N BJT 102. As shown, the N-P-N BJT can operate in at least a linear region, a quasi-saturation region (quasi-saturation region), and a hard-saturation region (hard-saturation region). In the linear region, for a particular base current (e.g., I) b) Collector current (e.g. I)c) With respect to collector-to-emitter voltage (e.g., V)ce) And remain constant. In addition, if the collector-to-emitter voltage (e.g., V)ce) Sufficiently reduced, BJT 102 enters a quasi-saturation region, and if the collector-to-emitter voltage (e.g., V)ce) Is further reduced sufficiently, BJT 102 enters a hard saturation region.
Power switches in power electronic systems are typically required to provide high switching speeds, low on-state output impedance and high off-state output impedance. Therefore, as a power switch, the BJT 102 is usually operated in a hard saturation region when the BJT 102 is turned on, so that the output impedance is kept low. However, in the hard saturation region, the maximum switching frequency of BJT 102 is typically limited. For example, when BJT 102 enters the hard saturation region, many minority carriers are accumulated in the base; therefore, it is often necessary to remove these minority carriers before BJT 102 can be turned off. The time required to remove the accumulated minority carriers is referred to as the storage time, which represents the time that the BJT 102 is on even when the base current drops to near zero. Thus, the storage time of minority carriers may limit the maximum switching frequency of BJT 102.
To increase the maximum switching frequency of BJT 102, it is desirable to reduce the amount of minority carriers stored in the base. For example, a negative base current is used to sweep minority carriers from the base of BJT 102. However, when BJT 102 is operating in a hard saturation region, it is often difficult to turn BJT 102 off quickly with a negative base current because carriers will be stored in the base region of BJT 102 before BJT 102 is turned off.
In another example, to reduce the amount of minority carriers stored in the base, the BJT 102 is prevented from entering a hard saturation region, so that the BJT 102 can be turned off quickly. However, this approach may significantly increase the on-state power consumption of BJT 102. To generate the same collector current, the collector-to-emitter voltage (e.g., V) for the same base currentce) Higher in the quasi-saturated region than in the hard saturated region.
Fig. 3(a) shows a simplified diagram of a conventional flyback power conversion system. The flyback power conversion system 300 includes at least a BJT 304, a controller 306, and a resistor 308. BJT 304 (e.g., BJT 102) is used as a power switch, and controller 306 is used to drive BJT 304. BJT 304 includes an emitter, a collector, and a base, and controller 306 includes terminals 310 and 312. The emitter of BJT 304 is connected to resistor 308, and the base of BJT 304 is connected to controller 306 through terminal 310 (e.g., terminal "DRV"). As shown in fig. 3(a), the controller 306 provides a base current 305 through a terminal 310 to turn the BJT 304 on or off. If BJT 304 is on, the emitter current of BJT 304 flows through resistor 308, and resistor 308 generates voltage signal 309. The voltage signal 309 is received by the controller 306 through a terminal 312 (e.g., terminal "CS").
Fig. 3(B) is a simplified conventional timing diagram of flyback power conversion system 300. Waveform 314 represents the on and off conditions of BJT304 as a function of time, and waveform 316 represents the base as a function of timePole current 305 and waveform 318 represents voltage signal 309 as a function of time. As shown in FIG. 3(B), when BJT304 is turned on (e.g., at t)0During) the base current 305 remains constant and the voltage signal 309 increases over time.
This conventional technique of driving BJT304 can turn BJT304 on and quickly drive BJT304 into hard saturation to reduce power consumption during the turn-on process. However, a constant base current 305 (e.g., as t)0Shown by waveform 316 during) typically makes it more difficult to sweep away minority carriers stored in the base of BJT304 during the turn-off process. Therefore, the turn-off process of the BJT304 is often long, and the power consumption of the BJT304 may be high.
Therefore, improvements in the technology of driving bipolar junction transistors are highly desirable.
Disclosure of Invention
The present invention relates to integrated circuits. More particularly, the present invention provides systems and methods for driving bipolar junction transistors. Merely by way of example, the invention has been applied to drive bipolar junction transistors with base current that varies over time. It will be appreciated that the invention has a much broader range of application.
According to one embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to: the driving current signal is output to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period and the second time period. Moreover, the current generator is further configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. Additionally, the third time period starts at a fifth time and ends at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The magnitude of the second current is greater than the third current, and the magnitude of the fourth current is greater than the fifth current.
According to another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting a drive current signal to a bipolar junction transistor comprises: the driving current signal is output to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period. The process for outputting a drive current signal to the bipolar junction transistor further comprises: the bipolar junction transistor is driven to operate in a hard saturation region during the first period and the second period. Further, the process for outputting the drive current signal to the bipolar junction transistor includes: and driving the bipolar junction transistor to operate in a quasi-saturation region during the third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. Additionally, the third time period starts at a fifth time and ends at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fourth current is larger than that of the fifth current.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period and the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time, and the second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The current generator is further configured to: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the second time period. The second current is larger than the third current in magnitude, and the second time is the same as the third time.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting the drive current signal to the bipolar junction transistor includes driving the bipolar junction transistor to operate in a hard saturation region during a first time period and a second time period. The process for driving the bipolar junction transistor to operate in the hard saturation region during the first and second time periods includes: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, the second current at a second time, the third current at a third time, and the fourth current at a fourth time. The second current is larger than the third current in magnitude, and the second time is the same as the third time.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to output a drive current signal to turn on the bipolar junction transistor during a first time period and a second time period, the first time period being followed by the second time period. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period. And the current generator is also configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The current generator is further configured to: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the first time period. The second current is larger than the third current in magnitude, and the second time and the third time are the same.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting the drive current signal to the bipolar junction transistor includes outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period. The process for outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period includes: driving a bipolar junction transistor to operate in a hard saturation region during a first period of time; and driving the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The second current is larger than the third current in magnitude, and the second time and the third time are the same.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to: the driving current signal is output to turn on the bipolar junction transistor during the first and second periods and to turn off the bipolar junction transistor during the third and fourth periods. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period. Moreover, the current generator is further configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The second period of time is followed by a fourth period of time. The first time period is preceded by a third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The third time period ends at a fifth time and the fourth time period begins at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fifth current is less than the first current, and the sixth current is different from the fourth current.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting a drive current signal to a bipolar junction transistor comprises: outputting a drive current signal to turn on the bipolar junction transistor during a first time period and a second time period; and outputting a drive current signal to turn off the bipolar junction transistor during the third and fourth time periods. The process for outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period includes: driving a bipolar junction transistor to operate in a hard saturation region during a first period of time; and driving the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The second period of time is followed by a fourth period of time. The first time period is preceded by a third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The third time period ends at a fifth time and the fourth time period begins at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fifth current is less than the first current, and the sixth current is different from the fourth current.
Depending on the embodiment, one or more advantages may be obtained. These advantages as well as various additional objects, features and benefits of the present invention can be more fully understood with reference to the detailed description and accompanying drawings that follow.
Drawings
Fig. 1(a) shows a simplified cross-sectional view of a conventional N-P-N Bipolar Junction Transistor (BJT).
FIG. 1(B) shows a simplified schematic symbol of a conventional N-P-N bipolar junction transistor.
Fig. 2 is a simplified conventional diagram illustrating collector current as a function of collector-to-emitter voltage for an N-P-N BJT.
Fig. 3(a) shows a simplified diagram of a conventional flyback power conversion system.
Fig. 3(B) is a simplified conventional timing diagram of a flyback power conversion system.
Fig. 4(a) is a simplified diagram illustrating a power conversion system according to an embodiment of the present invention.
Fig. 4(B) is a simplified timing diagram of a power conversion system according to an embodiment of the present invention.
Fig. 5 is a simplified diagram illustrating certain components of a controller that is part of a power conversion system according to an embodiment of the present invention.
Fig. 6(a) is a simplified diagram illustrating certain components of a current source that is part of a power conversion system according to an embodiment of the present invention.
Fig. 6(B) is a simplified diagram illustrating certain components of a current source that is part of a power conversion system according to another embodiment of the present invention.
Fig. 7 is a simplified diagram illustrating certain components of a controller for regulating base current as part of a power conversion system according to an embodiment of the present invention.
Fig. 8(a) is a simplified diagram illustrating certain components of a controller that is part of a power conversion system according to an embodiment of the present invention.
Fig. 8(B) is a simplified diagram illustrating certain components of a controller that is part of a power conversion system according to an embodiment of the present invention.
Fig. 9 is a simplified timing diagram of a power conversion system according to another embodiment of the present invention.
Detailed Description
The present invention relates to integrated circuits. More particularly, the present invention provides systems and methods for driving bipolar junction transistors. Merely by way of example, the invention has been applied to drive bipolar junction transistors with base current that varies over time. It will be appreciated that the invention has a much broader range of application.
Fig. 4(a) is a simplified diagram illustrating a power conversion system according to an embodiment of the present invention. The power conversion system 400 includes at least BJT 404, controller 406, and resistor 408. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. For example, the power conversion system 400 is a flyback power converter. In another example, BJT 404 and resistor 408 are the same as BJT 304 and resistor 308, respectively.
According to one embodiment, BJT404 is used as a power switch and controller 406 is used to drive BJT 404. For example, BJT404 includes an emitter, a collector, and a base, and controller 406 includes terminals 410 and 412. In another example, the emitter of BJT404 is connected to resistor 408, and the base of BJT404 is connected to controller 406 through terminal 410 (e.g., terminal "DRV"). According to another embodiment, controller 406 provides base current 405 through terminal 410 to turn BJT404 on or off. For example, if BJT404 is on, the emitter current of BJT404 flows through resistor 408, and resistor 408 generates voltage signal 409. In another example, the voltage signal 409 is received by the controller 406 through a terminal 412 (e.g., terminal "CS").
Fig. 4(B) is a simplified timing diagram of a power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. Waveform 414 represents the on and off conditions of BJT404 as a function of time, waveform 416 represents base current 405 as a function of time, and waveform 418 represents voltage signal 409 as a function of time.
In one embodiment, during time period t1，t2And t3During this time, BJT 404 is on (e.g., as shown by waveform 414) and base current 405 (e.g., as shown by waveform 416) changes over time. For example, during a time period t1During this time, base current 405 drives BJT 404 into the hard saturation region. In another example, during time period t2During this time, the base current increases over time and the BJT 404 remains in the hard saturation region. In yet another example, at time period t3Period, BJT404 leave the hard saturation region and enter the quasi-saturation region.
In another embodiment, to keep BJT 404 in hard saturation, base current 405 and collector current 407 have the following relationship:
βminIB＞IC(formula 1)
Wherein, IBRepresents the base current 405, and ICThe collector current 407 is shown. In addition, betaminRepresenting the minimum current gain of BJT 404 in the linear region.
As shown in FIG. 4(B), I1A、I1B、I2A、I2B、I3A、I3B、I4AAnd I4BEach representing base current 405 at a different time according to some embodiments. For example, if base current 405 is positive, then the base current flows into the base of BJT 404. In another example, if base current 405 is negative, then base current 405 flows out of the base of BJT 404.
According to one embodiment, during the time period t 1At the beginning of (1), the base current 405 is from I1AJump to I1B(e.g., as shown by the rising edge of waveform 416) and for a time period t1At the end of (1), the base current 405 is from I2ADown to I2B(e.g., as shown by the falling edge of waveform 416). For example, I1BIs equal to I2A. In another example, during time period t1During the period, the base current 405 is at I1BIs kept constant. According to another embodiment, during the time period t2During which the base current 405 is driven from I over time2BIs changed into I3A(e.g., as shown by waveform 416). For example, during a time period t2During which the base current 405 is driven from I over time2BIs changed into I3A(e.g., linearly or non-linearly increasing). According to a further embodiment, during the time period t3At the beginning of (1), the base current 405 is from I3ADown to I3B(e.g., as shown by the falling edge of waveform 416) and for a time period t3At the end of (1), the base current 405 is from I4AIs changed into I4B(e.g., as a function of the falling edge of waveform 416Shown). For example, I4BIs a negative current for turning the BJT 404 off. As another example, I3BIs equal to I4A. In another example, during time period t3During the period, the base current 405 is at I3BIs kept constant.
As shown in FIGS. 4(A) and 4(B), according to some embodiments, during time period t1，t2And t3Adjusting the base current 405 during this period may increase switching speed and/or reduce power consumption. For example, during a time period t 3At the end of (b), the BJT 404 can be turned off quickly because at least a substantial portion of the minority carriers accumulated in the base of the BJT 404 have been in the time period t3During which time it is swept away.
As discussed above and further emphasized here, fig. 4(a) is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. For example, the power conversion system 400 is replaced by additional power switching structures such as a Boost structure and/or a Buck structure.
Fig. 5 is a simplified diagram illustrating certain components of a controller 406 that is part of a power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. The controller 406 includes at least three current sources 504, 506, and 508.
In one embodiment, current source 504 provides a constant current 505 (e.g., I)const). For example, the constant current is at least over the entire time period t1And t2Is kept constant. In another embodiment, the current source 506 provides a pulsed current 507 (e.g., I) pulse). For example, the pulse current 507 is in the time period t1，t2And t3During which only one pulse is included and which has a duration corresponding to the time period t, respectively1The beginning and ending rising and falling edges.
In yet another embodiment, current source 508 provides current 509 (e.g., I)sense). Current 509 is at least the wholeTime period t2Over time (e.g., linearly or non-linearly over time). In another example, at least for the time period t2Meanwhile, current source 508 receives a signal (e.g., voltage signal 409) representative of the current flowing through BJT404 and determines the magnitude of current 509 based on information associated with the signal (e.g., voltage signal 409).
According to one embodiment, pulsed current 506 is used to turn BJT404 on and drive BJT404 into a hard saturation region. For example, the magnitude of the pulsed current 506 is close to the upper limit of the drive current of the BJT 404. According to another embodiment, the current 509 is generated by sensing the current flowing through the BJT404 and is used to ensure that the BJT404 is at least at the time period t, e.g., by satisfying equation 12While remaining in the hard saturation region.
Fig. 6(a) is a simplified diagram illustrating certain components of current source 508 as part of power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. The current source 508 includes a pair of transistors 624 and 626, a resistor 628, an operational amplifier 630, and a transistor 632 that form a current mirror circuit.
As shown in fig. 6(a), according to one embodiment, a current source 508 (e.g., as a voltage-to-current converter) generates a current 509, which current 509 is used as at least a portion of base current 405. For example, operational amplifier 630 receives voltage signal 409 at input terminal 636 and generates amplified signal 640 in response. In another example, the amplified signal 640 is received by a transistor 632, which transistor 632 is also coupled to another input terminal 642 of the operational amplifier 630. As a result, transistor 632 generates a current signal 633, the current signal 633 flowing through both transistor 624 and resistor 628. According to another embodiment, current signal 633 is mirrored by transistor 626 at a predetermined ratio to generate current 509.
As discussed above and emphasized here, fig. 5 is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. For example, current source 508 receives a current signal representative of the current flowing through BJT 404 instead of voltage signal 409 and determines the magnitude of current 509 based on information associated with the current signal, as shown in fig. 6 (B).
Fig. 6(B) is a simplified diagram illustrating certain components of a current source 508 that is part of a power conversion system 400 according to another embodiment of the invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. Current source 508 includes transistors 604 and 606, resistors 602 and 608, transconductance amplifier 610, and transistors 618 and 620. For example, the transistors 604 and 606 form one current mirror circuit, and the transistors 618 and 620 form the other current mirror circuit. In another example, transconductance amplifier 610 includes an operational amplifier 612 and a transistor 614.
As shown in fig. 6(B), according to one embodiment, current source 508 generates a current 509, which current 509 is used as at least a portion of base current 405. For example, transistors 606 and 604 receive the emitter current of BJT 404 and in response generate signals 607 and 609 at the two terminals of resistor 608. In another example, signals 607 and 609 are received by transconductance amplifier 610 and converted to current signal 611. In yet another example, current signal 611 flows through transistor 618 and is mirrored by transistor 620 at a predetermined ratio to generate current 509.
Fig. 7 is a simplified diagram illustrating certain components of a controller 406 for regulating base current as part of a power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. Controller 406 includes transistors 706, 708, 710, 712, 714, and 716, and current source 718. For example, the transistors 712 and 716 are p-channel field effect transistors, and the transistor 714 is an n-channel field effect transistor. In another example, current source 718 represents some other component in controller 406 that generates current 719, with current 719 also flowing through transistor 710.
In one embodiment, transistor 706 mirrors current 719 and generates current 720 through transistor 716. For example, the transistor 716 is turned on or Off by a control signal 724 (e.g., Pre _ Turn _ Off signal). In another example, if transistor 716 is off, current 720 becomes zero. In another example, transistor 708 mirrors current 719 and generates current 722 through transistor 712. The transistor 712 is turned on or Off by a control signal 726 (e.g., Turn _ Off signal). In another example, if transistor 712 is off, current 722 becomes zero. In yet another embodiment, the transistor 714 is turned on or off by the control signal 726. For example, if transistor 714 is on, transistor 714 generates a current 728.
According to one embodiment, if transistors 712 and 716 are on but transistor 714 is off, base current 405 flows from terminal 410 to the base of BJT 404 and is equal to the sum of currents 720 and 722. According to another embodiment, if transistors 712 and 716 are off but transistor 714 is on, base current 405 flows from the base of BJT 404 to terminal 410 and is equal to current 728. For example, referring to FIG. 4(B), according to some embodiments, at time period t 3At the end of (d), the base current 405 changes its direction because of I5Is greater than zero and I6Is less than zero.
According to some embodiments, if BJT 404 is on (e.g., in a hard saturation region), control signals 724 and 726 are at a logic low level. For example, in response, transistors 712 and 716 turn on and transistor 714 turns off, thereby providing base current 405 flowing into the base of BJT 404.
In one embodiment, the control signal 724 goes to a logic high level before the control signal 726 also goes to a logic high level. For example, in response, transistor 716 is turned off, but transistor 712 remains on and transistor 714 remains off. In another example, the magnitude of base current 405 flowing into the base of BJT 404 is reduced, thereby causing BJT 404 to enter a quasi-saturated region. In another embodiment, after the control signal 724 goes to a logic high level, the control signal 726 also goes to a logic high level. For example, in response, transistors 712 and 716 are both off, and transistor 714 is on. In another example, the base current 405 changes its direction and flows out of the base of the BJT 404, thereby sweeping minority carriers accumulated in the base of the BJT 404 and causing the BJT 404 to turn off quickly.
Fig. 8(a) is a simplified diagram illustrating certain components of a controller 406 that is part of a power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. The controller 406 includes current sources 838 and 840, an operational amplifier 842, transistors 848, 854, 856, 858, 860, 862, 864, 866, and 868, and a resistor 870. For example, the transistors 848, 854, 856, and 866 are n-channel field effect transistors, and the transistors 858, 860, 862, 864, and 868 are p-channel field effect transistors. In another example, transistor 868 receives control signal 872, transistors 864 and 866 receive control signal 874, transistor 854 receives control signal 876, and transistor 856 receives control signal 878.
In one embodiment, the combination of operational amplifier 842, transistors 848, 858, 860, and 862, and resistor 870 functions substantially the same as the combination of operational amplifier 630, transistors 624, 626, and 632, and resistor 628 shown in fig. 6(a), where transistor 632 is replaced by transistors 860 and 862. In another embodiment, the combination of transistors 858, 860, 862, 864, 866, and 868 function substantially the same as the combination of transistors 706, 708, 710, 712, 714, and 716 shown in fig. 7. For example, control signal 872 is the same as control signal 724 and control signal 874 is the same as control signal 726.
As shown in fig. 8(a), current signals 880, 882, and 884 flow through transistor 858, according to one embodiment. For example, current signal 880 is controlled by transistor 854, and transistor 854 is turned on or off by control signal 876. In another example, the current signal 882 is generated by a current source 838. In yet another example, the current signal 884 is controlled by the transistor 856, and the transistor 856 is turned on or off by the control signal 878 and coupled to the current source 840. According to another embodiment, the current signal 882 is a constant current and the current signal 884 is a pulsed current.
According to another embodiment, current signals 880, 882, and 884 are summed by transistor 858 and mirrored by transistors 860 and 862 to generate summed and mirrored currents. For example, if transistors 868 and 864 are on and transistor 866 is off, this summed and mirrored current is used to turn BJT 404 on and drive it into a hard saturation region. In another example, later BJT 404 first enters the quasi-saturation region and then turns off quickly by first turning off transistor 868, then turning off transistor 864 and turning on transistor 866.
Fig. 8(B) is a simplified diagram illustrating certain components of controller 406 as part of power conversion system 400 according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. Controller 406 includes current sources 838 and 840, transistors 854, 856, and 858, and transistors 860, 862, 864, 866, and 868. In addition, controller 406 includes transistors 810 and 812, resistors 816 and 818, and transconductance amplifier 814.
For example, transconductance amplifier 814 includes an operational amplifier 822 and a transistor 824. In another example, transistors 810, 812, 824, 854, 856, and 866 are n-channel field effect transistors and transistors 858, 860, 862, 864, and 868 are p-channel field effect transistors. In yet another example, transistor 868 receives control signal 872, transistors 864 and 866 receive control signal 874, transistor 854 receives control signal 876, and transistor 856 receives control signal 878.
According to one embodiment, the combination of transistors 810 and 812, resistors 816 and 818, transconductance amplifier 814, and transistors 858, 860, and 862 functions substantially the same as the combination of transistors 604 and 606, resistors 602 and 608, transconductance amplifier 610, and transistors 618 and 620 shown in fig. 6(B), where transistor 620 is replaced by transistors 860 and 862. For example, terminal 804 is identical to terminal 622. According to another embodiment, the combination of transistors 858, 860, 862, 864, 866, and 868 function substantially the same as the combination of transistors 706, 708, 710, 712, 714, and 716 shown in fig. 7. For example, control signal 872 is the same as control signal 724 and control signal 874 is the same as control signal 726.
Fig. 9 is a simplified timing diagram of a power conversion system 400 according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One skilled in the art will recognize many variations, alternatives, and modifications. Waveform 902 represents control signal 876 as a function of time, waveform 904 represents control signal 878 as a function of time, waveform 906 represents control signal 872 (e.g., control signal 724) as a function of time, and waveform 908 represents control signal 874 (e.g., control signal 726) as a function of time. In addition, waveform 910 represents voltage signal 409 as a function of time, and waveform 912 represents base current 405 as a function of time. For example, waveform 910 is the same as waveform 418. In another example, waveform 912 is the same as waveform 416.
In one embodiment, waveforms 902, 904, 906, 908, 910, and 912 describe certain operations of FIG. 8 (A). In another embodiment, waveforms 902, 904, 906, 908, 910, and 912 describe certain operations of FIG. 8 (B).
According to another embodiment, according to one embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to: the driving current signal is output to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period and the second time period. Moreover, the current generator is further configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. Additionally, the third time period starts at a fifth time and ends at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The magnitude of the second current is greater than the third current, and the magnitude of the fourth current is greater than the fifth current. For example, the system is implemented in accordance with at least fig. 4(a), 4(B), 5, 6(a), 6(B), 7, 8(a), 8(B), and/or 9.
According to another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting a drive current signal to a bipolar junction transistor comprises: the driving current signal is output to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period. The process for outputting a drive current signal to the bipolar junction transistor further comprises: the bipolar junction transistor is driven to operate in a hard saturation region during the first period and the second period. Further, the process for outputting the drive current signal to the bipolar junction transistor includes: and driving the bipolar junction transistor to operate in a quasi-saturation region during the third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. Additionally, the third time period starts at a fifth time and ends at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fourth current is larger than that of the fifth current. For example, the method is implemented according to at least fig. 4(a), 4(B), 5, 6(a), 6(B), 7, 8(a), 8(B), and/or 9.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period and the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time, and the second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The current generator is further configured to: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the second time period. The second current is larger than the third current in magnitude, and the second time is the same as the third time. The system is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 8(a), fig. 8(B) and/or fig. 9.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting the drive current signal to the bipolar junction transistor includes driving the bipolar junction transistor to operate in a hard saturation region during a first time period and a second time period. The process for driving the bipolar junction transistor to operate in the hard saturation region during the first and second time periods includes: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, the second current at a second time, the third current at a third time, and the fourth current at a fourth time. The second current is larger than the third current in magnitude, and the second time is the same as the third time. The method is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 8(a), fig. 8(B) and/or fig. 9.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to output a drive current signal to turn on the bipolar junction transistor during a first time period and a second time period, the first time period being followed by the second time period. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period. And the current generator is also configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The current generator is further configured to: receiving a feedback signal associated with the primary current; and generating a drive current signal based at least on information associated with the feedback signal during at least the first time period. The second current is larger than the third current in magnitude, and the second time and the third time are the same. The system is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 7, fig. 8(a), fig. 8(B), and/or fig. 9.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting the drive current signal to the bipolar junction transistor includes outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period. The process for outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period includes: driving a bipolar junction transistor to operate in a hard saturation region during a first period of time; and driving the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, and equal to the fourth current at a fourth time. The second current is larger than the third current in magnitude, and the second time and the third time are the same. The method is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 7, fig. 8(a), fig. 8(B) and/or fig. 9.
According to yet another embodiment, a system for driving a bipolar junction transistor for a power converter comprises: a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter. The current generator is further configured to: the driving current signal is output to turn on the bipolar junction transistor during the first and second periods and to turn off the bipolar junction transistor during the third and fourth periods. In addition, the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during the first time period. Moreover, the current generator is further configured to drive the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The second period of time is followed by a fourth period of time. The first time period is preceded by a third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The third time period ends at a fifth time and the fourth time period begins at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fifth current is less than the first current, and the sixth current is different from the fourth current. The system is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 7, fig. 8(a), fig. 8(B), and/or fig. 9.
According to yet another embodiment, a method for driving a bipolar junction transistor for a power converter comprises: generating a drive current signal; and outputting a drive current signal to the bjt to regulate the primary current flowing through the primary winding of the power converter. The process for outputting a drive current signal to a bipolar junction transistor comprises: outputting a drive current signal to turn on the bipolar junction transistor during a first time period and a second time period; and outputting a drive current signal to turn off the bipolar junction transistor during the third and fourth time periods. The process for outputting the drive current signal to turn on the bipolar junction transistor during the first time period and the second time period includes: driving a bipolar junction transistor to operate in a hard saturation region during a first period of time; and driving the bipolar junction transistor to operate in the quasi-saturation region during the second time period. The first time period is followed by a second time period. The second period of time is followed by a fourth period of time. The first time period is preceded by a third time period. The first time period starts at a first time and ends at a second time. The second time period starts at a third time and ends at a fourth time. The third time period ends at a fifth time and the fourth time period begins at a sixth time. The drive current signal is equal to the first current at a first time, equal to the second current at a second time, equal to the third current at a third time, equal to the fourth current at a fourth time, equal to the fifth current at a fifth time, and equal to the sixth current at a sixth time. The second current is greater in magnitude than the third current. The magnitude of the fifth current is less than the first current, and the sixth current is different from the fourth current. The method is implemented at least according to fig. 4(a), fig. 4(B), fig. 5, fig. 6(a), fig. 6(B), fig. 7, fig. 8(a), fig. 8(B) and/or fig. 9.
For example, some or all of the components of various embodiments of the present invention are implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components, respectively, and/or in combination with at least one other component. In another example, some or all of the components of various embodiments of the present invention are implemented in one or more circuits, e.g., in one or more analog circuits and/or one or more digital circuits, each separately and/or in combination with at least one other component. In yet another example, various embodiments and/or examples of the invention may be combined.
While specific embodiments of the invention have been described, it will be apparent to those skilled in the art that there are other embodiments that are equivalent to the described embodiments. It is understood, therefore, that this invention is not limited to the particular embodiments shown, but is only limited by the scope of the appended claims.
Claims (17)
1. A system for driving a bipolar junction transistor for a power converter, the system comprising:
a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter;
Wherein:
the current generator is further configured to drive the bipolar junction transistor to operate in a hard saturation region during a first time period and a second time period;
the first time period is followed by the second time period;
the first time period starts at a first time and ends at a second time; and
the second time period starts at a third time and ends at a fourth time;
wherein:
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time; and
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
wherein the current generator is further configured to:
receiving a feedback signal associated with the primary current; and
generating the drive current signal based at least on information associated with the feedback signal at least during the second time period; and
Wherein:
the second current is larger than the third current in magnitude; and is
The third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bjt.
2. The system of claim 1, wherein the feedback signal is selected from the group consisting of a voltage signal associated with the primary current and a current signal associated with the primary current.
3. The system of claim 1, wherein:
the current generator is further configured to output the drive current signal to turn off the bipolar junction transistor during a third time period prior to the first time period;
the third time period ends at a fifth time;
the drive current signal is equal to a fifth current at the fifth time; and
the magnitude of the fifth current is smaller than the first current.
4. The system of claim 3, wherein the first time is the same as the fifth time.
5. A method for driving a bipolar junction transistor for a power converter, the method comprising:
generating a drive current signal; and
outputting the drive current signal to a bipolar junction transistor to regulate a primary current flowing through a primary winding of a power converter;
Wherein:
the processing for outputting the drive current signal to the bipolar junction transistor comprises driving the bipolar junction transistor to operate in a hard saturation region during a first time period and a second time period;
the process for driving the bipolar junction transistor to operate in the hard saturation region during the first time period and the second time period comprises:
receiving a feedback signal associated with the primary current; and
generating the drive current signal based at least on information associated with the feedback signal at least during the second time period;
wherein:
the first time period is followed by the second time period;
the first time period starts at a first time and ends at a second time; and
the second time period starts at a third time and ends at a fourth time;
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time; and
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
Wherein:
the second current is larger than the third current in magnitude; and is
The third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bjt.
6. A system for driving a bipolar junction transistor for a power converter, the system comprising:
a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter;
wherein the current generator is further configured to:
outputting the drive current signal to turn on the bipolar junction transistor during a first time period and a second time period, the first time period being followed by the second time period;
driving the bipolar junction transistor to operate in a hard saturation region during the first period of time; and
driving the bipolar junction transistor to operate in a quasi-saturation region during the second time period;
wherein:
the first time period starts at a first time and ends at a second time; and
the second time period starts at a third time and ends at a fourth time;
Wherein:
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time; and
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
wherein the current generator is further configured to:
receiving a feedback signal associated with the primary current; and
generating the drive current signal based at least on information associated with the feedback signal at least during the first time period;
wherein:
the second current is larger than the third current in magnitude; and is
The third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bjt.
7. The system of claim 6, wherein the feedback signal is selected from the group consisting of a voltage signal associated with the primary current and a current signal associated with the primary current.
8. The system of claim 6, wherein:
the current generator is further configured to output the drive current signal to turn off the bipolar junction transistor during a third time period after the second time period;
the third time period starts at a fifth time;
the drive current signal is equal to a fifth current at the fifth time; and
the fifth current is different from the seventh current.
9. The system of claim 8, wherein:
the seventh current is configured to flow into the bipolar junction transistor; and
the fifth current is configured to flow out of the bipolar junction transistor.
10. The system of claim 8, wherein the fourth time is the same as the fifth time.
11. A method for driving a bipolar junction transistor for a power converter, the method comprising:
generating a drive current signal; and
outputting the drive current signal to a bipolar junction transistor to regulate a primary current flowing through a primary winding of a power converter;
wherein:
processing for outputting the drive current signal to the bipolar junction transistor includes outputting the drive current signal to turn on the bipolar junction transistor during a first time period and a second time period;
The process for outputting the drive current signal to turn on the bipolar junction transistor during the first and second time periods comprises:
driving the bipolar junction transistor to operate in a hard saturation region during the first period of time; and
driving the bipolar junction transistor to operate in a quasi-saturation region during the second time period;
wherein:
the first time period is followed by the second time period;
the first time period starts at a first time and ends at a second time;
the second time period starts at a third time and ends at a fourth time;
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time; and
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
wherein:
the second current is larger than the third current in magnitude; and is
The third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bjt.
12. A system for driving a bipolar junction transistor for a power converter, the system comprising:
a current generator configured to output a drive current signal to the bipolar junction transistor to regulate a primary current flowing through a primary winding of the power converter;
wherein the current generator is further configured to:
outputting the drive current signal to turn on the bipolar junction transistor during a first time period and a second time period and to turn off the bipolar junction transistor during a third time period and a fourth time period;
driving the bipolar junction transistor to operate in a hard saturation region during the first period of time; and
driving the bipolar junction transistor to operate in a quasi-saturation region during the second time period;
wherein:
the first time period is followed by the second time period;
the second period of time is followed by the fourth period of time; and
the first time period is preceded by the third time period;
wherein:
the first time period starts at a first time and ends at a second time;
The second time period starts at a third time and ends at a fourth time;
the third time period ends at a fifth time; and
the fourth time period starts at a sixth time;
wherein:
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time;
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
the drive current signal is equal to a fifth current at the fifth time; and
the drive current signal is equal to a sixth current at the sixth time;
wherein:
the second current is larger than the third current in magnitude;
the third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bipolar junction transistor;
the magnitude of the fifth current is smaller than that of the first current; and
The sixth current is different from the seventh current.
13. The system of claim 12, wherein:
the seventh current is configured to flow into the bipolar junction transistor; and
the sixth current is configured to flow out of the bipolar junction transistor.
14. The system of claim 12, wherein the fifth time is the same as the first time.
15. The system of claim 14, wherein the sixth time is the same as the fourth time.
16. The system of claim 12, wherein the second time is the same as the third time.
17. A method for driving a bipolar junction transistor for a power converter, the method comprising:
generating a drive current signal; and
outputting the drive current signal to a bipolar junction transistor to regulate a primary current flowing through a primary winding of a power converter;
wherein the processing for outputting the drive current signal to the bipolar junction transistor comprises:
outputting the drive current signal to turn on the bipolar junction transistor during a first time period and a second time period; and is
Outputting the drive current signal to turn off the bipolar junction transistor during a third time period and a fourth time period;
Wherein the process for outputting the drive current signal to turn on the bipolar junction transistor during the first and second time periods comprises:
driving the bipolar junction transistor to operate in a hard saturation region during the first period of time; and
driving the bipolar junction transistor to operate in a quasi-saturation region during the second time period;
wherein:
the first time period is followed by the second time period;
the second period of time is followed by the fourth period of time; and
the first time period is preceded by the third time period;
wherein:
the first time period starts at a first time and ends at a second time;
the second time period starts at a third time and ends at a fourth time;
the third time period ends at a fifth time; and
the fourth time period starts at a sixth time;
wherein:
the drive current signal is equal to a first current at the first time;
the drive current signal is equal to a second current at the second time;
the drive current signal is equal to a third current at the third time;
the drive current signal increases linearly or non-linearly from the third current to a fourth current and decreases from the fourth current to a seventh current during the second time period such that the drive current signal is the seventh current at the fourth time;
The drive current signal is equal to a fifth current at the fifth time; and
the drive current signal is equal to a sixth current at the sixth time;
wherein:
the second current is larger than the third current in magnitude;
the third current is larger than the seventh current, and the seventh current is a positive current flowing into the base of the bipolar junction transistor;
the magnitude of the fifth current is smaller than that of the first current; and
the sixth current is different from the seventh current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410648464.3A CN104579273B (en) | 2011-06-20 | 2011-06-20 | System and method for driving bipolar junction transistor by adjusting base current |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410648464.3A CN104579273B (en) | 2011-06-20 | 2011-06-20 | System and method for driving bipolar junction transistor by adjusting base current |
| CN201110171960.0A CN102843124B (en) | 2011-06-20 | 2011-06-20 | System and method for driving bipolar junction transistor through adjustment of base current |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110171960.0A Division CN102843124B (en) | 2011-06-20 | 2011-06-20 | System and method for driving bipolar junction transistor through adjustment of base current |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104579273A CN104579273A (en) | 2015-04-29 |
| CN104579273B true CN104579273B (en) | 2021-09-28 |
Family
ID=53094624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410648464.3A Active CN104579273B (en) | 2011-06-20 | 2011-06-20 | System and method for driving bipolar junction transistor by adjusting base current |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104579273B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5728568A (en) * | 1980-07-29 | 1982-02-16 | Toshiba Corp | Self-oscillating type switching regulator |
| CN1309459A (en) * | 2000-02-09 | 2001-08-22 | 索尼公司 | Switch power supply unit |
| CN101350565A (en) * | 2007-04-23 | 2009-01-21 | 技领半导体(上海)有限公司 | Circuit device for implementing triode base current compesation and control method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7477532B2 (en) * | 2005-08-18 | 2009-01-13 | Semiconductor Components Industries, L.L.C. | Method of forming a start-up device and structure therefor |
| CN100495881C (en) * | 2005-12-21 | 2009-06-03 | 昂宝电子（上海）有限公司 | System for driving bipolar transistor and system for controlling power converter |
| GB2448761A (en) * | 2007-04-27 | 2008-10-29 | Cambridge Semiconductor Ltd | Protecting a power converter switch |
| US8576586B2 (en) * | 2007-09-28 | 2013-11-05 | Iwatt Inc. | Dynamic drive of switching transistor of switching power converter |
-
2011
- 2011-06-20 CN CN201410648464.3A patent/CN104579273B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5728568A (en) * | 1980-07-29 | 1982-02-16 | Toshiba Corp | Self-oscillating type switching regulator |
| CN1309459A (en) * | 2000-02-09 | 2001-08-22 | 索尼公司 | Switch power supply unit |
| CN101350565A (en) * | 2007-04-23 | 2009-01-21 | 技领半导体(上海)有限公司 | Circuit device for implementing triode base current compesation and control method thereof |
Non-Patent Citations (1)
| Title |
|---|
| Modeling the effects of BJT base currents on the dynamics of a log-domain filter;A. Ascoli 等;《2006 IEEE International Symposium on Circuits and Systems》;20060911;第5031-5034页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104579273A (en) | 2015-04-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10536081B2 (en) | Systems and methods for driving a bipolar junction transistor by adjusting base current with time | |
| US10651846B2 (en) | Driver circuit and switching regulator | |
| JP5341781B2 (en) | Power supply control circuit | |
| JP5675190B2 (en) | Device for controlling power transistors | |
| JP2007142788A (en) | Voltage-driven switching circuit | |
| JP2010051165A (en) | Gate drive circuit of semiconductor apparatus and power conversion apparatus using the same | |
| US9979301B2 (en) | Control method and control circuit for switching power supply | |
| JP2005287225A (en) | Drive circuit of voltage driven switch element and power supply device | |
| JP4991446B2 (en) | Power converter | |
| CN107634649B (en) | Switching device driving circuit and method and voltage conversion circuit | |
| US9559668B2 (en) | Drive circuit and semiconductor apparatus | |
| JP2019134520A (en) | Negative voltage generation circuit and power conversion device using the same | |
| EP0921624A1 (en) | Device for driving self arc-extinguishing type power element | |
| JP2011146901A (en) | Driving apparatus | |
| CN104579273B (en) | System and method for driving bipolar junction transistor by adjusting base current | |
| JP2002315311A (en) | Switching regulator | |
| JP2003235251A (en) | Switching regulator | |
| US10886913B2 (en) | Drive method and drive circuit for power switch, and power supply system | |
| JP2017532945A (en) | Adaptive controller for voltage converter | |
| JP2006333104A (en) | Switching circuit | |
| CN114337203B (en) | Low-power-consumption driving circuit for switching power supply and switching power supply system | |
| JP6919920B2 (en) | Adaptive controller for voltage converter | |
| JP2004048959A (en) | Gate drive circuit for voltage drive type element | |
| JP3633540B2 (en) | Step-down converter and method for driving FET of step-down converter | |
| JP2003199328A (en) | Switching circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |